Mechanical Dimensions & Land Pattern (VQFN-100(12x12))
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit VQFN-100(12x12) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — USB7206CT-I/KDX (VQFN-100(12x12))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of USB7206CT-I/KDX (VQFN-100(12x12))?
Manufactured by MICROCHIP, the USB7206CT-I/KDX is housed in a VQFN-100(12x12) package with 101 pins and a 0.40 mm lead pitch. Key pins include: 1 (RESET_N: System Enable & Hardware Reset (RESET_N)), 2 (PF30/VBUS_MONUP_: Power Supply Input (PF30/VBUS_MONUP_ — 3.3V / 5.0V Standard Logic)), 3 (PF31: Multiplexed I/O & Peripheral Pin PF31 (General)), 4 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 5 (USB2DN_DP1: Multiplexed I/O & Peripheral Pin USB2DN_DP1 (USB)), 6 (USB2DN_DM1: Multiplexed I/O & Peripheral Pin USB2DN_DM1 (USB)).
What are the IPC-7351B PCB Footprint dimensions for USB7206CT-I/KDX?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), USB7206CT-I/KDX (VQFN-100(12x12)) has a nominal body envelope of 12.00 × 12.00 mm, pitch e = 0.40 mm, and 101 copper pads plus a central exposed thermal pad (EPAD) of 8.00 × 8.00 mm with a 60% IPC-7525 windowed solder paste grid.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for USB7206CT-I/KDX?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for USB7206CT-I/KDX (MICROCHIP, VQFN-100(12x12)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (101 pins) & USB7206 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | RESET_N | Digital_IO | Active-low hardware reset terminal (RESET_N): pulling this pin Low resets the processor core and peripherals. |
| 2 | PF30/VBUS_MONUP_ | Power_In | Primary positive power supply input (PF30/VBUS_MONUP_) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 3 | PF31 | Digital_IO | Signal terminal PF31 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF31. Supported peripheral buses: General. |
| 4 | NC | NC | Signal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 5 | USB2DN_DP1 | Digital_IO | Signal terminal USB2DN_DP1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DP1. Supported peripheral buses: USB. |
| 6 | USB2DN_DM1 | Digital_IO | Signal terminal USB2DN_DM1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DM1. Supported peripheral buses: USB. |
| 7 | USB3DN_TXDP1 | Digital_IO | Signal terminal USB3DN_TXDP1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_TXDP1. Supported peripheral buses: USB, UART. |
| 8 | USB3DN_TXDM1 | Digital_IO | Signal terminal USB3DN_TXDM1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_TXDM1. Supported peripheral buses: USB, UART. |
| 9 | VCORE | Digital_IO | Signal terminal VCORE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCORE. Supported peripheral buses: General. |
| 10 | USB3DN_RXDP1 | Digital_IO | Signal terminal USB3DN_RXDP1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_RXDP1. Supported peripheral buses: USB, UART. |
| 11 | USB3DN_RXDM1 | Digital_IO | Signal terminal USB3DN_RXDM1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_RXDM1. Supported peripheral buses: USB, UART. |
| 12 | NC | NC | Signal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 13 | NC | NC | Signal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General. |
| 14 | USB2DN_DP2 | Digital_IO | Signal terminal USB2DN_DP2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DP2. Supported peripheral buses: USB. |
| 15 | USB2DN_DM2 | Digital_IO | Signal terminal USB2DN_DM2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DM2. Supported peripheral buses: USB. |
| 16 | USB3DN_TXDP2 | Digital_IO | Signal terminal USB3DN_TXDP2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_TXDP2. Supported peripheral buses: USB, UART. |
| 17 | USB3DN_TXDM2 | Digital_IO | Signal terminal USB3DN_TXDM2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_TXDM2. Supported peripheral buses: USB, UART. |
| 18 | VCORE | Digital_IO | Signal terminal VCORE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCORE. Supported peripheral buses: General. |
| 19 | USB3DN_RXDP2 | Digital_IO | Signal terminal USB3DN_RXDP2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_RXDP2. Supported peripheral buses: USB, UART. |
| 20 | USB3DN_RXDM2 | Digital_IO | Signal terminal USB3DN_RXDM2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_RXDM2. Supported peripheral buses: USB, UART. |
| 21 | CFG_STRAP1 | Digital_IO | Signal terminal CFG_STRAP1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CFG_STRAP1. Supported peripheral buses: General. |
| 22 | CFG_STRAP2 | Digital_IO | Signal terminal CFG_STRAP2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CFG_STRAP2. Supported peripheral buses: General. |
| 23 | CFG_STRAP3 | Digital_IO | Signal terminal CFG_STRAP3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CFG_STRAP3. Supported peripheral buses: General. |
| 24 | TESTEN | Digital_IO | Signal terminal TESTEN (I, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TESTEN. Supported peripheral buses: General. |
| 25 | VCORE | Digital_IO | Signal terminal VCORE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCORE. Supported peripheral buses: General. |
| 26 | VDD33 | Power_In | Primary positive power supply input (VDD33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 27 | USB2DN_DP3 | Digital_IO | Signal terminal USB2DN_DP3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DP3. Supported peripheral buses: USB. |
| 28 | USB2DN_DM3 | Digital_IO | Signal terminal USB2DN_DM3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DM3. Supported peripheral buses: USB. |
| 29 | USB3DN_TXDP3 | Digital_IO | Signal terminal USB3DN_TXDP3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_TXDP3. Supported peripheral buses: USB, UART. |
| 30 | USB3DN_TXDM3 | Digital_IO | Signal terminal USB3DN_TXDM3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_TXDM3. Supported peripheral buses: USB, UART. |
| 31 | VCORE | Digital_IO | Signal terminal VCORE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCORE. Supported peripheral buses: General. |
| 32 | USB3DN_RXDP3 | Digital_IO | Signal terminal USB3DN_RXDP3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_RXDP3. Supported peripheral buses: USB, UART. |
| 33 | USB3DN_RXDM3 | Digital_IO | Signal terminal USB3DN_RXDM3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_RXDM3. Supported peripheral buses: USB, UART. |
| 34 | USB2DN_DP4 | Digital_IO | Signal terminal USB2DN_DP4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DP4. Supported peripheral buses: USB. |
| 35 | USB2DN_DM4 | Digital_IO | Signal terminal USB2DN_DM4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DM4. Supported peripheral buses: USB. |
| 36 | USB3DN_TXDP4 | Digital_IO | Signal terminal USB3DN_TXDP4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_TXDP4. Supported peripheral buses: USB, UART. |
| 37 | USB3DN_TXDM4 | Digital_IO | Signal terminal USB3DN_TXDM4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_TXDM4. Supported peripheral buses: USB, UART. |
| 38 | VCORE | Digital_IO | Signal terminal VCORE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCORE. Supported peripheral buses: General. |
| 39 | USB3DN_RXDP4 | Digital_IO | Signal terminal USB3DN_RXDP4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_RXDP4. Supported peripheral buses: USB, UART. |
| 40 | USB3DN_RXDM4 | Digital_IO | Signal terminal USB3DN_RXDM4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB3DN_RXDM4. Supported peripheral buses: USB, UART. |
| 41 | USB2DN_DM6 | Digital_IO | Signal terminal USB2DN_DM6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DM6. Supported peripheral buses: USB. |
| 42 | USB2DN_DP6 | Digital_IO | Signal terminal USB2DN_DP6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: USB2DN_DP6. Supported peripheral buses: USB. |
| 43 | VDD33 | Power_In | Primary positive power supply input (VDD33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 44 | PF3 | Digital_IO | Signal terminal PF3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General. |
| 45 | PF4 | Digital_IO | Signal terminal PF4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General. |
| 46 | PF5 | Digital_IO | Signal terminal PF5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General. |
| 47 | PF6 | Digital_IO | Signal terminal PF6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF6. Supported peripheral buses: General. |
| 48 | PF7 | Digital_IO | Signal terminal PF7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF7. Supported peripheral buses: General. |
| 49 | PF8 | Digital_IO | Signal terminal PF8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF8. Supported peripheral buses: General. |
| 50 | PF9 | Digital_IO | Signal terminal PF9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF9. Supported peripheral buses: General. |
| 51 | PF10 | Digital_IO | Signal terminal PF10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF10. Supported peripheral buses: General. |
| 52 | PF11 | Digital_IO | Signal terminal PF11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF11. Supported peripheral buses: General. |
| 53 | VDD33 | Power_In | Primary positive power supply input (VDD33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 54 | PF12 | Digital_IO | Signal terminal PF12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF12. Supported peripheral buses: General. |
| 55 | VCORE | Digital_IO | Signal terminal VCORE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCORE. Supported peripheral buses: General. |
| 56 | PF13 | Digital_IO | Signal terminal PF13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF13. Supported peripheral buses: General. |
| 57 | PF14 | Digital_IO | Signal terminal PF14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF14. Supported peripheral buses: General. |
| 58 | PF15 | Digital_IO | Signal terminal PF15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF15. Supported peripheral buses: General. |
| 59 | PF16 | Digital_IO | Signal terminal PF16 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF16. Supported peripheral buses: General. |
| 60 | PF17 | Digital_IO | Signal terminal PF17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF17. Supported peripheral buses: General. |
| 61 | PF18 | Digital_IO | Signal terminal PF18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF18. Supported peripheral buses: General. |
| 62 | VDD33 | Power_In | Primary positive power supply input (VDD33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 63 | TEST1 | Digital_IO | Signal terminal TEST1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TEST1. Supported peripheral buses: General. |
| 64 | TEST2 | Digital_IO | Signal terminal TEST2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TEST2. Supported peripheral buses: General. |







