CH340X (MSOP-10) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH340X

WCHID: C3035748MSOP-10 · 10 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH340X (MSOP-10)1UD+2UD -3GND4DTR#5CTS#10V39RXD8TXD7VCC6RTS#Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.212.77.62.5-2.5-7.6-12.7mm
2. 2D FOOTPRINT
12345678910E=3.00mm · Pitch e=0.50mmD=3.00mm-5-4-3-2-10123453210-1-2-3mm
3. 3D CAD MODEL
Package Body: 3.00mm × 3.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (10/10)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1UD+I/OMultiplexed I/O & Peripheral Pin UD+ (USB)
2UD -I/OMultiplexed I/O & Peripheral Pin UD - (USB)
3GNDGNDGround Reference Pin (GND)
4DTR#I/OMultiplexed I/O & Peripheral Pin DTR# (UART)
5CTS#I/OMultiplexed I/O & Peripheral Pin CTS# (UART)
6RTS#I/OMultiplexed I/O & Peripheral Pin RTS# (UART)
7VCCPowerPower Supply Input (VCC — 3.3V / 5.0V USB-UART Domain)
8TXDI/OMultiplexed I/O & Peripheral Pin TXD (UART)
9RXDI/OMultiplexed I/O & Peripheral Pin RXD (UART)
10V3PowerInternal 3.3V USB Transceiver Supply / LDO Bypass (V3)
PIN 1 UD+
I/O
Multiplexed I/O & Peripheral Pin UD+ (USB)
Design note: 直接连到USB总线的D+数据线 不要串联电阻 ,
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 6 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH340X (WCH · MSOP-10)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH340X (MSOP-10) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH340X (MSOP-10) - 2. Standard Pinout (Top View)
True package pinout (10 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH340X (MSOP-10) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH340X (MSOP-10) - 4. Package Dimensions (D×E×A)
MSOP-10 · 3.00×3.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH340X (MSOP-10) - 5. Recommended Land Pattern
IPC-7351B Footprint (10 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH340X (MSOP-10) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (6 figures · Page 1/1)
Showing 1–6 of 6 uncropped original figures for CH340
P1 · p01_fig011680×604px
CH340X (MSOP-10) — CH340 是一个USB 总线的转接芯片,实现USB 转串口或者USB 转打印口。 在串口方式下,CH340 提供常用的MODEM 联络信号,用于为计算机扩展异步串口,或者将普通的 串口设备直接升级到USB 总线。有关USB 转打印口的说明请参考手册(二)CH340DS2。 | 2、特点 | 异步串口UART/RS232/RS485 | 转换并口打印机为USB 打印机 | USB | 计算机 | 或者 其它 USB 主机 | CH340 转接芯片
CH340 是一个USB 总线的转接芯片,实现USB 转串口或者USB 转打印口。 在串口方式下,CH340 提供常用的MODEM 联络信号,用于为计算机扩展异步串口,或者将普通的 串口设备直接升级到USB 总线。有关USB 转打印口的说明请参考手册(二)CH340DS2。 | 2、特点 | 异步串口UART/RS232/RS485 | 转换并口打印机为USB 打印机 | USB | 计算机 | 或者 其它 USB 主机 | CH340 转接芯片
P6 · p06_fig011708×606px
CH340X (MSOP-10) — 对于CH340C/N/K/E/X/B 芯片,无需晶体X2 和电容C6 及C7。 在设计印刷线路板PCB 时,需要注意:退耦电容C8 和C9 尽量靠近CH340 的相连引脚;使D+和 D-信号线贴近平行布线,尽量在两侧提供地线或者覆铜,减少来自外界的信号干扰;尽量缩短XI 和 XO 引脚相关信号线的长度,为了减少高频干扰,可以在相关元器件周边环绕地线或者覆铜。
对于CH340C/N/K/E/X/B 芯片,无需晶体X2 和电容C6 及C7。 在设计印刷线路板PCB 时,需要注意:退耦电容C8 和C9 尽量靠近CH340 的相连引脚;使D+和 D-信号线贴近平行布线,尽量在两侧提供地线或者覆铜,减少来自外界的信号干扰;尽量缩短XI 和 XO 引脚相关信号线的长度,为了减少高频干扰,可以在相关元器件周边环绕地线或者覆铜。
P10 · p10_fig011658×468px
CH340X (MSOP-10) — 7.9. 单片机USB 一键下载(下图)
7.9. 单片机USB 一键下载(下图)
P10 · p10_fig021475×588px
CH340X (MSOP-10) — 上图是基于USB 转串口的多模式MCU 一键下载参考电路,无需手工设置或手动复位。 上图针对的MCU 类型:MCU 本身需支持串口一键下载,NRST 为低电平有效的复位输入端,BOOT0 默认低电平选择应用程序,高电平选择Boot-Loader 下载。例如32F103 等。
上图是基于USB 转串口的多模式MCU 一键下载参考电路,无需手工设置或手动复位。 上图针对的MCU 类型:MCU 本身需支持串口一键下载,NRST 为低电平有效的复位输入端,BOOT0 默认低电平选择应用程序,高电平选择Boot-Loader 下载。例如32F103 等。
P10 · p10_fig02P10
CH340X (MSOP-10) — Datasheet Page 10 (p10_fig02)
Datasheet Page 10 (p10_fig02)
P1 · p01_fig02All Packages in PDF
CH340X (MSOP-10) — 3、封装
3、封装

Technical Specifications & Part Details (CH340X)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Interface Bridge / Precision Clock & Timer IC
Detailed Overview:CH340X (MSOP-10) is a 10-pin interface bridge / precision clock & timer ic featuring a 3.00 × 3.00 × 1.10 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.3V to 5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART interfaces.
Operating Supply VoltageV_CC / V_DD
3.3V to 5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
USB 2.0 Full-Speed 12 Mbps (UART 50 bps ~ 2 Mbps)
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
3.00 × 3.00 × 1.10 mm (A1=0.08 mm)
Package family: TSSOP (MSOP-10)
Pin Count & Lead PitchN / e
10 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol10 auto-grouped pins
OK
IPC-7351B Land Pattern10 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (MSOP-10)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
3.00 × 3.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.10mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.25 mm
Pins / Total PadsTopology
10P / 10Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
C1
BOM
100nF (0.1µF) 50V X7R
0402 / 0603
Internal 3.3V LDO cap at V3 (Pin 4) — to GND at VCC=5V, or tie V3 directly to VCC at 3.3V.
C2, C3
BOM
100nF + 10µF
0603
Main VCC supply decoupling (Pin 16) from USB VBUS — place < 2mm from Pin 16.
Y1 + C4, C5
BOM
12MHz Crystal + 2× 22pF NP0
HC-49S / SMD-3225 + 0603
Mandatory 12MHz crystal for CH340G (Pins 7/8) — switch to CH340C to eliminate this crystal.
CH340C
WCH
100% Drop-in100% Pin-to-Pin SOP-16 (Built-in 12MHz clock) — shares SOP-16 PCB footprint with CH340G; leave Y1/22pF DNI.
CH340G
WCH
100% Drop-in100% Pin-to-Pin SOP-16 — requires external 12MHz crystal + two 22pF load caps on Pins 7-8.
CH340B
WCH
100% Drop-in100% Pin-to-Pin SOP-16 (Built-in 12MHz clock) — shares SOP-16 PCB footprint with CH340G; leave Y1/22pF DNI.

Technical Frequently Asked Questions (FAQ) — CH340X (MSOP-10)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH340X (MSOP-10)?

Manufactured by WCH, the CH340X is housed in a MSOP-10 package with 10 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 3.3V to 5V. Key pins include: 1 (UD+: Multiplexed I/O & Peripheral Pin UD+ (USB)), 2 (UD -: Multiplexed I/O & Peripheral Pin UD - (USB)), 3 (GND: Ground Reference Pin (GND)), 4 (DTR#: Multiplexed I/O & Peripheral Pin DTR# (UART)), 5 (CTS#: Multiplexed I/O & Peripheral Pin CTS# (UART)), 6 (RTS#: Multiplexed I/O & Peripheral Pin RTS# (UART)).

What are the IPC-7351B PCB Footprint dimensions for CH340X?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH340X (MSOP-10) has a nominal body envelope of 3.00 × 3.00 mm, pitch e = 0.50 mm, and 10 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH340X?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH340X (WCH, MSOP-10) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (10 pins) & CH340 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1UD+Digital_IOSignal terminal UD+ (I/O, 3.3V / 5.0V USB-UART Domain domain). Multiplexed alternate functions: UD+. Supported peripheral buses: USB.
2UD -Digital_IOSignal terminal UD - (I/O, 3.3V / 5.0V USB-UART Domain domain). Multiplexed alternate functions: UD -. Supported peripheral buses: USB.
3GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
4DTR#Digital_IOSignal terminal DTR# (I/O, 3.3V / 5.0V USB-UART Domain domain). Multiplexed alternate functions: DTR#. Supported peripheral buses: UART.
5CTS#Digital_IOSignal terminal CTS# (I/O, 3.3V / 5.0V USB-UART Domain domain). Multiplexed alternate functions: CTS#. Supported peripheral buses: UART.
6RTS#Digital_IOSignal terminal RTS# (I/O, 3.3V / 5.0V USB-UART Domain domain). Multiplexed alternate functions: RTS#. Supported peripheral buses: UART.
7VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3V / 5.0V USB-UART Domain domain (Max rating: 5.5V).
8TXDDigital_IOSignal terminal TXD (I/O, 3.3V / 5.0V USB-UART Domain domain). Multiplexed alternate functions: TXD. Supported peripheral buses: UART.
9RXDDigital_IOSignal terminal RXD (I/O, 3.3V / 5.0V USB-UART Domain domain). Multiplexed alternate functions: RXD. Supported peripheral buses: UART.
10V3Power_OutInternal 3.3V LDO regulator node supplying the USB transceiver and clock generator.