ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — Symbol, Footprint IPC-7351B & 3D STEP Model

ESP32-S2-MINI-2-N4R2

ESPRESSIFID: C3013908SMD,20.5x15.4mm · 65 Pins · Pitch 0.85mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm)1GPIO02GND33V34IO05IO16IO27IO38IO49IO510IO611IO712IO813IO914IO1015IO1116IO1217IO1318IO1419IO1520IO1621IO1722IO1823IO1924IO2025IO2126IO26227NC28IO3329IO3430GND31IO3532IO3633IO3765GND64GND63GND62GND61GND60GND59GND58GND57GND56GND55GND54GND53GND52GND51GND50GND49GND48GND47GND46GND45EN44IO4643GND42GND41IO4540RXD039TXD038IO4237IO4136IO4035IO3934IO38Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.848.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3mm
2. 2D FOOTPRINT
ANTENNA KEEPOUT (4.8mm)61656463622827262524232221201918171629305857565554535251504948474659604342414039383736353433323144451514123456789101112136161616161616161E=15.40mm · Pitch e=0.85mmD=20.50mm-13-11-9-7-5-3-113579111315131197531-1-3-5-7-9-11-13-15mm
3. 3D CAD MODEL
Package Body: 15.40mm × 20.50mm · Pitch: 0.85mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (65/65)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1GPIO0I/OMultiplexed I/O & Peripheral Pin GPIO0 (General)
2GNDGNDGround Reference Pin (GND)
33V3PowerPower Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))
4IO0I/OMultiplexed I/O & Peripheral Pin IO0 (RTC/CLK)
5IO1I/OMultiplexed I/O & Peripheral Pin IO1 (RTC/CLK, TOUCH)
6IO2I/OMultiplexed I/O & Peripheral Pin IO2 (RTC/CLK, TOUCH)
7IO3I/OMultiplexed I/O & Peripheral Pin IO3 (RTC/CLK, TOUCH)
8IO4I/OMultiplexed I/O & Peripheral Pin IO4 (RTC/CLK, TOUCH)
9IO5I/OMultiplexed I/O & Peripheral Pin IO5 (RTC/CLK, TOUCH)
10IO6I/OMultiplexed I/O & Peripheral Pin IO6 (RTC/CLK, TOUCH)
11IO7I/OMultiplexed I/O & Peripheral Pin IO7 (RTC/CLK, TOUCH)
12IO8I/OMultiplexed I/O & Peripheral Pin IO8 (RTC/CLK, TOUCH)
13IO9I/OMultiplexed I/O & Peripheral Pin IO9 (ADC, RTC/CLK, TOUCH)
14IO10I/OMultiplexed I/O & Peripheral Pin IO10 (ADC, RTC/CLK, TOUCH)
15IO11I/OMultiplexed I/O & Peripheral Pin IO11 (ADC, RTC/CLK, TOUCH)
16IO12I/OMultiplexed I/O & Peripheral Pin IO12 (ADC, RTC/CLK, TOUCH)
17IO13I/OMultiplexed I/O & Peripheral Pin IO13 (ADC, RTC/CLK, TOUCH)
18IO14I/OMultiplexed I/O & Peripheral Pin IO14 (ADC, RTC/CLK, TOUCH)
19IO15I/OMultiplexed I/O & Peripheral Pin IO15 (ADC, RTC/CLK)
20IO16I/OMultiplexed I/O & Peripheral Pin IO16 (ADC, RTC/CLK)
21IO17I/OMultiplexed I/O & Peripheral Pin IO17 (UART, ADC, RTC/CLK)
22IO18I/OMultiplexed I/O & Peripheral Pin IO18 (UART, ADC, DAC, RTC/CLK)
23IO19I/OMultiplexed I/O & Peripheral Pin IO19 (ADC, RTC/CLK)
24IO20I/OMultiplexed I/O & Peripheral Pin IO20 (USB, ADC, RTC/CLK)
25IO21I/OMultiplexed I/O & Peripheral Pin IO21 (RTC/CLK)
26IO262I/OMultiplexed I/O & Peripheral Pin IO262 (SPI)
27NCI/OMultiplexed I/O & Peripheral Pin NC (General)
28IO33I/OMultiplexed I/O & Peripheral Pin IO33 (SPI)
29IO34IInput-Only Pin IO34 (SPI)
30GNDGNDGround Reference Pin (GND)
31IO35IInput-Only Pin IO35 (SPI)
32IO36IInput-Only Pin IO36 (SPI)
33IO37IInput-Only Pin IO37 (SPI)
34IO38IInput-Only Pin IO38 (SPI)
35IO39IInput-Only Pin IO39 (SWD/JTAG)
36IO40I/OMultiplexed I/O & Peripheral Pin IO40 (SWD/JTAG)
37IO41I/OMultiplexed I/O & Peripheral Pin IO41 (SWD/JTAG)
38IO42I/OMultiplexed I/O & Peripheral Pin IO42 (SWD/JTAG)
39TXD0I/OMultiplexed I/O & Peripheral Pin TXD0 (UART)
40RXD0I/OMultiplexed I/O & Peripheral Pin RXD0 (UART)
41IO45I/OMultiplexed I/O & Peripheral Pin IO45 (General)
42GNDGNDGround Reference Pin (GND)
43GNDGNDGround Reference Pin (GND)
44IO46I/OMultiplexed I/O & Peripheral Pin IO46 (General)
45ENISystem Enable & Hardware Reset (EN)
46GNDGNDGround Reference Pin (GND)
47GNDGNDGround Reference Pin (GND)
48GNDGNDGround Reference Pin (GND)
49GNDGNDExposed Thermal & Ground Pad (GND)
50GNDGNDGround Reference Pin (GND)
51GNDGNDGround Reference Pin (GND)
52GNDGNDGround Reference Pin (GND)
53GNDGNDGround Reference Pin (GND)
54GNDGNDGround Reference Pin (GND)
55GNDGNDGround Reference Pin (GND)
56GNDGNDGround Reference Pin (GND)
57GNDGNDExposed Thermal & Ground Pad (GND)
58GNDGNDGround Reference Pin (GND)
59GNDGNDGround Reference Pin (GND)
60GNDGNDGround Reference Pin (GND)
61GNDGNDGround Reference Pin (GND)
62GNDGNDGround Reference Pin (GND)
63GNDGNDGround Reference Pin (GND)
64GNDGNDGround Reference Pin (GND)
65GNDGNDExposed Thermal & Ground Pad (GND)
PIN 1 GPIO0
I/O
Multiplexed I/O & Peripheral Pin GPIO0 (General)
Design note: Signal terminal GPIO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO0. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 21 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ESP32-S2-MINI-2-N4R2 (ESPRESSIF · SMD,20.5x15.4mm)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) - 2. Standard Pinout (Top View)
True package pinout (65 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) - 4. Package Dimensions (D×E×A)
SMD,20.5x15.4mm · 15.40×20.50mm · Pitch 0.85mmExpand ›
5. Recommended Land PatternLAND PATTERN
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) - 5. Recommended Land Pattern
IPC-7351B Footprint (73 Pads)Expand ›
6. Application SchematicSCHEMATIC
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (21 figures · Page 1/2)
Showing 1–12 of 21 uncropped original figures for ESP32-S2-MINI
P1 · p01_fig01EXACT PACKAGE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — ESP32-S2-MINI-2 ESP32-S2-MINI-2U
ESP32-S2-MINI-2 ESP32-S2-MINI-2U
P1 · p01_fig02EXACT PACKAGE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — ESP32-S2-MINI-2 ESP32-S2-MINI-2U
ESP32-S2-MINI-2 ESP32-S2-MINI-2U
P10 · p10_fig01EXACT PACKAGE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — 图3: ESP32-S2-MINI-2 管脚布局(顶视图)
图3: ESP32-S2-MINI-2 管脚布局(顶视图)
P21 · p21_fig01EXACT PACKAGE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — 图5: ESP32-S2-MINI-2 原理图
图5: ESP32-S2-MINI-2 原理图
P21 · p21_fig02EXACT PACKAGE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — 40MHz(±10ppm)
40MHz(±10ppm)
P21 · p21_fig03EXACT PACKAGE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — 图5: ESP32-S2-MINI-2 原理图
图5: ESP32-S2-MINI-2 原理图
P21 · p21_fig04EXACT PACKAGE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — 图5: ESP32-S2-MINI-2 原理图
图5: ESP32-S2-MINI-2 原理图
P24 · p24_fig01EXACT PACKAGE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — 图8: ESP32-S2-MINI-2 模组尺寸
图8: ESP32-S2-MINI-2 模组尺寸
P26 · p26_fig01EXACT PACKAGE
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — 图10: ESP32-S2-MINI-2 推荐PCB 封装图形
图10: ESP32-S2-MINI-2 推荐PCB 封装图形
P1 · p01_fig03336×313px
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — 5) ESPRESSIF
5) ESPRESSIF
P1 · p01_fig01P1
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P23 · p23_fig011819×1283px
ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) — 图7: 外围设计原理图
图7: 外围设计原理图
Page 1 / 2 (21 extracted figures)

Technical Specifications & Part Details (ESP32-S2-MINI-2-N4R2)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Wireless Wi-Fi / Bluetooth LE SoC Module
Detailed Overview:ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) is a 65-pin wireless wi-fi / bluetooth le soc module featuring a 20.00 × 15.40 × 2.40 mm mechanical envelope (lead pitch e = 0.85 mm). Rated for 3.0 ~ 3.6 V supply operation across 85 °C – 105 °C with integrated Wi-Fi, USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, RTC/CLK, SWD/JTAG, TOUCH interfaces.
Operating Supply VoltageV_CC / V_DD
3.0 ~ 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
85 °C – 105 °C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
2.4 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_TX(peak) ≈ 310 mA @ 3.3V | Deep-Sleep ≈ 10 µA | I_GPIO(max) = 40 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
20.00 × 15.40 × 2.40 mm (A1=0.00 mm)
Package family: CASTELLATED_MODULE (SMD,20.5x15.4mm)
Pin Count & Lead PitchN / e
65 Pins | Pitch e = 0.85 mm (33.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Wi-Fi, USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, RTC/CLK, SWD/JTAG, TOUCH
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (GPIO0, IO0, IO45, IO46): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol65 auto-grouped pins
OK
IPC-7351B Land Pattern73 pads · Pitch 0.85mm
OK
IPC-7525 60% Solder PasteEPAD 4.50×4.50mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SMD,20.5x15.4mm)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
20.50 × 15.40 mm
Height (A) & Pitch (e)IPC-7351B
A=2.40mm · e=0.85mm
Pad Size (W × L)Level B
0.40 × 0.80 mm
Pins / Total PadsTopology
65P / 73Pad (CASTELLATED_MODULE)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
C1, C2
BOM
22µF (or 10µF) X5R + 100nF X7R
0805 + 0402
3V3 supply decoupling for ~500mA Wi-Fi TX bursts — place closest to 3V3 pin; supply must deliver >= 600mA.
R_en + C_en
BOM
R = 10kΩ to 3V3 + C = 1µF to GND
0402 / 0603
Power-On Reset RC delay at EN (CHIP_PU) — 1µF capacitor at EN is REQUIRED for reliable cold boot.
R_boot + SW1
BOM
10kΩ Pull-up + BOOT button
0402 + SMD
Firmware boot-mode strap (IO0 on ESP32/S2/S3, IO9 on ESP32-C3) — on C3 pull IO8 high via 10kΩ for UART/USB download.
D_esd
BOM
USBLC6-2SC6 / LESD5D5.0CT1G
SOT-23-6 / SOD-523
ESD surge protection on USB D+/D- — place right next to USB Type-C connector before IO18/IO19/IO20.
ESP32-S3-MINI-1-N8 / 1U-N4R2
Espressif
100% Drop-inSame 15.4×15.4mm 65-pad footprint as ESP32-S2-MINI-2 — verify USB GPIO 19/20 pin mapping.

Technical Frequently Asked Questions (FAQ) — ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm)?

Manufactured by ESPRESSIF, the ESP32-S2-MINI-2-N4R2 is housed in a SMD,20.5x15.4mm package with 65 pins and a 0.85 mm lead pitch, supporting a VCC supply range of 3.0 ~ 3.6 V. Key pins include: 1 (GPIO0: Multiplexed I/O & Peripheral Pin GPIO0 (General)), 2 (GND: Ground Reference Pin (GND)), 3 (3V3: Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))), 4 (IO0: Multiplexed I/O & Peripheral Pin IO0 (RTC/CLK)), 5 (IO1: Multiplexed I/O & Peripheral Pin IO1 (RTC/CLK, TOUCH)), 6 (IO2: Multiplexed I/O & Peripheral Pin IO2 (RTC/CLK, TOUCH)).

What are the IPC-7351B PCB Footprint dimensions for ESP32-S2-MINI-2-N4R2?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ESP32-S2-MINI-2-N4R2 (SMD,20.5x15.4mm) has a nominal body envelope of 15.40 × 20.50 mm, pitch e = 0.85 mm, and 73 copper pads plus a central exposed thermal pad (EPAD) of 4.50 × 4.50 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ESP32-S2-MINI-2-N4R2?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ESP32-S2-MINI-2-N4R2 (ESPRESSIF, SMD,20.5x15.4mm) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (65 pins) & ESP32-S2-MINI Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1GPIO0Digital_IOSignal terminal GPIO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO0. Supported peripheral buses: General.
2GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
33V3Power_InPrimary positive power supply input (3V3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
4IO0Digital_IOSignal terminal IO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO0. Supported peripheral buses: RTC/CLK.
5IO1Digital_IOSignal terminal IO1 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO1. Supported peripheral buses: RTC/CLK, TOUCH.
6IO2Digital_IOSignal terminal IO2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO2. Supported peripheral buses: RTC/CLK, TOUCH.
7IO3Digital_IOSignal terminal IO3 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO3. Supported peripheral buses: RTC/CLK, TOUCH.
8IO4Digital_IOSignal terminal IO4 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO4. Supported peripheral buses: RTC/CLK, TOUCH.
9IO5Digital_IOSignal terminal IO5 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO5. Supported peripheral buses: RTC/CLK, TOUCH.
10IO6Digital_IOSignal terminal IO6 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO6. Supported peripheral buses: RTC/CLK, TOUCH.
11IO7Digital_IOSignal terminal IO7 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO7. Supported peripheral buses: RTC/CLK, TOUCH.
12IO8Digital_IOSignal terminal IO8 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO8. Supported peripheral buses: RTC/CLK, TOUCH.
13IO9Digital_IOSignal terminal IO9 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO9, GPIO9. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
14IO10Digital_IOSignal terminal IO10 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO10, GPIO10, TOUCH10. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
15IO11Digital_IOSignal terminal IO11 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO11, GPIO11, TOUCH11. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
16IO12Digital_IOSignal terminal IO12 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO12, GPIO12, TOUCH12. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
17IO13Digital_IOSignal terminal IO13 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO13, GPIO13, TOUCH13. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
18IO14Digital_IOSignal terminal IO14 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO14, GPIO14, TOUCH14. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
19IO15Digital_IOSignal terminal IO15 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO15, GPIO15, U0RTS. Supported peripheral buses: ADC, RTC/CLK.
20IO16Digital_IOSignal terminal IO16 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO16, GPIO16, U0CTS. Supported peripheral buses: ADC, RTC/CLK.
21IO17Digital_IOSignal terminal IO17 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO17, GPIO17, U1TXD. Supported peripheral buses: UART, ADC, RTC/CLK.
22IO18Digital_IOSignal terminal IO18 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7. Supported peripheral buses: UART, ADC, DAC, RTC/CLK.
23IO19Digital_IOSignal terminal IO19 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8. Supported peripheral buses: ADC, RTC/CLK.
24IO20Digital_IOSignal terminal IO20 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1. Supported peripheral buses: USB, ADC, RTC/CLK.
25IO21Digital_IOSignal terminal IO21 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO21. Supported peripheral buses: RTC/CLK.
26IO262Digital_IOSignal terminal IO262 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPICS1, GPIO26. Supported peripheral buses: SPI.
27NCNCSignal terminal NC (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
28IO33Digital_IOSignal terminal IO33 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO4, GPIO33, FSPIHD. Supported peripheral buses: SPI.
29IO34Digital_IOSignal terminal IO34 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO5, GPIO34, FSPICS0. Supported peripheral buses: SPI.
30GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
31IO35Digital_IOSignal terminal IO35 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO6, GPIO35, FSPID. Supported peripheral buses: SPI.
32IO36Digital_IOSignal terminal IO36 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO7, GPIO36, FSPICLK. Supported peripheral buses: SPI.
33IO37Digital_IOSignal terminal IO37 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIDQS, GPIO37, FSPIQ. Supported peripheral buses: SPI.
34IO38Digital_IOSignal terminal IO38 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO38, FSPIWP. Supported peripheral buses: SPI.
35IO39Digital_IOSignal terminal IO39 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTCK, GPIO39, CLK_OUT3. Supported peripheral buses: SWD/JTAG.
36IO40Digital_IOSignal terminal IO40 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTDO, GPIO40, CLK_OUT2. Supported peripheral buses: SWD/JTAG.
37IO41Digital_IOSignal terminal IO41 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTDI, GPIO41, CLK_OUT1. Supported peripheral buses: SWD/JTAG.
38IO42Digital_IOSignal terminal IO42 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTMS, GPIO42. Supported peripheral buses: SWD/JTAG.
39TXD0Digital_IOSignal terminal TXD0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: U0TXD, GPIO43, CLK_OUT1. Supported peripheral buses: UART.
40RXD0Digital_IOSignal terminal RXD0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: U0RXD, GPIO44, CLK_OUT2. Supported peripheral buses: UART.
41IO45Digital_IOSignal terminal IO45 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO45. Supported peripheral buses: General.
42GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
43GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
44IO46Digital_IOSignal terminal IO46 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO46. Supported peripheral buses: General.
45ENDigital_IOChip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset.
46GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
47GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
48GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
49GNDGNDBottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
50GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
51GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
52GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
53GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
54GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
55GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
56GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
57GNDGNDBottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
58GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
59GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
60GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
61GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
62GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
63GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
64GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.