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STM32F469ZIT6 (LQFP-144(20x20)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F469ZIT6

STID: C2969916LQFP-144(20x20) · 144 Pins · Pitch 0.50mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F469ZIT6 (LQFP-144(20x20))1PE32PE43PE54PE65VBAT6PC137PC14OSC32 IN8IO09PF010PF111PF212PF313PF414PF515VSS16VDD17PF1018PH0OSC IN -_19PH1OSC OUT -20NRST21PC022PC123PC224PC325VDD26VSSA27VREF+28VDDA29PA0WKUP(PA0)30PA131PA232PA333VSS34VDD35PA436PA537PA638PA739PC440PC541PB042PB143PB2 - BOOT1(44PF1145PF1246VDD47PF1348PF1449PF1550PG051PG152PE753PE854PE955VSS56VDD57PE1058PE1159PE1260PE1361PE1462PE1563PB1064PB1165VCAP166VDD67PB1268PB1369PB1470PB1571PD872PD9144PE2143VDD142PDR_ON141PE1140PE0139PB9138PB8137BOOT0136PB7135PB6134PB5133PB4(NJTRST)132PB3(JTDO/TRA131PG15130VDD129VSS128PG12127PG11126PG10125PG9124PD6123VDD122VSS121PD5120PD4119PD3118PD2117PD1116PD0115PC12114PC11113PC10112PA15(JTDI)111PA14(JTCK - 110VDD109VSS108VCAP2107PA13(JTMS - 106PA12105PA11104PA10103PA9102PA8101PC9100PC899PC798PC697VDDUSB96PG895PG794PG693PG592PG491PG390PG289DSIHOST_D1N88DSIHOST_D1P87VDD12DSI86DSIHOST_CKN85DSIHOST_CKP84VSSDSI83DSIHOST_D0N82DSIHOST_D0P81VCAPDSI80VDDDSI79PD1578PD1477VDD76VSS75PD1274PD1173PD10Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.896.591.486.481.376.271.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1-76.2-81.3-86.4-91.4-96.5mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144E=20.00mm · Pitch e=0.50mmD=20.00mm-17-15-13-11-9-7-5-3-113579111315171715131197531-1-3-5-7-9-11-13-15-17mm
3. 3D CAD MODEL
Package Body: 20.00mm × 20.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (144/144)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
2PE4I/OMultiplexed I/O & Peripheral Pin PE4 (SPI)
3PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI)
4PE6I/OMultiplexed I/O & Peripheral Pin PE6 (SPI)
5VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
6PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
7PC14OSC32 IN -_ (PC14)I/OMultiplexed I/O & Peripheral Pin PC14OSC32 IN -_ (PC14) (RTC/CLK)
8IO0I/OGPIO0 / RTC_GPIO0 (Chip Boot Mode Strapping Pin)
9PF0I/OMultiplexed I/O & Peripheral Pin PF0 (I2C)
10PF1I/OMultiplexed I/O & Peripheral Pin PF1 (I2C)
11PF2I/OMultiplexed I/O & Peripheral Pin PF2 (I2C)
12PF3I/OMultiplexed I/O & Peripheral Pin PF3 (ADC)
13PF4I/OMultiplexed I/O & Peripheral Pin PF4 (ADC)
14PF5I/OMultiplexed I/O & Peripheral Pin PF5 (ADC)
15VSSGNDGround Reference Pin (VSS)
16VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
17PF10I/OMultiplexed I/O & Peripheral Pin PF10 (ADC)
18PH0OSC IN -_ (PH0)I/OMultiplexed I/O & Peripheral Pin PH0OSC IN -_ (PH0) (RTC/CLK)
19PH1OSC OUT -_ (PH1)I/OMultiplexed I/O & Peripheral Pin PH1OSC OUT -_ (PH1) (RTC/CLK)
20NRSTISystem Enable & Hardware Reset (NRST)
21PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC)
22PC1I/OMultiplexed I/O & Peripheral Pin PC1 (SPI, ADC)
23PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC)
24PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC)
25VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
26VSSAGNDGround Reference Pin (VSSA)
27VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
28VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
29PA0WKUP(PA0) -I/OMultiplexed I/O & Peripheral Pin PA0WKUP(PA0) - (UART, ADC, PWM)
30PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
31PA2I/OMultiplexed I/O & Peripheral Pin PA2 (ADC, PWM)
32PA3I/OMultiplexed I/O & Peripheral Pin PA3 (ADC, PWM)
33VSSGNDGround Reference Pin (VSS)
34VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
35PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
36PA5I/OMultiplexed I/O & Peripheral Pin PA5 (ADC, DAC, PWM)
37PA6I/OMultiplexed I/O & Peripheral Pin PA6 (ADC)
38PA7I/OMultiplexed I/O & Peripheral Pin PA7 (ADC, PWM)
39PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
40PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
41PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, ADC, PWM)
42PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
43PB2 - BOOT1(PB2)I/OMultiplexed I/O & Peripheral Pin PB2 - BOOT1(PB2) (General)
44PF11I/OMultiplexed I/O & Peripheral Pin PF11 (SPI)
45PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
46VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
47PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
48PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
49PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
50PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
51PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
52PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
53PE8I/OMultiplexed I/O & Peripheral Pin PE8 (PWM)
54PE9I/OMultiplexed I/O & Peripheral Pin PE9 (PWM)
55VSSGNDGround Reference Pin (VSS)
56VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
57PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
58PE11I/OMultiplexed I/O & Peripheral Pin PE11 (PWM)
59PE12I/OMultiplexed I/O & Peripheral Pin PE12 (PWM)
60PE13I/OMultiplexed I/O & Peripheral Pin PE13 (PWM)
61PE14I/OMultiplexed I/O & Peripheral Pin PE14 (PWM)
62PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
63PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, PWM)
64PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, PWM)
65VCAP1I/OMultiplexed I/O & Peripheral Pin VCAP1 (General)
66VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
67PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI)
68PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
69PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
70PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, PWM, RTC/CLK)
71PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
72PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
73PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART)
74PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART)
75PD12I/OMultiplexed I/O & Peripheral Pin PD12 (PWM)
76VSSGNDGround Reference Pin (VSS)
77VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
78PD14I/OMultiplexed I/O & Peripheral Pin PD14 (PWM)
79PD15I/OMultiplexed I/O & Peripheral Pin PD15 (PWM)
80VDDDSIPowerPower Supply Input (VDDDSI — 3.3V VDD (Max 4.0V))
81VCAPDSII/OMultiplexed I/O & Peripheral Pin VCAPDSI (General)
82DSIHOST_D0PI/OMultiplexed I/O & Peripheral Pin DSIHOST_D0P (General)
83DSIHOST_D0NI/OMultiplexed I/O & Peripheral Pin DSIHOST_D0N (General)
84VSSDSIGNDGround Reference Pin (VSSDSI)
85DSIHOST_CKPI/OMultiplexed I/O & Peripheral Pin DSIHOST_CKP (General)
86DSIHOST_CKNI/OMultiplexed I/O & Peripheral Pin DSIHOST_CKN (General)
87VDD12DSIPowerPower Supply Input (VDD12DSI — 3.3V VDD (Max 4.0V))
88DSIHOST_D1PI/OMultiplexed I/O & Peripheral Pin DSIHOST_D1P (General)
89DSIHOST_D1NI/OMultiplexed I/O & Peripheral Pin DSIHOST_D1N (General)
90PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
91PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
92PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
93PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
94PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
95PG7I/OMultiplexed I/O & Peripheral Pin PG7 (UART)
96PG8I/OMultiplexed I/O & Peripheral Pin PG8 (SPI)
97VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
98PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
99PC7I/OMultiplexed I/O & Peripheral Pin PC7 (PWM)
100PC8I/OMultiplexed I/O & Peripheral Pin PC8 (PWM)
101PC9I/OMultiplexed I/O & Peripheral Pin PC9 (PWM, RTC/CLK)
102PA8I/OMultiplexed I/O & Peripheral Pin PA8 (I2C, RTC/CLK)
103PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, SPI, PWM)
104PA10I/OMultiplexed I/O & Peripheral Pin PA10 (PWM)
105PA11I/OMultiplexed I/O & Peripheral Pin PA11 (PWM, CAN)
106PA12I/OMultiplexed I/O & Peripheral Pin PA12 (CAN)
107PA13(JTMS - SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13(JTMS - SWDIO) (SWD/JTAG)
108VCAP2I/OMultiplexed I/O & Peripheral Pin VCAP2 (General)
109VSSGNDGround Reference Pin (VSS)
110VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
111PA14(JTCK - SWCLK)I/OMultiplexed I/O & Peripheral Pin PA14(JTCK - SWCLK) (SWD/JTAG)
112PA15(JTDI)I/OMultiplexed I/O & Peripheral Pin PA15(JTDI) (SPI, SWD/JTAG)
113PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
114PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART)
115PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
116PD0I/OMultiplexed I/O & Peripheral Pin PD0 (CAN)
117PD1I/OMultiplexed I/O & Peripheral Pin PD1 (CAN)
118PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
119PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
120PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART)
121PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
122VSSGNDGround Reference Pin (VSS)
123VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
124PD6I/OMultiplexed I/O & Peripheral Pin PD6 (SPI)
125PG9I/OMultiplexed I/O & Peripheral Pin PG9 (UART)
126PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
127PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
128PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART, SPI)
129VSSGNDGround Reference Pin (VSS)
130VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
131PG15I/OMultiplexed I/O & Peripheral Pin PG15 (UART)
132PB3(JTDO/TRA CESWO)I/OMultiplexed I/O & Peripheral Pin PB3(JTDO/TRA CESWO) (SPI, PWM, SWD/JTAG)
133PB4(NJTRST)I/OMultiplexed I/O & Peripheral Pin PB4(NJTRST) (SPI, SWD/JTAG)
134PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, PWM, CAN)
135PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, PWM)
136PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, PWM)
137BOOT0IInput-Only Pin BOOT0 (General)
138PB8I/OMultiplexed I/O & Peripheral Pin PB8 (UART, I2C, PWM)
139PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, I2C, PWM, CAN)
140PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
141PE1I/OMultiplexed I/O & Peripheral Pin PE1 (UART)
142PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
143VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
144PE2I/OMultiplexed I/O & Peripheral Pin PE2 (UART, SPI)
PIN 1 PE3
I/O
Multiplexed I/O & Peripheral Pin PE3 (General)
Design note: Alt: TRACED0 SAI1 SD B ,__ , FMC_A19EVENTOUT ,
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 14 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F469ZIT6 (ST · LQFP-144(20x20))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F469ZIT6 (LQFP-144(20x20)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F469ZIT6 (LQFP-144(20x20)) - 2. Standard Pinout (Top View)
True package pinout (144 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F469ZIT6 (LQFP-144(20x20)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F469ZIT6 (LQFP-144(20x20)) - 4. Package Dimensions (D×E×A)
LQFP-144(20x20) · 20.00×20.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F469ZIT6 (LQFP-144(20x20)) - 5. Recommended Land Pattern
IPC-7351B Footprint (144 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F469ZIT6 (LQFP-144(20x20)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (14 figures · Page 1/2)
Showing 1–12 of 14 uncropped original figures for STM32F469
P49 · p49_fig01EXACT PACKAGE
STM32F469ZIT6 (LQFP-144(20x20)) — Figure 14. STM32F46x LQFP144 pinout BOOT0 135
Figure 14. STM32F46x LQFP144 pinout BOOT0 135
P197 · p197_fig01EXACT PACKAGE
STM32F469ZIT6 (LQFP-144(20x20)) — Figure 84. LQFP144 - Recommended footprint
Figure 84. LQFP144 - Recommended footprint
P197 · p197_fig02EXACT PACKAGE
STM32F469ZIT6 (LQFP-144(20x20)) — Figure 85. LQFP144 marking example (package top view)
Figure 85. LQFP144 marking example (package top view)
P1 · p01_fig02883×395px
STM32F469ZIT6 (LQFP-144(20x20)) — May 2021 DS11189 Rev 7 1/220
May 2021 DS11189 Rev 7 1/220
P49 · p49_fig01P49
STM32F469ZIT6 (LQFP-144(20x20)) — Datasheet Page 49 (p49_fig01)
Datasheet Page 49 (p49_fig01)
P54 · p54_fig011751×1626px
STM32F469ZIT6 (LQFP-144(20x20)) — Figure 19. STM32F46x LQFP208 pinout PG15
Figure 19. STM32F46x LQFP208 pinout PG15
P90 · p90_fig011546×1725px
STM32F469ZIT6 (LQFP-144(20x20)) — Figure 24. Power supply scheme
Figure 24. Power supply scheme
P90 · p90_fig01P90
STM32F469ZIT6 (LQFP-144(20x20)) — Datasheet Page 90 (p90_fig01)
Datasheet Page 90 (p90_fig01)
P117 · p117_fig011546×497px
STM32F469ZIT6 (LQFP-144(20x20)) — Figure 31. Typical application with an 8 MHz crystal
Figure 31. Typical application with an 8 MHz crystal
P118 · p118_fig011546×517px
STM32F469ZIT6 (LQFP-144(20x20)) — Figure 32. Typical application with a 32.768 kHz crystal
Figure 32. Typical application with a 32.768 kHz crystal
P197 · p197_fig01P197
STM32F469ZIT6 (LQFP-144(20x20)) — Datasheet Page 197 (p197_fig01)
Datasheet Page 197 (p197_fig01)
P210 · p210_fig011546×1331px
STM32F469ZIT6 (LQFP-144(20x20)) — Figure 96. LQFP208 - Recommended footprint 208 157
Figure 96. LQFP208 - Recommended footprint 208 157
Page 1 / 2 (14 extracted figures)

Technical Specifications & Part Details (STM32F469ZIT6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F469ZIT6 (LQFP-144(20x20)) is a 144-pin embedded microcontroller unit (mcu) featuring a 20.00 × 20.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.7 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, CAN, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.7 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
180 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
104 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
20.00 × 20.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-144(20x20))
Pin Count & Lead PitchN / e
144 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, CAN, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PB2 - BOOT1(PB2), BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol144 auto-grouped pins
OK
IPC-7351B Land Pattern144 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-144(20x20))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
20.00 × 20.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.35 × 1.35 mm
Pins / Total PadsTopology
144P / 144Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-144(20x20)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F469ZIT6 (LQFP-144(20x20))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F469ZIT6 (LQFP-144(20x20))?

Manufactured by ST, the STM32F469ZIT6 is housed in a LQFP-144(20x20) package with 144 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: 1 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), 2 (PE4: Multiplexed I/O & Peripheral Pin PE4 (SPI)), 3 (PE5: Multiplexed I/O & Peripheral Pin PE5 (SPI)), 4 (PE6: Multiplexed I/O & Peripheral Pin PE6 (SPI)), 5 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))), 6 (PC13: Multiplexed I/O & Peripheral Pin PC13 (RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for STM32F469ZIT6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F469ZIT6 (LQFP-144(20x20)) has a nominal body envelope of 20.00 × 20.00 mm, pitch e = 0.50 mm, and 144 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F469ZIT6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F469ZIT6 (ST, LQFP-144(20x20)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (144 pins) & STM32F469 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
2PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI.
3PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO_SAI1SCKA. Supported peripheral buses: SPI.
4PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI_SAI1SDA. Supported peripheral buses: SPI.
5VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
6PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
7PC14OSC32 IN -_ (PC14)Digital_IOSignal terminal PC14OSC32 IN -_ (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14OSC32 IN -_ (PC14). Supported peripheral buses: RTC/CLK.
8IO0Digital_IOGPIO0 / RTC_GPIO0 (Chip Boot Mode Strapping Pin)
9PF0Digital_IOSignal terminal PF0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF0. Supported peripheral buses: I2C.
10PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: I2C.
11PF2Digital_IOSignal terminal PF2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: I2C.
12PF3Digital_IOSignal terminal PF3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: ADC.
13PF4Digital_IOSignal terminal PF4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: ADC.
14PF5Digital_IOSignal terminal PF5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: ADC.
15VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
16VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
17PF10Digital_IOSignal terminal PF10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF10. Supported peripheral buses: ADC.
18PH0OSC IN -_ (PH0)Digital_IOSignal terminal PH0OSC IN -_ (PH0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0OSC IN -_ (PH0). Supported peripheral buses: RTC/CLK.
19PH1OSC OUT -_ (PH1)Digital_IOSignal terminal PH1OSC OUT -_ (PH1) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH1OSC OUT -_ (PH1). Supported peripheral buses: RTC/CLK.
20NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
21PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC.
22PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, ADC.
23PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOI2S2EXTSD. Supported peripheral buses: SPI, ADC.
24PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, ADC.
25VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
26VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
27VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
28VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
29PA0WKUP(PA0) -Digital_IOSignal terminal PA0WKUP(PA0) - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA0WKUP(PA0) -. Supported peripheral buses: UART, ADC, PWM.
30PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, PWM.
31PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: ADC, PWM.
32PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: ADC, PWM.
33VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
34VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
35PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, ADC, DAC.
36PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: ADC, DAC, PWM.
37PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: ADC.
38PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: ADC, PWM.
39PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
40PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC.
41PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: UART, ADC, PWM.
42PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM.
43PB2 - BOOT1(PB2)Digital_IOSignal terminal PB2 - BOOT1(PB2) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB2 - BOOT1(PB2). Supported peripheral buses: General.
44PF11Digital_IOSignal terminal PF11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI5_MOSI. Supported peripheral buses: SPI.
45PF12Digital_IOSignal terminal PF12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF12. Supported peripheral buses: General.
46VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
47PF13Digital_IOSignal terminal PF13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF13. Supported peripheral buses: General.
48PF14Digital_IOSignal terminal PF14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF14. Supported peripheral buses: General.
49PF15Digital_IOSignal terminal PF15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF15. Supported peripheral buses: General.
50PG0Digital_IOSignal terminal PG0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG0. Supported peripheral buses: General.
51PG1Digital_IOSignal terminal PG1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG1. Supported peripheral buses: General.
52PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
53PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: PWM.
54PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: PWM.
55VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
56VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
57PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: PWM.
58PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: PWM.
59PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE12. Supported peripheral buses: PWM.
60PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: PWM.
61PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: PWM.
62PE15Digital_IOSignal terminal PE15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
63PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, PWM.
64PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: UART, PWM.
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