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STM32G473VEH6 (TFBGA-100) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G473VEH6

STID: C2965492TFBGA-100 · 100 Pins · Pitch 0.80mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G473VEH6 (TFBGA-100)A1PE4A2PB9A3PB8BOOT0 -A4PB6A5PB3A6PD6A7PD5A8PD4A9PD1A10PC12B1PE5B2PE3B3PE1B4PB7B5PB5B6PD7B7PD2B8PD0B9PA15B10PA14C1PC14 - OSC32C2PE6C3PE2C4PE0C5PB4C6PD3C7PC11C8PC10C9PA12C10PA11D1PC15 - OSC32D2VSSD3VBATD4PC13D5VDDD6VSSD7VDDD8PA13D9PA10D10PA9E1PF0OSC IN -_E2PF1 - OSC_OUE3PF9E4PF10E5VSSE6VSSE7VSSE8PC8E9PC9E10PA8K10PD8K9PB15K8PB12K7PE13K6PE10K5VREF+K4VSSAK3PB1K2PC4K1PA7J10PD12J9PB13J8PB10J7PE14J6PE11J5VDDAJ4PB2J3PC5J2PA6J1PA5H10PD11H9PB14H8PB11H7PE15H6PE9H5PE8H4PB0H3PA3H2PA4H1PA2G10PD15G9PD13G8PD9G7PD10G6PE12G5PE7G4PA0G3PF2G2PA1G1PC3F10PC7F9PC6F8PD14F7VDDF6VSSF5VDDF4PC1F3PG10NRST -F2PC0F1PC2Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.868.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1A2B2C2D2E2F2G2H2J2K2A3B3C3D3E3F3G3H3J3K3A4B4C4D4E4F4G4H4J4K4A5B5C5D5E5F5G5H5J5K5A6B6C6D6E6F6G6H6J6K6A7B7C7D7E7F7G7H7J7K7A8B8C8D8E8F8G8H8J8K8A9B9C9D9E9F9G9H9J9K9A10B10C10D10E10F10G10H10J10K10E=8.00mm · Pitch e=0.80mmD=8.00mm-6-5-4-3-2-101234566543210-1-2-3-4-5-6mm
3. 3D CAD MODEL
Package Body: 8.00mm × 8.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (100/100)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PE4I/OMultiplexed I/O & Peripheral Pin PE4 (SPI, PWM)
A2PB9I/OMultiplexed I/O & Peripheral Pin PB9 (I2C, PWM)
A3PB8BOOT0 -I/OMultiplexed I/O & Peripheral Pin PB8BOOT0 - (UART, I2C, PWM)
A4PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, PWM)
A5PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI, PWM, SWD/JTAG)
A6PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART, I2C, PWM)
A7PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
A8PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART, PWM)
A9PD1I/OMultiplexed I/O & Peripheral Pin PD1 (PWM)
A10PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI, PWM)
B1PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI, PWM)
B2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (SPI, PWM)
B3PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
B4PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C, PWM)
B5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C, PWM)
B6PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART, PWM)
B7PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
B8PD0I/OMultiplexed I/O & Peripheral Pin PD0 (PWM)
B9PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI, PWM, SWD/JTAG)
B10PA14I/OMultiplexed I/O & Peripheral Pin PA14 (UART, I2C, PWM, SWD/JTAG)
C1PC14 - OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (RTC/CLK)
C2PE6I/OMultiplexed I/O & Peripheral Pin PE6 (SPI, I2C, RTC/CLK)
C3PE2I/OMultiplexed I/O & Peripheral Pin PE2 (PWM)
C4PE0I/OMultiplexed I/O & Peripheral Pin PE0 (UART)
C5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (UART, SPI, PWM)
C6PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART)
C7PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI, I2C, PWM)
C8PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI, PWM)
C9PA12I/OMultiplexed I/O & Peripheral Pin PA12 (USB, UART, PWM)
C10PA11I/OMultiplexed I/O & Peripheral Pin PA11 (USB, UART, SPI, PWM)
D1PC15 - OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15 - OSC32_OUT (RTC/CLK)
D2VSSGNDGround Reference Pin (VSS)
D3VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
D4PC13I/OMultiplexed I/O & Peripheral Pin PC13 (PWM, RTC/CLK)
D5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D6VSSGNDGround Reference Pin (VSS)
D7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D8PA13I/OMultiplexed I/O & Peripheral Pin PA13 (UART, I2C, PWM, SWD/JTAG)
D9PA10I/OMultiplexed I/O & Peripheral Pin PA10 (USB, UART, SPI, I2C, PWM)
D10PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, I2C, ADC, PWM)
E1PF0OSC IN -_I/OMultiplexed I/O & Peripheral Pin PF0OSC IN -_ (SPI, I2C, ADC, PWM, RTC/CLK)
E2PF1 - OSC_OUTI/OMultiplexed I/O & Peripheral Pin PF1 - OSC_OUT (SPI, ADC, RTC/CLK)
E3PF9I/OMultiplexed I/O & Peripheral Pin PF9 (SPI, PWM)
E4PF10I/OMultiplexed I/O & Peripheral Pin PF10 (SPI)
E5VSSGNDGround Reference Pin (VSS)
E6VSSGNDGround Reference Pin (VSS)
E7VSSGNDGround Reference Pin (VSS)
E8PC8I/OMultiplexed I/O & Peripheral Pin PC8 (I2C, PWM)
E9PC9I/OMultiplexed I/O & Peripheral Pin PC9 (I2C, PWM)
E10PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI, I2C, ADC, PWM, RTC/CLK)
F1PC2I/OMultiplexed I/O & Peripheral Pin PC2 (ADC, PWM)
F2PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC, PWM)
F3PG10NRST -I/OMultiplexed I/O & Peripheral Pin PG10NRST - (RTC/CLK)
F4PC1I/OMultiplexed I/O & Peripheral Pin PC1 (I2C, ADC, PWM)
F5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F6VSSGNDGround Reference Pin (VSS)
F7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F8PD14I/OMultiplexed I/O & Peripheral Pin PD14 (ADC, PWM)
F9PC6I/OMultiplexed I/O & Peripheral Pin PC6 (I2C, PWM)
F10PC7I/OMultiplexed I/O & Peripheral Pin PC7 (I2C, PWM)
G1PC3I/OMultiplexed I/O & Peripheral Pin PC3 (I2C, ADC, PWM)
G2PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM, RTC/CLK)
G3PF2I/OMultiplexed I/O & Peripheral Pin PF2 (I2C)
G4PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
G5PE7I/OMultiplexed I/O & Peripheral Pin PE7 (ADC)
G6PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, ADC, PWM)
G7PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART, ADC)
G8PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART, ADC)
G9PD13I/OMultiplexed I/O & Peripheral Pin PD13 (ADC, PWM)
G10PD15I/OMultiplexed I/O & Peripheral Pin PD15 (SPI, PWM)
H1PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
H2PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC, PWM)
H3PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
H4PB0I/OMultiplexed I/O & Peripheral Pin PB0 (ADC, PWM)
H5PE8I/OMultiplexed I/O & Peripheral Pin PE8 (SPI, ADC, PWM)
H6PE9I/OMultiplexed I/O & Peripheral Pin PE9 (ADC, PWM)
H7PE15I/OMultiplexed I/O & Peripheral Pin PE15 (UART, ADC, PWM)
H8PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, ADC, PWM)
H9PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, ADC, PWM)
H10PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, I2C, ADC)
J1PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
J2PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, DAC, PWM)
J3PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC, PWM)
J4PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, ADC, PWM, RTC/CLK)
J5VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
J6PE11I/OMultiplexed I/O & Peripheral Pin PE11 (SPI, ADC, PWM)
J7PE14I/OMultiplexed I/O & Peripheral Pin PE14 (SPI, ADC, PWM)
J8PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, PWM)
J9PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, ADC, PWM)
J10PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, ADC, PWM)
K1PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
K2PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
K3PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
K4VSSAGNDGround Reference Pin (VSSA)
K5VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
K6PE10I/OMultiplexed I/O & Peripheral Pin PE10 (ADC, PWM)
K7PE13I/OMultiplexed I/O & Peripheral Pin PE13 (SPI, ADC, PWM)
K8PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C, ADC)
K9PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, ADC, PWM, RTC/CLK)
K10PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART, ADC)
PIN A1 PE4
I/O
Multiplexed I/O & Peripheral Pin PE4 (SPI, PWM)
Design note: Alt: TRACED1 , TIM3_CH3SAI1D2 ,_ , SPI4_NSS , TIM20_CH1N , FMC_A20 , SAI1_FSA_ , EVENTOUT
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 14 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G473VEH6 (ST · TFBGA-100)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G473VEH6 (TFBGA-100) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G473VEH6 (TFBGA-100) - 2. Standard Pinout (Top View)
True package pinout (100 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G473VEH6 (TFBGA-100) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G473VEH6 (TFBGA-100) - 4. Package Dimensions (D×E×A)
TFBGA-100 · 8.00×8.00mm · Pitch 0.80mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G473VEH6 (TFBGA-100) - 5. Recommended Land Pattern
IPC-7351B Footprint (100 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G473VEH6 (TFBGA-100) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (14 figures · Page 1/2)
Showing 1–12 of 14 uncropped original figures for STM32G473
P52 · p52_fig01EXACT PACKAGE
STM32G473VEH6 (TFBGA-100) — Figure 11. STM32G473xB/xC/xE WLCSP81 pinout 1 2 3 4 5 6 7 8 VDD PA15 PC12 PD1 PB3 PB5 PB9 VSS B C D
Figure 11. STM32G473xB/xC/xE WLCSP81 pinout 1 2 3 4 5 6 7 8 VDD PA15 PC12 PD1 PB3 PB5 PB9 VSS B C D
P52 · p52_fig02EXACT PACKAGE
STM32G473VEH6 (TFBGA-100) — Figure 12. STM32G473xB/xC/xE TFBGA100 pinout 1 2 3 4 5 6 7 8 9 10 PE4 PB9 PB8-BOOT0 PB6 PB3 PD6 PD5 PD4 PD1 PC12 PE5 PE3 PE1 PB7 PB5 PD7 PD2 PD0 PA15 PA14
Figure 12. STM32G473xB/xC/xE TFBGA100 pinout 1 2 3 4 5 6 7 8 9 10 PE4 PB9 PB8-BOOT0 PB6 PB3 PD6 PD5 PD4 PD1 PC12 PE5 PE3 PE1 PB7 PB5 PD7 PD2 PD0 PA15 PA14
P209 · p209_fig01EXACT PACKAGE
STM32G473VEH6 (TFBGA-100) — Figure 67. TFBGA100 - Outline
Figure 67. TFBGA100 - Outline
P210 · p210_fig01EXACT PACKAGE
STM32G473VEH6 (TFBGA-100) — Figure 68. TFBGA100 - recommended footprint
Figure 68. TFBGA100 - recommended footprint
P211 · p211_fig01EXACT PACKAGE
STM32G473VEH6 (TFBGA-100) — Figure 69. TFBGA100 - Top view example
Figure 69. TFBGA100 - Top view example
P1 · p01_fig01881×673px
STM32G473VEH6 (TFBGA-100) — • Mathematical hardware accelerators - CORDIC for trigonometric functions acceleration - FMAC: filter mathematical accelerator
• Mathematical hardware accelerators - CORDIC for trigonometric functions acceleration - FMAC: filter mathematical accelerator
P47 · p47_fig011546×1041px
STM32G473VEH6 (TFBGA-100) — Figure 5. STM32G473xB/xC/xE UFQFPN48 pinout
Figure 5. STM32G473xB/xC/xE UFQFPN48 pinout
P52 · p52_fig02P52
STM32G473VEH6 (TFBGA-100) — Datasheet Page 52 (p52_fig02)
Datasheet Page 52 (p52_fig02)
P53 · p53_fig011546×993px
STM32G473VEH6 (TFBGA-100) — Figure 13. STM32G473xB/xC/xE UFBGA121 pinout
Figure 13. STM32G473xB/xC/xE UFBGA121 pinout
P78 · p78_fig011546×1512px
STM32G473VEH6 (TFBGA-100) — Figure 16. Power supply scheme
Figure 16. Power supply scheme
P78 · p78_fig01P78
STM32G473VEH6 (TFBGA-100) — Datasheet Page 78 (p78_fig01)
Datasheet Page 78 (p78_fig01)
P87 · p87_fig01772×1458px
STM32G473VEH6 (TFBGA-100) — SYSCLK source is HSI16
SYSCLK source is HSI16
Page 1 / 2 (14 extracted figures)

Technical Specifications & Part Details (STM32G473VEH6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G473VEH6 (TFBGA-100) is a 100-pin embedded microcontroller unit (mcu) featuring a 8.00 × 8.00 × 1.10 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
170 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
59 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
8.00 × 8.00 × 1.10 mm (A1=0.25 mm)
Package family: BGA (TFBGA-100)
Pin Count & Lead PitchN / e
100 Pins | Pitch e = 0.80 mm (31.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PB8BOOT0 -): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol100 auto-grouped pins
OK
IPC-7351B Land Pattern100 pads · Pitch 0.80mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TFBGA-100)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
8.00 × 8.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.10mm · e=0.80mm
Pad Size (W × L)Level B
0.32 × 0.32 mm
Pins / Total PadsTopology
100P / 100Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TFBGA-100
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G473VEH6 (TFBGA-100)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G473VEH6 (TFBGA-100)?

Manufactured by ST, the STM32G473VEH6 is housed in a TFBGA-100 package with 100 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (PE4: Multiplexed I/O & Peripheral Pin PE4 (SPI, PWM)), A2 (PB9: Multiplexed I/O & Peripheral Pin PB9 (I2C, PWM)), A3 (PB8BOOT0 -: Multiplexed I/O & Peripheral Pin PB8BOOT0 - (UART, I2C, PWM)), A4 (PB6: Multiplexed I/O & Peripheral Pin PB6 (UART, PWM)), A5 (PB3: Multiplexed I/O & Peripheral Pin PB3 (UART, SPI, PWM, SWD/JTAG)), A6 (PD6: Multiplexed I/O & Peripheral Pin PD6 (UART, I2C, PWM)).

What are the IPC-7351B PCB Footprint dimensions for STM32G473VEH6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G473VEH6 (TFBGA-100) has a nominal body envelope of 8.00 × 8.00 mm, pitch e = 0.80 mm, and 100 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G473VEH6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G473VEH6 (ST, TFBGA-100) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (100 pins) & STM32G473 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI, PWM.
A2PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: I2C, PWM.
A3PB8BOOT0 -Digital_IOSignal terminal PB8BOOT0 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C, PWM.
A4PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: UART, PWM.
A5PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK. Supported peripheral buses: UART, SPI, PWM, SWD/JTAG.
A6PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: UART, I2C, PWM.
A7PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART.
A8PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: UART, PWM.
A9PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: PWM.
A10PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, PWM.
B1PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO. Supported peripheral buses: SPI, PWM.
B2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI, PWM.
B3PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
B4PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, I2C, PWM.
B5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, I2C3_SDA. Supported peripheral buses: UART, SPI, I2C, PWM.
B6PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: UART, PWM.
B7PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
B8PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: PWM.
B9PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, PWM, SWD/JTAG.
B10PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SMBA, I2C1_SDA. Supported peripheral buses: UART, I2C, PWM, SWD/JTAG.
C1PC14 - OSC32_INDigital_IOSignal terminal PC14 - OSC32_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN. Supported peripheral buses: RTC/CLK.
C2PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: SPI, I2C, RTC/CLK.
C3PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: PWM.
C4PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: UART.
C5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO. Supported peripheral buses: UART, SPI, PWM.
C6PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: UART.
C7PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO, I2C3_SDA. Supported peripheral buses: UART, SPI, I2C, PWM.
C8PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI, PWM.
C9PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: USB_DP. Supported peripheral buses: USB, UART, PWM.
C10PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI, USB_DM. Supported peripheral buses: USB, UART, SPI, PWM.
D1PC15 - OSC32_OUTDigital_IOSignal terminal PC15 - OSC32_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15 - OSC32_OUT. Supported peripheral buses: RTC/CLK.
D2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D3VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D4PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: PWM, RTC/CLK.
D5VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D8PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: UART, I2C, PWM, SWD/JTAG.
D9PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SMBA, SPI2_MISO. Supported peripheral buses: USB, UART, SPI, I2C, PWM.
D10PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: UART, I2C, ADC, PWM.
E1PF0OSC IN -_Digital_IOSignal terminal PF0OSC IN -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA, SPI2_NSS. Supported peripheral buses: SPI, I2C, ADC, PWM, RTC/CLK.
E2PF1 - OSC_OUTDigital_IOSignal terminal PF1 - OSC_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, ADC, RTC/CLK.
E3PF9Digital_IOSignal terminal PF9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, PWM.
E4PF10Digital_IOSignal terminal PF10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
E5VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E8PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL. Supported peripheral buses: I2C, PWM.
E9PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SDA. Supported peripheral buses: I2C, PWM.
E10PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL, I2C2_SDA. Supported peripheral buses: UART, SPI, I2C, ADC, PWM, RTC/CLK.
F1PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: ADC, PWM.
F2PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC, PWM.
F3PG10NRST -Digital_IOSignal terminal PG10NRST - (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10NRST -. Supported peripheral buses: RTC/CLK.
F4PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: I2C, ADC, PWM.
F5VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
F6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
F8PD14Digital_IOSignal terminal PD14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD14. Supported peripheral buses: ADC, PWM.
F9PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SCL. Supported peripheral buses: I2C, PWM.
F10PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SDA. Supported peripheral buses: I2C, PWM.
G1PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: I2C, ADC, PWM.
G2PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
G3PF2Digital_IOSignal terminal PF2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: I2C.
G4PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
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