Mechanical Dimensions & Land Pattern (LFBGA-144)
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.30mm · e=0.50mm
Pad Size (W × L)Level B
0.24 × 0.24 mm
Pins / Total PadsTopology
144P / 144Pad (BGA_GRID)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit LFBGA-144 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — CY9BF466RBGL-GK7E1 (LFBGA-144)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of CY9BF466RBGL-GK7E1 (LFBGA-144)?
Manufactured by Infineon/CYPRESS, the CY9BF466RBGL-GK7E1 is housed in a LFBGA-144 package with 144 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.7 V to 5.5 V. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (P81: Multiplexed I/O & Peripheral Pin P81 (General)), A3 (P80: Multiplexed I/O & Peripheral Pin P80 (General)), A4 (VCC: Power Supply Input (VCC — 2.7 V to 5.5 V)), A5 (VSS: Ground Reference Pin (VSS)), A6 (P66: Multiplexed I/O & Peripheral Pin P66 (General)).
What are the IPC-7351B PCB Footprint dimensions for CY9BF466RBGL-GK7E1?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CY9BF466RBGL-GK7E1 (LFBGA-144) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 144 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CY9BF466RBGL-GK7E1?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CY9BF466RBGL-GK7E1 (Infineon/CYPRESS, LFBGA-144) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (144 pins) & CY9BF466RBGL Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A2 | P81 | Digital_IO | Signal terminal P81 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P81. Supported peripheral buses: General. |
| A3 | P80 | Digital_IO | Signal terminal P80 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P80. Supported peripheral buses: General. |
| A4 | VCC | Power_In | Primary positive power supply input (VCC) operating in the 2.7 V to 5.5 V domain (Max rating: 5.5V). |
| A5 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A6 | P66 | Digital_IO | Signal terminal P66 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P66. Supported peripheral buses: General. |
| A7 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A8 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A9 | P07 | Digital_IO | Signal terminal P07 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P07. Supported peripheral buses: General. |
| A10 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A11 | P0C | Digital_IO | Signal terminal P0C (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P0C. Supported peripheral buses: General. |
| A12 | VCC | Power_In | Primary positive power supply input (VCC) operating in the 2.7 V to 5.5 V domain (Max rating: 5.5V). |
| A13 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B1 | VCC | Power_In | Primary positive power supply input (VCC) operating in the 2.7 V to 5.5 V domain (Max rating: 5.5V). |
| B2 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B3 | P60 | Digital_IO | Signal terminal P60 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P60. Supported peripheral buses: General. |
| B4 | P61 | Digital_IO | Signal terminal P61 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P61. Supported peripheral buses: General. |
| B5 | P63 | Digital_IO | Signal terminal P63 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P63. Supported peripheral buses: General. |
| B6 | P67 | Digital_IO | Signal terminal P67 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P67. Supported peripheral buses: General. |
| B7 | P01 | Digital_IO | Signal terminal P01 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P01. Supported peripheral buses: General. |
| B8 | P04 | Digital_IO | Signal terminal P04 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P04. Supported peripheral buses: General. |
| B9 | P08 | Digital_IO | Signal terminal P08 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P08. Supported peripheral buses: General. |
| B10 | P0B | Digital_IO | Signal terminal P0B (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P0B. Supported peripheral buses: General. |
| B11 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B12 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B13 | P0E | Digital_IO | Signal terminal P0E (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P0E. Supported peripheral buses: General. |
| C1 | P50 | Digital_IO | Signal terminal P50 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P50. Supported peripheral buses: General. |
| C2 | P51 | Digital_IO | Signal terminal P51 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P51. Supported peripheral buses: General. |
| C3 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| C4 | P62 | Digital_IO | Signal terminal P62 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P62. Supported peripheral buses: General. |
| C5 | P64 | Digital_IO | Signal terminal P64 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P64. Supported peripheral buses: General. |
| C6 | P68 | Digital_IO | Signal terminal P68 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P68. Supported peripheral buses: General. |
| C7 | P02 | Digital_IO | Signal terminal P02 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P02. Supported peripheral buses: General. |
| C8 | P05 | Digital_IO | Signal terminal P05 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P05. Supported peripheral buses: General. |
| C9 | P09 | Digital_IO | Signal terminal P09 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P09. Supported peripheral buses: General. |
| C10 | P0D | Digital_IO | Signal terminal P0D (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P0D. Supported peripheral buses: General. |
| C11 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| C12 | P20 | Digital_IO | Signal terminal P20 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P20. Supported peripheral buses: General. |
| C13 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| D1 | P52 | Digital_IO | Signal terminal P52 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P52. Supported peripheral buses: General. |
| D2 | TIOA1_2 | Digital_IO | Signal terminal TIOA1_2 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: TIOA1_2. Supported peripheral buses: General. |
| D3 | TIOB1_2 | Digital_IO | Signal terminal TIOB1_2 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: TIOB1_2. Supported peripheral buses: General. |
| D4 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| D5 | P65 | Digital_IO | Signal terminal P65 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P65. Supported peripheral buses: General. |
| D6 | P00 | Digital_IO | Signal terminal P00 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P00. Supported peripheral buses: General. |
| D7 | P03 | Digital_IO | Signal terminal P03 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P03. Supported peripheral buses: General. |
| D8 | P06 | Digital_IO | Signal terminal P06 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P06. Supported peripheral buses: General. |
| D9 | P0A | Digital_IO | Signal terminal P0A (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P0A. Supported peripheral buses: General. |
| D10 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| D11 | P21 | Digital_IO | Signal terminal P21 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P21. Supported peripheral buses: General. |
| D12 | P22 | Digital_IO | Signal terminal P22 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P22. Supported peripheral buses: General. |
| D13 | P23 | Digital_IO | Signal terminal P23 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P23. Supported peripheral buses: General. |
| E1 | ADTG_1 | Digital_IO | Signal terminal ADTG_1 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: ADTG_1. Supported peripheral buses: General. |
| E2 | P56 | Digital_IO | Signal terminal P56 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P56. Supported peripheral buses: General. |
| E3 | P57 | Digital_IO | Signal terminal P57 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P57. Supported peripheral buses: General. |
| E4 | P58 | Digital_IO | Signal terminal P58 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P58. Supported peripheral buses: General. |
| E10 | P24 | Digital_IO | Signal terminal P24 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P24. Supported peripheral buses: General. |
| E11 | P25 | Digital_IO | Signal terminal P25 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P25. Supported peripheral buses: General. |
| E12 | P26 | Digital_IO | Signal terminal P26 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P26. Supported peripheral buses: General. |
| E13 | P27 | Digital_IO | Signal terminal P27 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P27. Supported peripheral buses: General. |
| F1 | P59 | Digital_IO | Signal terminal P59 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P59. Supported peripheral buses: General. |
| F2 | P5A | Digital_IO | Signal terminal P5A (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P5A. Supported peripheral buses: General. |
| F3 | P5B | Digital_IO | Signal terminal P5B (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: P5B. Supported peripheral buses: General. |
| F4 | MADATA12_0 | Digital_IO | Signal terminal MADATA12_0 (I/O, 2.7 V to 5.5 V domain). Multiplexed alternate functions: MADATA12_0. Supported peripheral buses: General. |