Mechanical Dimensions & Land Pattern (SMD)
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| C1, C2 BOM | 22µF (or 10µF) X5R + 100nF X7R 0805 + 0402 | 3V3 supply decoupling for ~500mA Wi-Fi TX bursts — place closest to 3V3 pin; supply must deliver >= 600mA. |
| R_en + C_en BOM | R = 10kΩ to 3V3 + C = 1µF to GND 0402 / 0603 | Power-On Reset RC delay at EN (CHIP_PU) — 1µF capacitor at EN is REQUIRED for reliable cold boot. |
| R_boot + SW1 BOM | 10kΩ Pull-up + BOOT button 0402 + SMD | Firmware boot-mode strap (IO0 on ESP32/S2/S3, IO9 on ESP32-C3) — on C3 pull IO8 high via 10kΩ for UART/USB download. |
| D_esd BOM | USBLC6-2SC6 / LESD5D5.0CT1G SOT-23-6 / SOD-523 | ESD surge protection on USB D+/D- — place right next to USB Type-C connector before IO18/IO19/IO20. |
| ESP32-S3-MINI-1-N8 / 1U-N4R2 Espressif | 100% Drop-in | Same 15.4×15.4mm 65-pad footprint as ESP32-S2-MINI-2 — verify USB GPIO 19/20 pin mapping. |
Technical Frequently Asked Questions (FAQ) — ESP32-S3-MINI-1-N8 (SMD)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of ESP32-S3-MINI-1-N8 (SMD)?
Manufactured by ESPRESSIF, the ESP32-S3-MINI-1-N8 is housed in a SMD package with 61 pins and a 0.85 mm lead pitch, supporting a VCC supply range of 3.0 ~ 3.6 V. Key pins include: 1 (GPIO0: Multiplexed I/O & Peripheral Pin GPIO0 (General)), 2 (GND: Ground Reference Pin (GND)), 3 (3V3: Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))), 4 (IO0: Multiplexed I/O & Peripheral Pin IO0 (RTC/CLK)), 5 (IO1: Multiplexed I/O & Peripheral Pin IO1 (RTC/CLK, TOUCH)), 6 (IO2: Multiplexed I/O & Peripheral Pin IO2 (RTC/CLK, TOUCH)).
What are the IPC-7351B PCB Footprint dimensions for ESP32-S3-MINI-1-N8?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ESP32-S3-MINI-1-N8 (SMD) has a nominal body envelope of 15.40 × 20.50 mm, pitch e = 0.85 mm, and 73 copper pads plus a central exposed thermal pad (EPAD) of 4.50 × 4.50 mm with a 60% IPC-7525 windowed solder paste grid.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ESP32-S3-MINI-1-N8?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ESP32-S3-MINI-1-N8 (ESPRESSIF, SMD) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (61 pins) & ESP32-S3-MINI Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | GPIO0 | Digital_IO | Signal terminal GPIO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO0. Supported peripheral buses: General. |
| 2 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 3 | 3V3 | Power_In | Primary positive power supply input (3V3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V). |
| 4 | IO0 | Digital_IO | Signal terminal IO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO0. Supported peripheral buses: RTC/CLK. |
| 5 | IO1 | Digital_IO | Signal terminal IO1 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO1. Supported peripheral buses: RTC/CLK, TOUCH. |
| 6 | IO2 | Digital_IO | Signal terminal IO2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO2. Supported peripheral buses: RTC/CLK, TOUCH. |
| 7 | IO3 | Digital_IO | Signal terminal IO3 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO3. Supported peripheral buses: RTC/CLK, TOUCH. |
| 8 | IO4 | Digital_IO | Signal terminal IO4 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO4. Supported peripheral buses: RTC/CLK, TOUCH. |
| 9 | IO5 | Digital_IO | Signal terminal IO5 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO5. Supported peripheral buses: RTC/CLK, TOUCH. |
| 10 | IO6 | Digital_IO | Signal terminal IO6 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO6. Supported peripheral buses: RTC/CLK, TOUCH. |
| 11 | IO7 | Digital_IO | Signal terminal IO7 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO7. Supported peripheral buses: RTC/CLK, TOUCH. |
| 12 | IO8 | Digital_IO | Signal terminal IO8 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO8, GPIO8. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 13 | IO9 | Digital_IO | Signal terminal IO9 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO9, GPIO9, TOUCH9. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 14 | IO10 | Digital_IO | Signal terminal IO10 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO10, GPIO10, TOUCH10, SUBSPICS0. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 15 | IO11 | Digital_IO | Signal terminal IO11 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO11, GPIO11, TOUCH11, SUBSPID. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 16 | IO12 | Digital_IO | Signal terminal IO12 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO12, GPIO12, TOUCH12, SUBSPICLK. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 17 | IO13 | Digital_IO | Signal terminal IO13 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO13, GPIO13, TOUCH13, SUBSPIQ. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 18 | IO14 | Digital_IO | Signal terminal IO14 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO14, GPIO14, TOUCH14, SUBSPIWP. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 19 | IO15 | Digital_IO | Signal terminal IO15 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO15, GPIO15, U0RTS. Supported peripheral buses: ADC, RTC/CLK. |
| 20 | IO16 | Digital_IO | Signal terminal IO16 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO16, GPIO16, U0CTS. Supported peripheral buses: ADC, RTC/CLK. |
| 21 | IO17 | Digital_IO | Signal terminal IO17 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO17. Supported peripheral buses: UART, RTC/CLK. |
| 22 | IO18 | Digital_IO | Signal terminal IO18 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO18, GPIO18, U1RXD. Supported peripheral buses: UART, ADC, RTC/CLK. |
| 23 | IO19 | Digital_IO | Signal terminal IO19 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8. Supported peripheral buses: ADC, RTC/CLK. |
| 24 | IO20 | Digital_IO | Signal terminal IO20 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1. Supported peripheral buses: USB, ADC, RTC/CLK. |
| 25 | IO21 | Digital_IO | Signal terminal IO21 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO21. Supported peripheral buses: RTC/CLK. |
| 26 | IO26b | Digital_IO | Signal terminal IO26b (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPICS1, GPIO26. Supported peripheral buses: SPI. |
| 27 | IO47 | Digital_IO | Signal terminal IO47 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPICLK. Supported peripheral buses: SPI. |
| 28 | IO33 | Digital_IO | Signal terminal IO33 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO4, GPIO33, FSPIHD, SUBSPIHD. Supported peripheral buses: SPI. |
| 29 | IO34 | Digital_IO | Signal terminal IO34 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO5, GPIO34, FSPICS0, SUBSPICS0. Supported peripheral buses: SPI. |
| 30 | IO48 | Digital_IO | Signal terminal IO48 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPICLK. Supported peripheral buses: SPI. |
| 31 | IO35 | Digital_IO | Signal terminal IO35 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO6, GPIO35, FSPID, SUBSPID. Supported peripheral buses: SPI. |
| 32 | IO36 | Digital_IO | Signal terminal IO36 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO7, GPIO36, FSPICLK, SUBSPICLK. Supported peripheral buses: SPI. |
| 33 | IO37 | Digital_IO | Signal terminal IO37 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIDQS, GPIO37, FSPIQ, SUBSPIQ. Supported peripheral buses: SPI. |
| 34 | IO38 | Digital_IO | Signal terminal IO38 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO38, FSPIWP, SUBSPIWP. Supported peripheral buses: SPI. |
| 35 | IO39 | Digital_IO | Signal terminal IO39 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTCK, GPIO39, CLK_OUT3, SUBSPICS1. Supported peripheral buses: SPI, SWD/JTAG. |
| 36 | IO40 | Digital_IO | Signal terminal IO40 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTDO, GPIO40, CLK_OUT2. Supported peripheral buses: SWD/JTAG. |
| 37 | IO41 | Digital_IO | Signal terminal IO41 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTDI, GPIO41, CLK_OUT1. Supported peripheral buses: SWD/JTAG. |
| 38 | IO42 | Digital_IO | Signal terminal IO42 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTMS, GPIO42. Supported peripheral buses: SWD/JTAG. |
| 39 | TXD0 | Digital_IO | Signal terminal TXD0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: U0TXD, GPIO43, CLK_OUT1. Supported peripheral buses: UART. |
| 40 | RXD0 | Digital_IO | Signal terminal RXD0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: U0RXD, GPIO44, CLK_OUT2. Supported peripheral buses: UART. |
| 41 | IO45 | Digital_IO | Signal terminal IO45 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO45. Supported peripheral buses: General. |
| 42 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 43 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 44 | IO46 | Digital_IO | Signal terminal IO46 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO46. Supported peripheral buses: General. |
| 45 | EN | Digital_IO | Chip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset. |
| 46 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 47 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 48 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 49 | GND | GND | Bottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return. |
| 50 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 51 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 52 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 53 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 54 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 55 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 56 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 57 | GND | GND | Bottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return. |
| 58 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 59 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 60 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| GND | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |












