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STM32H562AII6 (UFBGA-169(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32H562AII6

STID: C27642755UFBGA-169(7x7) · 169 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32H562AII6 (UFBGA-169(7x7))A1PE2A2PI7A3VDDA4PB9A5PB6A6PB4(NJTRST)A7VDDIO2A8PG10A9PD3A10VDDA11PC11A12PA14 (JTCK/SA13PI2B1IOB1B2PE3B3VSSB4VCAPB5BOOT0B6PG15B7VSSB8PD7B9PC12B10VSSB11PA15(JTDI)B12PI1B13PI0C1IOC1C2PE5C3PI6C4PI4C5PE0C6PB5C7PG14C8PG12C9PD2C10PC10C11PI3C12VSSC13VDDD1VDDD2VSSD3PE6D4PE4D5PE1D6PB7D7PG13D8PD5D9PD0D10PH14D11PH15D12PH13D13VDDUSBE1PF1E2VBATE3PI8E4PC13E5PB8E6PB3(JTDO/ TRE7PG11E8PD6E9PD1E10PA10E11PA9E12PA13 (JTMS/SE13PA12F1PF4F2PF2F3PF0F4PI11F5PF3F6PF5F7PG9F8PD4F9PC6F10PC7F11PG8F12PA8F13PA11G1VDDG2VSSG3PF7G4PF6G5PF8G6PF10G7PE8N13PH12N12PH11N11VDDN10VCAPN9PE15N8PE7N7VDDN6PF12N5PC4N4VDDN3PA3N2PH3N1PH4M13PB14M12VSSM11PH10M10PH8M9PB11M8PE11M7VSSM6PF14M5PA6M4VSSM3PH5M2VSSM1VDDL13VDDL12PD8L11PB13L10PH7L9PE13L8PE9L7PG0L6PB2L5PB0L4PA4L3PA2L2VREF+L1VDDAK13PD13K12PD12K11PB12K10PH6K9PB10K8PE12K7PG1K6PB1K5PA7K4PA5K3PH2K2VSSAK1VREF -J13PG4J12PG2J11PD10J10PB15J9PD9J8PE14J7PF15J6PF11J5PA1J4PA0J3PC2J2PC1J1PC0H13VDDH12VSSH11PD14H10PD11H9PD15H8PE10H7PF13H6PC5H5PC3H4NRSTH3PF9H2PH1 - OSC OUH1PH0 - OSC ING13PC9G12PC8G11PG6G10PG5G9PG3G8PG7Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1N1A2B2C2D2E2F2G2H2J2K2L2M2N2A3B3C3D3E3F3G3H3J3K3L3M3N3A4B4C4D4E4F4G4H4J4K4L4M4N4A5B5C5D5E5F5G5H5J5K5L5M5N5A6B6C6D6E6F6G6H6J6K6L6M6N6A7B7C7D7E7F7G7H7J7K7L7M7N7A8B8C8D8E8F8G8H8J8K8L8M8N8A9B9C9D9E9F9G9H9J9K9L9M9N9A10B10C10D10E10F10G10H10J10K10L10M10N10A11B11C11D11E11F11G11H11J11K11L11M11N11A12B12C12D12E12F12G12H12J12K12L12M12N12A13B13C13D13E13F13G13H13J13K13L13M13N13E=7.00mm · Pitch e=0.50mmD=7.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (169/169)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (UART)
A2PI7I/OMultiplexed I/O & Peripheral Pin PI7 (General)
A3VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A4PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, I2C)
A5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C)
A6PB4(NJTRST)I/OMultiplexed I/O & Peripheral Pin PB4(NJTRST) (SPI, PWM, SWD/JTAG)
A7VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
A8PG10I/OMultiplexed I/O & Peripheral Pin PG10 (SPI)
A9PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
A10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A11PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
A12PA14 (JTCK/SWCLK)I/OMultiplexed I/O & Peripheral Pin PA14 (JTCK/SWCLK) (SWD/JTAG)
A13PI2I/OMultiplexed I/O & Peripheral Pin PI2 (SPI)
B1IOB1I/OGeneral Purpose Digital I/O Pin IOB1
B2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
B3VSSGNDGround Reference Pin (VSS)
B4VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
B5BOOT0IInput-Only Pin BOOT0 (General)
B6PG15I/OMultiplexed I/O & Peripheral Pin PG15 (UART, SPI)
B7VSSGNDGround Reference Pin (VSS)
B8PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART, SPI)
B9PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
B10VSSGNDGround Reference Pin (VSS)
B11PA15(JTDI)I/OMultiplexed I/O & Peripheral Pin PA15(JTDI) (UART, SPI, SWD/JTAG)
B12PI1I/OMultiplexed I/O & Peripheral Pin PI1 (SPI)
B13PI0I/OMultiplexed I/O & Peripheral Pin PI0 (SPI)
C1IOC1I/OGeneral Purpose Digital I/O Pin IOC1
C2PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI)
C3PI6I/OMultiplexed I/O & Peripheral Pin PI6 (General)
C4PI4I/OMultiplexed I/O & Peripheral Pin PI4 (General)
C5PE0I/OMultiplexed I/O & Peripheral Pin PE0 (SPI)
C6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C)
C7PG14I/OMultiplexed I/O & Peripheral Pin PG14 (UART)
C8PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART, SPI)
C9PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
C10PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
C11PI3I/OMultiplexed I/O & Peripheral Pin PI3 (SPI)
C12VSSGNDGround Reference Pin (VSS)
C13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D2VSSGNDGround Reference Pin (VSS)
D3PE6I/OMultiplexed I/O & Peripheral Pin PE6 (SPI)
D4PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
D5PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
D6PB7I/OMultiplexed I/O & Peripheral Pin PB7 (I2C)
D7PG13I/OMultiplexed I/O & Peripheral Pin PG13 (UART, SPI)
D8PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART, PWM)
D9PD0I/OMultiplexed I/O & Peripheral Pin PD0 (PWM)
D10PH14I/OMultiplexed I/O & Peripheral Pin PH14 (PWM)
D11PH15I/OMultiplexed I/O & Peripheral Pin PH15 (PWM)
D12PH13I/OMultiplexed I/O & Peripheral Pin PH13 (UART)
D13VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
E1PF1I/OMultiplexed I/O & Peripheral Pin PF1 (I2C)
E2VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
E3PI8I/OMultiplexed I/O & Peripheral Pin PI8 (RTC/CLK)
E4PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
E5PB8I/OMultiplexed I/O & Peripheral Pin PB8 (UART, I2C)
E6PB3(JTDO/ TRACESWO)I/OMultiplexed I/O & Peripheral Pin PB3(JTDO/ TRACESWO) (UART, SPI, I2C, SWD/JTAG)
E7PG11I/OMultiplexed I/O & Peripheral Pin PG11 (UART, SPI)
E8PD6I/OMultiplexed I/O & Peripheral Pin PD6 (SPI)
E9PD1I/OMultiplexed I/O & Peripheral Pin PD1 (UART)
E10PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, PWM)
E11PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, SPI, I2C, PWM)
E12PA13 (JTMS/SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13 (JTMS/SWDIO) (SWD/JTAG)
E13PA12I/OMultiplexed I/O & Peripheral Pin PA12 (USB, UART, SPI)
F1PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
F2PF2I/OMultiplexed I/O & Peripheral Pin PF2 (UART, I2C)
F3PF0I/OMultiplexed I/O & Peripheral Pin PF0 (I2C)
F4PI11I/OMultiplexed I/O & Peripheral Pin PI11 (General)
F5PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
F6PF5I/OMultiplexed I/O & Peripheral Pin PF5 (UART, SPI, I2C)
F7PG9I/OMultiplexed I/O & Peripheral Pin PG9 (UART, SPI)
F8PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART)
F9PC6I/OMultiplexed I/O & Peripheral Pin PC6 (UART, PWM)
F10PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
F11PG8I/OMultiplexed I/O & Peripheral Pin PG8 (UART)
F12PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, I2C, RTC/CLK)
F13PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
G1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G2VSSGNDGround Reference Pin (VSS)
G3PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
G4PF6I/OMultiplexed I/O & Peripheral Pin PF6 (General)
G5PF8I/OMultiplexed I/O & Peripheral Pin PF8 (UART, SPI)
G6PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
G7PE8I/OMultiplexed I/O & Peripheral Pin PE8 (UART, SPI, PWM)
G8PG7I/OMultiplexed I/O & Peripheral Pin PG7 (I2C)
G9PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
G10PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
G11PG6I/OMultiplexed I/O & Peripheral Pin PG6 (I2C)
G12PC8I/OMultiplexed I/O & Peripheral Pin PC8 (UART, PWM)
G13PC9I/OMultiplexed I/O & Peripheral Pin PC9 (UART, I2C, RTC/CLK)
H1PH0 - OSC IN(PH0)_I/OMultiplexed I/O & Peripheral Pin PH0 - OSC IN(PH0)_ (RTC/CLK)
H2PH1 - OSC OUT(PH1)_I/OMultiplexed I/O & Peripheral Pin PH1 - OSC OUT(PH1)_ (RTC/CLK)
H3PF9I/OMultiplexed I/O & Peripheral Pin PF9 (General)
H4NRSTISystem Enable & Hardware Reset (NRST)
H5PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC)
H6PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC, PWM)
H7PF13I/OMultiplexed I/O & Peripheral Pin PF13 (I2C, ADC)
H8PE10I/OMultiplexed I/O & Peripheral Pin PE10 (UART, PWM)
H9PD15I/OMultiplexed I/O & Peripheral Pin PD15 (UART, PWM)
H10PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, SPI, I2C)
H11PD14I/OMultiplexed I/O & Peripheral Pin PD14 (UART, PWM)
H12VSSGNDGround Reference Pin (VSS)
H13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J1PC0I/OMultiplexed I/O & Peripheral Pin PC0 (SPI, ADC)
J2PC1I/OMultiplexed I/O & Peripheral Pin PC1 (UART, SPI, I2C, ADC)
J3PC2I/OMultiplexed I/O & Peripheral Pin PC2 (UART, SPI, ADC)
J4PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, SPI, ADC, PWM)
J5PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
J6PF11I/OMultiplexed I/O & Peripheral Pin PF11 (SPI, ADC)
J7PF15I/OMultiplexed I/O & Peripheral Pin PF15 (I2C)
J8PE14I/OMultiplexed I/O & Peripheral Pin PE14 (PWM)
J9PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
J10PB15I/OMultiplexed I/O & Peripheral Pin PB15 (UART, SPI, RTC/CLK)
J11PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
J12PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
J13PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
K1VREF -AnalogMultiplexed I/O & Peripheral Pin VREF - (General)
K2VSSAGNDGround Reference Pin (VSSA)
K3PH2I/OMultiplexed I/O & Peripheral Pin PH2 (SPI)
K4PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
K5PA7I/OMultiplexed I/O & Peripheral Pin PA7 (UART, SPI, ADC, PWM)
K6PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
K7PG1I/OMultiplexed I/O & Peripheral Pin PG1 (UART, SPI)
K8PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, PWM)
K9PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, PWM)
K10PH6I/OMultiplexed I/O & Peripheral Pin PH6 (SPI, PWM)
K11PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C)
K12PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, I2C)
K13PD13I/OMultiplexed I/O & Peripheral Pin PD13 (UART, SPI, I2C)
L1VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
L2VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
L3PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
L4PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC)
L5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, ADC, PWM)
L6PB2I/OMultiplexed I/O & Peripheral Pin PB2 (SPI, PWM, RTC/CLK)
L7PG0I/OMultiplexed I/O & Peripheral Pin PG0 (UART)
L8PE9I/OMultiplexed I/O & Peripheral Pin PE9 (UART, PWM)
L9PE13I/OMultiplexed I/O & Peripheral Pin PE13 (PWM)
L10PH7I/OMultiplexed I/O & Peripheral Pin PH7 (UART, I2C, PWM)
L11PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
L12PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
L13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M2VSSGNDGround Reference Pin (VSS)
M3PH5I/OMultiplexed I/O & Peripheral Pin PH5 (SPI, I2C)
M4VSSGNDGround Reference Pin (VSS)
M5PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC)
M6PF14I/OMultiplexed I/O & Peripheral Pin PF14 (ADC)
M7VSSGNDGround Reference Pin (VSS)
M8PE11I/OMultiplexed I/O & Peripheral Pin PE11 (SPI, PWM)
M9PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, SPI, I2C, PWM)
M10PH8I/OMultiplexed I/O & Peripheral Pin PH8 (SPI, PWM)
M11PH10I/OMultiplexed I/O & Peripheral Pin PH10 (SPI, PWM)
M12VSSGNDGround Reference Pin (VSS)
M13PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
N1PH4I/OMultiplexed I/O & Peripheral Pin PH4 (SPI, I2C)
N2PH3I/OMultiplexed I/O & Peripheral Pin PH3 (General)
N3PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, SPI, ADC, PWM)
N4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N5PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC, PWM)
N6PF12I/OMultiplexed I/O & Peripheral Pin PF12 (ADC)
N7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N8PE7I/OMultiplexed I/O & Peripheral Pin PE7 (UART)
N9PE15I/OMultiplexed I/O & Peripheral Pin PE15 (UART)
N10VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
N11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N12PH11I/OMultiplexed I/O & Peripheral Pin PH11 (I2C, PWM)
N13PH12I/OMultiplexed I/O & Peripheral Pin PH12 (I2C)
PIN A1 PE2
I/O
Multiplexed I/O & Peripheral Pin PE2 (UART)
Design note: Alt: TRACECLK LPTIM1 IN2 ,_ , SAI1_CK1SPI4SCK ,_ , SAI1 MCLK_AUSART10RX_ ,_ , UART8_TXOCTOSPI1IO2 ,_ , ETH MII_TXD3FMCA23_ ,_ , DCMI D3/PSSI_D3EVENTOUT_ ,
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32H562AII6 (ST · UFBGA-169(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32H562AII6 (UFBGA-169(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32H562AII6 (UFBGA-169(7x7)) - 2. Standard Pinout (Top View)
True package pinout (169 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32H562AII6 (UFBGA-169(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32H562AII6 (UFBGA-169(7x7)) - 4. Package Dimensions (D×E×A)
UFBGA-169(7x7) · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32H562AII6 (UFBGA-169(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (169 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32H562AII6 (UFBGA-169(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for STM32H562 / STM32H563
P70 · p70_fig01EXACT PACKAGE
STM32H562AII6 (UFBGA-169(7x7)) — Figure 12. UFBGA169 ballout
Figure 12. UFBGA169 ballout
P71 · p71_fig01EXACT PACKAGE
STM32H562AII6 (UFBGA-169(7x7)) — Figure 13. UFBGA169 SMPS ballout
Figure 13. UFBGA169 SMPS ballout
P260 · p260_fig01EXACT PACKAGE
STM32H562AII6 (UFBGA-169(7x7)) — Figure 92. UFBGA169 - Footprint example
Figure 92. UFBGA169 - Footprint example
P1 · p01_fig01881×845px
STM32H562AII6 (UFBGA-169(7x7)) — Arm® Cortex®-M33 32-bit MCU + TrustZone® + FPU, 375 DMIPS,
Arm® Cortex®-M33 32-bit MCU + TrustZone® + FPU, 375 DMIPS,
P70 · p70_fig01P70
STM32H562AII6 (UFBGA-169(7x7)) — Datasheet Page 70 (p70_fig01)
Datasheet Page 70 (p70_fig01)
P125 · p125_fig011656×2111px
STM32H562AII6 (UFBGA-169(7x7)) — Figure 21. Power supply scheme with SMPS SMPS disabled
Figure 21. Power supply scheme with SMPS SMPS disabled
P125 · p125_fig01P125
STM32H562AII6 (UFBGA-169(7x7)) — Datasheet Page 125 (p125_fig01)
Datasheet Page 125 (p125_fig01)
P126 · p126_fig011752×2135px
STM32H562AII6 (UFBGA-169(7x7)) — Figure 22. Power supply scheme with LDO
Figure 22. Power supply scheme with LDO
P153 · p153_fig011546×519px
STM32H562AII6 (UFBGA-169(7x7)) — Figure 30. Typical application with an 8 MHz crystal
Figure 30. Typical application with an 8 MHz crystal
P211 · p211_fig011550×999px
STM32H562AII6 (UFBGA-169(7x7)) — Figure 57. ADC accuracy characteristics
Figure 57. ADC accuracy characteristics
P211 · p211_fig021548×726px
STM32H562AII6 (UFBGA-169(7x7)) — Figure 58. Typical connection diagram when using the ADC with FT/TT pins
Figure 58. Typical connection diagram when using the ADC with FT/TT pins
P269 · p269_fig011751×1309px
STM32H562AII6 (UFBGA-169(7x7)) — Figure 98. TFBGA225 - Footprint example
Figure 98. TFBGA225 - Footprint example
Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (STM32H562AII6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32H562AII6 (UFBGA-169(7x7)) is a 169-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 0.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
250 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
134 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.60 mm (A1=0.20 mm)
Package family: BGA (UFBGA-169(7x7))
Pin Count & Lead PitchN / e
169 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol169 auto-grouped pins
OK
IPC-7351B Land Pattern169 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-169(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.60mm · e=0.50mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
169P / 169Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-169(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32H562AII6 (UFBGA-169(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32H562AII6 (UFBGA-169(7x7))?

Manufactured by ST, the STM32H562AII6 is housed in a UFBGA-169(7x7) package with 169 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (PE2: Multiplexed I/O & Peripheral Pin PE2 (UART)), A2 (PI7: Multiplexed I/O & Peripheral Pin PI7 (General)), A3 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A4 (PB9: Multiplexed I/O & Peripheral Pin PB9 (SPI, I2C)), A5 (PB6: Multiplexed I/O & Peripheral Pin PB6 (UART, I2C)), A6 (PB4(NJTRST): Multiplexed I/O & Peripheral Pin PB4(NJTRST) (SPI, PWM, SWD/JTAG)).

What are the IPC-7351B PCB Footprint dimensions for STM32H562AII6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H562AII6 (UFBGA-169(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 169 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H562AII6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H562AII6 (ST, UFBGA-169(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (169 pins) & STM32H562 / STM32H563 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: UART.
A2PI7Digital_IOSignal terminal PI7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI7. Supported peripheral buses: General.
A3VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A4PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, I2C.
A5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: UART, I2C.
A6PB4(NJTRST)Digital_IOSignal terminal PB4(NJTRST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO, SPI2_NSS. Supported peripheral buses: SPI, PWM, SWD/JTAG.
A7VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A8PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: SPI.
A9PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI.
A10VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A11PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
A12PA14 (JTCK/SWCLK)Digital_IOSignal terminal PA14 (JTCK/SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14 (JTCK/SWCLK). Supported peripheral buses: SWD/JTAG.
A13PI2Digital_IOSignal terminal PI2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI2. Supported peripheral buses: SPI.
B1IOB1Digital_IOGeneral Purpose Digital I/O Pin IOB1
B2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
B3VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B4VCAPDigital_IOSignal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
B5BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
B6PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_RDYUSART10CK. Supported peripheral buses: UART, SPI.
B7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B8PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI.
B9PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_SCK, SPI3_MOSI. Supported peripheral buses: UART, SPI.
B10VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B11PA15(JTDI)Digital_IOSignal terminal PA15(JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, SWD/JTAG.
B12PI1Digital_IOSignal terminal PI1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
B13PI0Digital_IOSignal terminal PI0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI.
C1IOC1Digital_IOGeneral Purpose Digital I/O Pin IOC1
C2PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: SPI.
C3PI6Digital_IOSignal terminal PI6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI6. Supported peripheral buses: General.
C4PI4Digital_IOSignal terminal PI4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI4. Supported peripheral buses: General.
C5PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_RDYUART8RX. Supported peripheral buses: SPI.
C6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, I2C4_SMBA, SPI3_MOSI, SPI6_MOSIFDCAN2RX. Supported peripheral buses: UART, SPI, I2C.
C7PG14Digital_IOSignal terminal PG14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG14. Supported peripheral buses: UART.
C8PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_MISOUSART10TX. Supported peripheral buses: UART, SPI.
C9PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
C10PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
C11PI3Digital_IOSignal terminal PI3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI.
C12VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C13VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D3PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI_SAI1SDA. Supported peripheral buses: SPI.
D4PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
D5PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
D6PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: I2C.
D7PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_SCK. Supported peripheral buses: UART, SPI.
D8PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART, PWM.
D9PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: PWM.
D10PH14Digital_IOSignal terminal PH14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: PWM.
D11PH15Digital_IOSignal terminal PH15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH15. Supported peripheral buses: PWM.
D12PH13Digital_IOSignal terminal PH13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH13. Supported peripheral buses: UART.
D13VDDUSBPower_InPrimary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E1PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: I2C.
E2VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E3PI8Digital_IOSignal terminal PI8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI8. Supported peripheral buses: RTC/CLK.
E4PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
E5PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: UART, I2C.
E6PB3(JTDO/ TRACESWO)Digital_IOSignal terminal PB3(JTDO/ TRACESWO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA, SPI1_SCK, SPI3_SCK, SPI6_SCKSDMMC2D2. Supported peripheral buses: UART, SPI, I2C, SWD/JTAG.
E7PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI.
E8PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: SPI.
E9PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: UART.
E10PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART, PWM.
E11PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA, SPI2_SCK. Supported peripheral buses: UART, SPI, I2C, PWM.
E12PA13 (JTMS/SWDIO)Digital_IOSignal terminal PA13 (JTMS/SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13 (JTMS/SWDIO). Supported peripheral buses: SWD/JTAG.
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