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STM32F373V8T6 (LQFP-100(14x14)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F373V8T6

STID: C2688586LQFP-100(14x14) · 100 Pins · Pitch 0.50mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F373V8T6 (LQFP-100(14x14))1PE22PE33PE44PE55PE66IO37PC138PC14 N- OSC39PC15 U- OSC310PF911PF1012PF0 OSC IN -13PF1 - OSC_OU14NRST15PC016PC117PC218PC319PF220VSSA/VREF -21VDDA22VREF+23PA024PA125PA226PA327PF428VDD_229PA430PA531PA632PA733PC434PC535PB036PB137PB238PE739PE840PE941PE1042PE1143PE1244PE1345PE1446PE1547PB1048VREFSD -49VSSSD50VDDSD12100VDD_199VSS_198PE197PE096PB995PB894BOOT093PB792PB691PB590PB489PB388PD787PD686PD585PD484PD383PD282PD181PD080PC1279PC1178PC1077PA1576PA1475VDD_374VSS_373PF672PA1371PA1270PA1169PA1068PA967PA866PC965PC864PC763PC662PD1561PD1460PD1359PD1258PD1157PD1056PD955PD854PB1553PB1452VREFSD+51VDDSD3Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.868.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100E=14.00mm · Pitch e=0.50mmD=14.00mm-12-10-8-6-4-2024681012121086420-2-4-6-8-10-12mm
3. 3D CAD MODEL
Package Body: 14.00mm × 14.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (100/100)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
5PE6I/OMultiplexed I/O & Peripheral Pin PE6 (RTC/CLK)
6IO3I/OGPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)
7PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
8PC14 N- OSC32 I (1)_I/OMultiplexed I/O & Peripheral Pin PC14 N- OSC32 I (1)_ (RTC/CLK)
9PC15 U- OSC32 O T(1)_I/OMultiplexed I/O & Peripheral Pin PC15 U- OSC32 O T(1)_ (RTC/CLK)
10PF9I/OMultiplexed I/O & Peripheral Pin PF9 (General)
11PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
12PF0 OSC IN -_I/OMultiplexed I/O & Peripheral Pin PF0 OSC IN -_ (I2C, RTC/CLK)
13PF1 - OSC_OUTI/OMultiplexed I/O & Peripheral Pin PF1 - OSC_OUT (I2C, RTC/CLK)
14NRSTISystem Enable & Hardware Reset (NRST)
15PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC, PWM)
16PC1I/OMultiplexed I/O & Peripheral Pin PC1 (ADC, PWM)
17PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC, PWM)
18PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC, PWM)
19PF2I/OMultiplexed I/O & Peripheral Pin PF2 (I2C)
20VSSA/VREF -GNDGround Reference Pin (VSSA/VREF -)
21VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
22VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (DAC)
23PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
24PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, ADC, RTC/CLK)
25PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI, ADC)
26PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, SPI, ADC)
27PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
28VDD_2PowerPower Supply Input (VDD_2 — 3.3V VDD (Max 4.0V))
29PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC)
30PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC)
31PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC)
32PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC)
33PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
34PC5I/OMultiplexed I/O & Peripheral Pin PC5 (ADC)
35PB0I/OMultiplexed I/O & Peripheral Pin PB0 (SPI, ADC, PWM)
36PB1I/OMultiplexed I/O & Peripheral Pin PB1 (I2C, ADC)
37PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, ADC)
38PE7I/OMultiplexed I/O & Peripheral Pin PE7 (I2C, ADC)
39PE8I/OMultiplexed I/O & Peripheral Pin PE8 (I2C, ADC)
40PE9I/OMultiplexed I/O & Peripheral Pin PE9 (I2C, ADC)
41PE10I/OMultiplexed I/O & Peripheral Pin PE10 (I2C, ADC)
42PE11I/OMultiplexed I/O & Peripheral Pin PE11 (I2C, ADC)
43PE12I/OMultiplexed I/O & Peripheral Pin PE12 (I2C, ADC)
44PE13I/OMultiplexed I/O & Peripheral Pin PE13 (I2C, ADC)
45PE14I/OMultiplexed I/O & Peripheral Pin PE14 (I2C, ADC)
46PE15I/OMultiplexed I/O & Peripheral Pin PE15 (UART, I2C, ADC)
47PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C, ADC)
48VREFSD -I/OMultiplexed I/O & Peripheral Pin VREFSD - (I2C)
49VSSSDGNDExposed Thermal & Ground Pad (VSSSD)
50VDDSD12PowerPower Supply Input (VDDSD12 — 3.3V VDD (Max 4.0V))
51VDDSD3PowerPower Supply Input (VDDSD3 — 3.3V VDD (Max 4.0V))
52VREFSD+I/OMultiplexed I/O & Peripheral Pin VREFSD+ (I2C)
53PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, I2C, ADC)
54PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, I2C, ADC, RTC/CLK)
55PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART, SPI, I2C, ADC)
56PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART, I2C, ADC)
57PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART, I2C, ADC)
58PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, I2C, ADC)
59PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, I2C, ADC)
60PD13I/OMultiplexed I/O & Peripheral Pin PD13 (I2C, ADC)
61PD14I/OMultiplexed I/O & Peripheral Pin PD14 (I2C, ADC)
62PD15I/OMultiplexed I/O & Peripheral Pin PD15 (I2C, ADC)
63PC6I/OMultiplexed I/O & Peripheral Pin PC6 (SPI, PWM)
64PC7I/OMultiplexed I/O & Peripheral Pin PC7 (SPI, PWM)
65PC8I/OMultiplexed I/O & Peripheral Pin PC8 (SPI, PWM)
66PC9I/OMultiplexed I/O & Peripheral Pin PC9 (SPI, PWM)
67PA8I/OMultiplexed I/O & Peripheral Pin PA8 (SPI, I2C, RTC/CLK)
68PA9I/OMultiplexed I/O & Peripheral Pin PA9 (SPI, I2C, PWM)
69PA10I/OMultiplexed I/O & Peripheral Pin PA10 (SPI, I2C, PWM)
70PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
71PA12I/OMultiplexed I/O & Peripheral Pin PA12 (USB, UART, SPI, PWM)
72PA13I/OMultiplexed I/O & Peripheral Pin PA13 (UART, SPI, SWD/JTAG)
73PF6I/OMultiplexed I/O & Peripheral Pin PF6 (UART, SPI, I2C)
74VSS_3GNDGround Reference Pin (VSS_3)
75VDD_3PowerPower Supply Input (VDD_3 — 3.3V VDD (Max 4.0V))
76PA14I/OMultiplexed I/O & Peripheral Pin PA14 (I2C)
77PA15I/OMultiplexed I/O & Peripheral Pin PA15 (SPI, I2C)
78PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
79PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
80PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
81PD0I/OMultiplexed I/O & Peripheral Pin PD0 (CAN)
82PD1I/OMultiplexed I/O & Peripheral Pin PD1 (CAN)
83PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
84PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
85PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART, SPI)
86PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
87PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART, SPI)
88PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART, SPI)
89PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI, SWD/JTAG)
90PB4I/OMultiplexed I/O & Peripheral Pin PB4 (UART, SPI, PWM, SWD/JTAG)
91PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, I2C)
92PB6I/OMultiplexed I/O & Peripheral Pin PB6 (I2C, PWM)
93PB7I/OMultiplexed I/O & Peripheral Pin PB7 (I2C, PWM)
94BOOT0IInput-Only Pin BOOT0 (General)
95PB8I/OMultiplexed I/O & Peripheral Pin PB8 (SPI, I2C, PWM, CAN)
96PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, I2C, CAN)
97PE0I/OMultiplexed I/O & Peripheral Pin PE0 (UART)
98PE1I/OMultiplexed I/O & Peripheral Pin PE1 (UART)
99VSS_1GNDGround Reference Pin (VSS_1)
100VDD_1PowerPower Supply Input (VDD_1 — 3.3V VDD (Max 4.0V))
PIN 1 PE2
I/O
Multiplexed I/O & Peripheral Pin PE2 (General)
Design note: Alt: TSC_G7IO1TRACECLK_ ,
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 14 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F373V8T6 (ST · LQFP-100(14x14))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F373V8T6 (LQFP-100(14x14)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F373V8T6 (LQFP-100(14x14)) - 2. Standard Pinout (Top View)
True package pinout (100 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F373V8T6 (LQFP-100(14x14)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F373V8T6 (LQFP-100(14x14)) - 4. Package Dimensions (D×E×A)
LQFP-100(14x14) · 14.00×14.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F373V8T6 (LQFP-100(14x14)) - 5. Recommended Land Pattern
IPC-7351B Footprint (100 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F373V8T6 (LQFP-100(14x14)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (14 figures · Page 1/2)
Showing 1–12 of 14 uncropped original figures for STM32F373
P31 · p31_fig01EXACT PACKAGE
STM32F373V8T6 (LQFP-100(14x14)) — Figure 4. STM32F373xx LQFP100 pinout 6$$? 633? 0%�� 0%�� 0"�� 0"�� "//4��                          
Figure 4. STM32F373xx LQFP100 pinout 6$$? 633? 0% 0% 0" 0" "//4                          
P115 · p115_fig01EXACT PACKAGE
STM32F373V8T6 (LQFP-100(14x14)) — Figure 32. UFBGA100 - 100-pin, 7 x 7 mm, 0.50 mm pitch,
Figure 32. UFBGA100 - 100-pin, 7 x 7 mm, 0.50 mm pitch,
P116 · p116_fig01EXACT PACKAGE
STM32F373V8T6 (LQFP-100(14x14)) — Figure 33. UFBGA100 - 100-pin, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package recommended footprint
Figure 33. UFBGA100 - 100-pin, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package recommended footprint
P118 · p118_fig01EXACT PACKAGE
STM32F373V8T6 (LQFP-100(14x14)) — Figure 35. LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat package outline
Figure 35. LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat package outline
P120 · p120_fig01EXACT PACKAGE
STM32F373V8T6 (LQFP-100(14x14)) — Figure 36. LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat
Figure 36. LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat
P120 · p120_fig02EXACT PACKAGE
STM32F373V8T6 (LQFP-100(14x14)) — Figure 37. LQFP100 marking example (package top view)
Figure 37. LQFP100 marking example (package top view)
P1 · p01_fig01881×406px
STM32F373V8T6 (LQFP-100(14x14)) — • Memories - 64 to 256 Kbytes of Flash memory - 32 Kbytes of SRAM with HW parity check
• Memories - 64 to 256 Kbytes of Flash memory - 32 Kbytes of SRAM with HW parity check
P1 · p01_fig02888×433px
STM32F373V8T6 (LQFP-100(14x14)) — • 96-bit unique ID
• 96-bit unique ID
P75 · p75_fig011547×618px
STM32F373V8T6 (LQFP-100(14x14)) — Figure 14. Typical application with an 8 MHz crystal
Figure 14. Typical application with an 8 MHz crystal
P100 · p100_fig011751×902px
STM32F373V8T6 (LQFP-100(14x14)) — Figure 27. ADC accuracy characteristics
Figure 27. ADC accuracy characteristics
P100 · p100_fig021545×602px
STM32F373V8T6 (LQFP-100(14x14)) — Figure 28. Typical connection diagram using the ADC
Figure 28. Typical connection diagram using the ADC
P100 · p100_fig01P100
STM32F373V8T6 (LQFP-100(14x14)) — Datasheet Page 100 (p100_fig01)
Datasheet Page 100 (p100_fig01)
Page 1 / 2 (14 extracted figures)

Technical Specifications & Part Details (STM32F373V8T6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F373V8T6 (LQFP-100(14x14)) is a 100-pin embedded microcontroller unit (mcu) featuring a 14.00 × 14.00 × 1.40 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
72 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
44 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
14.00 × 14.00 × 1.40 mm (A1=0.10 mm)
Package family: LQFP (LQFP-100(14x14))
Pin Count & Lead PitchN / e
100 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol100 auto-grouped pins
OK
IPC-7351B Land Pattern100 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-100(14x14))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
14.00 × 14.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.40mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.25 mm
Pins / Total PadsTopology
100P / 100Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-100(14x14)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F373V8T6 (LQFP-100(14x14))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F373V8T6 (LQFP-100(14x14))?

Manufactured by ST, the STM32F373V8T6 is housed in a LQFP-100(14x14) package with 100 pins and a 0.50 mm lead pitch. Key pins include: 1 (PE2: Multiplexed I/O & Peripheral Pin PE2 (General)), 2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), 3 (PE4: Multiplexed I/O & Peripheral Pin PE4 (General)), 4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (General)), 5 (PE6: Multiplexed I/O & Peripheral Pin PE6 (RTC/CLK)), 6 (IO3: GPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)).

What are the IPC-7351B PCB Footprint dimensions for STM32F373V8T6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F373V8T6 (LQFP-100(14x14)) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.50 mm, and 100 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F373V8T6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F373V8T6 (ST, LQFP-100(14x14)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (100 pins) & STM32F373 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
3PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
4PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
5PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: RTC/CLK.
6IO3Digital_IOGPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)
7PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
8PC14 N- OSC32 I (1)_Digital_IOSignal terminal PC14 N- OSC32 I (1)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14 N- OSC32 I (1)_. Supported peripheral buses: RTC/CLK.
9PC15 U- OSC32 O T(1)_Digital_IOSignal terminal PC15 U- OSC32 O T(1)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15 U- OSC32 O T(1)_. Supported peripheral buses: RTC/CLK.
10PF9Digital_IOSignal terminal PF9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF9. Supported peripheral buses: General.
11PF10Digital_IOSignal terminal PF10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF10. Supported peripheral buses: General.
12PF0 OSC IN -_Digital_IOSignal terminal PF0 OSC IN -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA. Supported peripheral buses: I2C, RTC/CLK.
13PF1 - OSC_OUTDigital_IOSignal terminal PF1 - OSC_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SCL. Supported peripheral buses: I2C, RTC/CLK.
14NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
15PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC, PWM.
16PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: ADC, PWM.
17PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, ADC, PWM.
18PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, ADC, PWM.
19PF2Digital_IOSignal terminal PF2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SMBA. Supported peripheral buses: I2C.
20VSSA/VREF -GND0V electrical ground return terminal (VSSA/VREF -) for internal core logic, I/O drivers, and analog sub-blocks.
21VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
22VREF+AnalogSignal terminal VREF+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: DAC.
23PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
24PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI, ADC, RTC/CLK.
25PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI, ADC.
26PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, ADC.
27PF4Digital_IOSignal terminal PF4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
28VDD_2Power_InPrimary positive power supply input (VDD_2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
29PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, ADC.
30PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC.
31PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, ADC.
32PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC.
33PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
34PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: ADC.
35PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
36PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: I2C, ADC.
37PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: I2C, ADC.
38PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: I2C, ADC.
39PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: I2C, ADC.
40PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: I2C, ADC.
41PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: I2C, ADC.
42PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: I2C, ADC.
43PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE12. Supported peripheral buses: I2C, ADC.
44PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: I2C, ADC.
45PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: I2C, ADC.
46PE15Digital_IOSignal terminal PE15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: UART, I2C, ADC.
47PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, I2C, ADC.
48VREFSD -AnalogSignal terminal VREFSD - (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREFSD -. Supported peripheral buses: I2C.
49VSSSDGNDBottom exposed die attach pad (VSSSD) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
50VDDSD12Power_InPrimary positive power supply input (VDDSD12) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
51VDDSD3Power_InPrimary positive power supply input (VDDSD3) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
52VREFSD+Digital_IOSignal terminal VREFSD+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREFSD+. Supported peripheral buses: I2C.
53PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, I2C, ADC.
54PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, I2C, ADC, RTC/CLK.
55PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, I2C, ADC.
56PD9Digital_IOSignal terminal PD9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD9. Supported peripheral buses: UART, I2C, ADC.
57PD10Digital_IOSignal terminal PD10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD10. Supported peripheral buses: UART, I2C, ADC.
58PD11Digital_IOSignal terminal PD11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD11. Supported peripheral buses: UART, I2C, ADC.
59PD12Digital_IOSignal terminal PD12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD12. Supported peripheral buses: UART, I2C, ADC.
60PD13Digital_IOSignal terminal PD13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD13. Supported peripheral buses: I2C, ADC.
61PD14Digital_IOSignal terminal PD14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD14. Supported peripheral buses: I2C, ADC.
62PD15Digital_IOSignal terminal PD15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: I2C, ADC.
63PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: SPI, PWM.
64PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, PWM.
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