CH395L (LQFP-128(14x14)) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH395L

WCHID: C2685238LQFP-128(14x14) · 128 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH395L (LQFP-128(14x14))1VCC182GND3NC4GND5VCC186RSETE7VCC338NC9GND10RXP11RXN12VCC1813VCC1814TXP15TXN16GND17GND18VCC1819XI20XO21VCC3322GND23NC24NC25NC26VCC3327GND28VCC1829GND30VCC1831NC32NC33NC34NC35NC36NC37NC38NC39VCC3340NC41NC42NC43NC44NC45NC46NC47NC48GPIO049GPIO150GPIO251RDY#/GPIO352RST53SEL54VCC1855GND56VCC3357NC58NC59GPIO460GPIO561GPIO662GPIO763RSTI64GND128NC127NC126D7125D6124D5123D4122VCC33121D3120D2119D1118DO117SDO116SDI115SCK114SCS113TXD112RXD111NC110NC109GND108VCC18107WR#106RD#105NC104ELINK#103NC102NC101VCC33100PCS#99AO98INT#97NC96NC95NC94NC93NC92VCC3391NC90NC89NC88NC87NC86NC85NC84NC83VCC3382VCC1881NC80NC79NC78NC77NC76NC75NC74NC73NC72VCC3371GND70VCC3369NC68NC67NC66NC65GNDGrid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.286.481.376.271.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1-76.2-81.3-86.4mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128E=14.00mm · Pitch e=0.40mmD=14.00mm-12-10-8-6-4-2024681012121086420-2-4-6-8-10-12mm
3. 3D CAD MODEL
Package Body: 14.00mm × 14.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (128/128)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
2GNDGNDGround Reference Pin (GND)
3NCI/OMultiplexed I/O & Peripheral Pin NC (General)
4GNDGNDGround Reference Pin (GND)
5VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
6RSETEI/OMultiplexed I/O & Peripheral Pin RSETE (General)
7VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
8NCI/OMultiplexed I/O & Peripheral Pin NC (General)
9GNDGNDGround Reference Pin (GND)
10RXPI/OMultiplexed I/O & Peripheral Pin RXP (General)
11RXNI/OMultiplexed I/O & Peripheral Pin RXN (General)
12VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
13VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
14TXPI/OMultiplexed I/O & Peripheral Pin TXP (General)
15TXNI/OMultiplexed I/O & Peripheral Pin TXN (General)
16GNDGNDGround Reference Pin (GND)
17GNDGNDGround Reference Pin (GND)
18VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
19XII/OMultiplexed I/O & Peripheral Pin XI (RTC/CLK)
20XOI/OMultiplexed I/O & Peripheral Pin XO (RTC/CLK)
21VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
22GNDGNDGround Reference Pin (GND)
23NCI/OMultiplexed I/O & Peripheral Pin NC (General)
24NCI/OMultiplexed I/O & Peripheral Pin NC (General)
25NCI/OMultiplexed I/O & Peripheral Pin NC (General)
26VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
27GNDGNDGround Reference Pin (GND)
28VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
29GNDGNDGround Reference Pin (GND)
30VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
31NCI/OMultiplexed I/O & Peripheral Pin NC (General)
32NCI/OMultiplexed I/O & Peripheral Pin NC (General)
33NCI/OMultiplexed I/O & Peripheral Pin NC (General)
34NCI/OMultiplexed I/O & Peripheral Pin NC (General)
35NCI/OMultiplexed I/O & Peripheral Pin NC (General)
36NCI/OMultiplexed I/O & Peripheral Pin NC (General)
37NCI/OMultiplexed I/O & Peripheral Pin NC (General)
38NCI/OMultiplexed I/O & Peripheral Pin NC (General)
39VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
40NCI/OMultiplexed I/O & Peripheral Pin NC (General)
41NCI/OMultiplexed I/O & Peripheral Pin NC (General)
42NCI/OMultiplexed I/O & Peripheral Pin NC (General)
43NCI/OMultiplexed I/O & Peripheral Pin NC (General)
44NCI/OMultiplexed I/O & Peripheral Pin NC (General)
45NCI/OMultiplexed I/O & Peripheral Pin NC (General)
46NCI/OMultiplexed I/O & Peripheral Pin NC (General)
47NCI/OMultiplexed I/O & Peripheral Pin NC (General)
48GPIO0I/OMultiplexed I/O & Peripheral Pin GPIO0 (General)
49GPIO1I/OMultiplexed I/O & Peripheral Pin GPIO1 (General)
50GPIO2I/OMultiplexed I/O & Peripheral Pin GPIO2 (General)
51RDY#/GPIO3I/OMultiplexed I/O & Peripheral Pin RDY#/GPIO3 (General)
52RSTI/OMultiplexed I/O & Peripheral Pin RST (General)
53SELI/OMultiplexed I/O & Peripheral Pin SEL (General)
54VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
55GNDGNDGround Reference Pin (GND)
56VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
57NCI/OMultiplexed I/O & Peripheral Pin NC (General)
58NCI/OMultiplexed I/O & Peripheral Pin NC (General)
59GPIO4I/OMultiplexed I/O & Peripheral Pin GPIO4 (General)
60GPIO5I/OMultiplexed I/O & Peripheral Pin GPIO5 (General)
61GPIO6I/OMultiplexed I/O & Peripheral Pin GPIO6 (General)
62GPIO7I/OMultiplexed I/O & Peripheral Pin GPIO7 (General)
63RSTII/OMultiplexed I/O & Peripheral Pin RSTI (General)
64GNDGNDGround Reference Pin (GND)
65GNDGNDExposed Thermal & Ground Pad (GND)
66NCI/OMultiplexed I/O & Peripheral Pin NC (General)
67NCI/OMultiplexed I/O & Peripheral Pin NC (General)
68NCI/OMultiplexed I/O & Peripheral Pin NC (General)
69NCI/OMultiplexed I/O & Peripheral Pin NC (General)
70VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
71GNDGNDGround Reference Pin (GND)
72VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
73NCI/OMultiplexed I/O & Peripheral Pin NC (General)
74NCI/OMultiplexed I/O & Peripheral Pin NC (General)
75NCI/OMultiplexed I/O & Peripheral Pin NC (General)
76NCI/OMultiplexed I/O & Peripheral Pin NC (General)
77NCI/OMultiplexed I/O & Peripheral Pin NC (General)
78NCI/OMultiplexed I/O & Peripheral Pin NC (General)
79NCI/OMultiplexed I/O & Peripheral Pin NC (General)
80NCI/OMultiplexed I/O & Peripheral Pin NC (General)
81NCI/OMultiplexed I/O & Peripheral Pin NC (General)
82VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
83VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
84NCI/OMultiplexed I/O & Peripheral Pin NC (General)
85NCI/OMultiplexed I/O & Peripheral Pin NC (General)
86NCI/OMultiplexed I/O & Peripheral Pin NC (General)
87NCI/OMultiplexed I/O & Peripheral Pin NC (General)
88NCI/OMultiplexed I/O & Peripheral Pin NC (General)
89NCI/OMultiplexed I/O & Peripheral Pin NC (General)
90NCI/OMultiplexed I/O & Peripheral Pin NC (General)
91NCI/OMultiplexed I/O & Peripheral Pin NC (General)
92VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
93NCI/OMultiplexed I/O & Peripheral Pin NC (General)
94NCI/OMultiplexed I/O & Peripheral Pin NC (General)
95NCI/OMultiplexed I/O & Peripheral Pin NC (General)
96NCI/OMultiplexed I/O & Peripheral Pin NC (General)
97NCI/OMultiplexed I/O & Peripheral Pin NC (General)
98INT#I/OMultiplexed I/O & Peripheral Pin INT# (General)
99AOI/OMultiplexed I/O & Peripheral Pin AO (General)
100PCS#I/OMultiplexed I/O & Peripheral Pin PCS# (General)
101VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
102NCI/OMultiplexed I/O & Peripheral Pin NC (General)
103NCI/OMultiplexed I/O & Peripheral Pin NC (General)
104ELINK#I/OMultiplexed I/O & Peripheral Pin ELINK# (General)
105NCI/OMultiplexed I/O & Peripheral Pin NC (General)
106RD#I/OMultiplexed I/O & Peripheral Pin RD# (General)
107WR#I/OMultiplexed I/O & Peripheral Pin WR# (General)
108VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
109GNDGNDGround Reference Pin (GND)
110NCI/OMultiplexed I/O & Peripheral Pin NC (General)
111NCI/OMultiplexed I/O & Peripheral Pin NC (General)
112RXDI/OMultiplexed I/O & Peripheral Pin RXD (UART)
113TXDI/OMultiplexed I/O & Peripheral Pin TXD (UART)
114SCSI/OMultiplexed I/O & Peripheral Pin SCS (General)
115SCKI/OMultiplexed I/O & Peripheral Pin SCK (SPI)
116SDII/OMultiplexed I/O & Peripheral Pin SDI (General)
117SDOI/OMultiplexed I/O & Peripheral Pin SDO (General)
118DOI/OMultiplexed I/O & Peripheral Pin DO (General)
119D1I/OMultiplexed I/O & Peripheral Pin D1 (General)
120D2I/OMultiplexed I/O & Peripheral Pin D2 (General)
121D3I/OMultiplexed I/O & Peripheral Pin D3 (General)
122VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
123D4I/OMultiplexed I/O & Peripheral Pin D4 (General)
124D5I/OMultiplexed I/O & Peripheral Pin D5 (General)
125D6I/OMultiplexed I/O & Peripheral Pin D6 (General)
126D7I/OMultiplexed I/O & Peripheral Pin D7 (General)
127NCI/OMultiplexed I/O & Peripheral Pin NC (General)
128NCI/OMultiplexed I/O & Peripheral Pin NC (General)
PIN 1 VCC18
Power
Power Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
Design note: Primary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH395L (WCH · LQFP-128(14x14))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH395L (LQFP-128(14x14)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH395L (LQFP-128(14x14)) - 2. Standard Pinout (Top View)
True package pinout (128 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH395L (LQFP-128(14x14)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH395L (LQFP-128(14x14)) - 4. Package Dimensions (D×E×A)
LQFP-128(14x14) · 14.00×14.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH395L (LQFP-128(14x14)) - 5. Recommended Land Pattern
IPC-7351B Footprint (128 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH395L (LQFP-128(14x14)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)
Showing 1–8 of 8 uncropped original figures for CH395
P3 · p03_fig01EXACT PACKAGE
CH395L (LQFP-128(14x14)) — 封装形式 塑体尺寸 引脚间距 封装说明 订货型号 LQFP64M 10.0*10.0mm 0.5mm 19.7mil LQFP64M(10*10)贴片 CH395Q LQFP128 14.0*14.0mm 0.4mm 15.7mil 标准LQFP128 脚贴片 CH395L
封装形式 塑体尺寸 引脚间距 封装说明 订货型号 LQFP64M 10.0*10.0mm 0.5mm 19.7mil LQFP64M(10*10)贴片 CH395Q LQFP128 14.0*14.0mm 0.4mm 15.7mil 标准LQFP128 脚贴片 CH395L
P3 · p03_fig02EXACT PACKAGE
CH395L (LQFP-128(14x14)) — 封装形式 塑体尺寸 引脚间距 封装说明 订货型号 LQFP64M 10.0*10.0mm 0.5mm 19.7mil LQFP64M(10*10)贴片 CH395Q LQFP128 14.0*14.0mm 0.4mm 15.7mil 标准LQFP128 脚贴片 CH395L | 4、引脚 | CH395L 引脚号 | CH395Q 引脚号 | 引脚 名称 类型 引脚说明 | 7、21、26、39、 56、70、72、83、 92、101、122 | 2、12、17、 21、2
封装形式 塑体尺寸 引脚间距 封装说明 订货型号 LQFP64M 10.0*10.0mm 0.5mm 19.7mil LQFP64M(10*10)贴片 CH395Q LQFP128 14.0*14.0mm 0.4mm 15.7mil 标准LQFP128 脚贴片 CH395L | 4、引脚 | CH395L 引脚号 | CH395Q 引脚号 | 引脚 名称 类型 引脚说明 | 7、21、26、39、 56、70、72、83、 92、101、122 | 2、12、17、 21、2
P1 · p01_fig011746×1158px
CH395L (LQFP-128(14x14)) — 2、特点
2、特点
P2 · p02_fig011670×1659px
CH395L (LQFP-128(14x14)) — 3、封装
3、封装
P3 · p03_fig01P3
CH395L (LQFP-128(14x14)) — Datasheet Page 3 (p03_fig01)
Datasheet Page 3 (p03_fig01)
P3 · p03_fig02P3
CH395L (LQFP-128(14x14)) — Datasheet Page 3 (p03_fig02)
Datasheet Page 3 (p03_fig02)
P25 · p25_fig011658×1179px
CH395L (LQFP-128(14x14)) — 注:篇幅限制,上图为简图,省略掉了电源相关退耦电容电路等,为提高芯片稳定性,每个电源 引脚就近对地接一个0,1uF 退耦电容。详细原理图参考我司原理图文档CH395SCH.PDF。
注:篇幅限制,上图为简图,省略掉了电源相关退耦电容电路等,为提高芯片稳定性,每个电源 引脚就近对地接一个0,1uF 退耦电容。详细原理图参考我司原理图文档CH395SCH.PDF。
P26 · p26_fig011166×1032px
CH395L (LQFP-128(14x14)) — TCP 和UDP 是两种比较重要的传输层协议,两者都使用IP 作为网络层协议。 TCP 是一种面向连接的传输,能够提供可靠的字节流传输服务。 UDP 是一种简单的面向数据报的运输层协议,与TCP 不同的是UDP 无法保证数据报文准确达到目 的地。
TCP 和UDP 是两种比较重要的传输层协议,两者都使用IP 作为网络层协议。 TCP 是一种面向连接的传输,能够提供可靠的字节流传输服务。 UDP 是一种简单的面向数据报的运输层协议,与TCP 不同的是UDP 无法保证数据报文准确达到目 的地。

Technical Specifications & Part Details (CH395L)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH395L (LQFP-128(14x14)) is a 128-pin standard electronic & interconnect component featuring a 14.00 × 14.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, SPI, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
30.005 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
14.00 × 14.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-128(14x14))
Pin Count & Lead PitchN / e
128 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (GPIO0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol128 auto-grouped pins
OK
IPC-7351B Land Pattern128 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-128(14x14))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
14.00 × 14.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.40mm
Pad Size (W × L)Level B
0.24 × 1.25 mm
Pins / Total PadsTopology
128P / 128Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-128(14x14)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH395L (LQFP-128(14x14))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH395L (LQFP-128(14x14))?

Manufactured by WCH, the CH395L is housed in a LQFP-128(14x14) package with 128 pins and a 0.40 mm lead pitch. Key pins include: 1 (VCC18: Power Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)), 2 (GND: Ground Reference Pin (GND)), 3 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 4 (GND: Ground Reference Pin (GND)), 5 (VCC18: Power Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)), 6 (RSETE: Multiplexed I/O & Peripheral Pin RSETE (General)).

What are the IPC-7351B PCB Footprint dimensions for CH395L?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH395L (LQFP-128(14x14)) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.40 mm, and 128 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH395L?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH395L (WCH, LQFP-128(14x14)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (128 pins) & CH395 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
2GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
3NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
4GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
5VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
6RSETEDigital_IOSignal terminal RSETE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSETE. Supported peripheral buses: General.
7VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
8NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
9GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
10RXPDigital_IOSignal terminal RXP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RXP. Supported peripheral buses: General.
11RXNDigital_IOSignal terminal RXN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RXN. Supported peripheral buses: General.
12VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
13VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
14TXPDigital_IOSignal terminal TXP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TXP. Supported peripheral buses: General.
15TXNDigital_IOSignal terminal TXN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TXN. Supported peripheral buses: General.
16GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
17GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
18VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
19XIDigital_IOSignal terminal XI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XI. Supported peripheral buses: RTC/CLK.
20XODigital_IOSignal terminal XO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XO. Supported peripheral buses: RTC/CLK.
21VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
22GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
23NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
24NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
25NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
26VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
27GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
28VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
29GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
30VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
31NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
32NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
33NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
34NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
35NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
36NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
37NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
38NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
39VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
40NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
41NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
42NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
43NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
44NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
45NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
46NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
47NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
48GPIO0Digital_IOSignal terminal GPIO0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO0. Supported peripheral buses: General.
49GPIO1Digital_IOSignal terminal GPIO1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO1. Supported peripheral buses: General.
50GPIO2Digital_IOSignal terminal GPIO2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO2. Supported peripheral buses: General.
51RDY#/GPIO3Digital_IOSignal terminal RDY#/GPIO3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RDY#/GPIO3. Supported peripheral buses: General.
52RSTDigital_IOSignal terminal RST (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RST. Supported peripheral buses: General.
53SELDigital_IOSignal terminal SEL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEL. Supported peripheral buses: General.
54VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
55GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
56VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
57NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
58NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
59GPIO4Digital_IOSignal terminal GPIO4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO4. Supported peripheral buses: General.
60GPIO5Digital_IOSignal terminal GPIO5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO5. Supported peripheral buses: General.
61GPIO6Digital_IOSignal terminal GPIO6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO6. Supported peripheral buses: General.
62GPIO7Digital_IOSignal terminal GPIO7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO7. Supported peripheral buses: General.
63RSTIDigital_IOSignal terminal RSTI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSTI. Supported peripheral buses: General.
64GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.