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STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32H563MIY3QTR

STID: C26803533WLCSP-80(3.3x3.5) · 80 Pins · Pitch 0.35mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32H563MIY3QTR (WLCSP-80(3.3x3.5))A1VDDA3PD0A5PD2A7VDDA9VCAPB2VDDUSBB4PD1B6PB4B8VSSB10VBATC1PA12C3PC10C5PB3C7PB7C9PC13D2VSSD4PA15D6PB5D8BOOT0D10PC14-OSC32_IE1PA11E3PA14E5PC11E7PB6E9PB8F2PC9F4PA13F6PC12F8NRSTF10PC15-OSC32_OG1VDDG3PA8G5PA10G7PC1G9VSSH2VSSH4PA9H6PA6H8PC0H10VDDT10PA3T8VDDT6PE7T4VLXSMPST2VCAPR9PA4R7PB0R5PE9R3VDDSMPSR1VDDP10VDDAP8VSSP6PB1P4PB10P2VSSN9VSSAN7PC5N5PE8N3VSSSMPSN1PB14M10PC2M8PA2M6PC4M4PE10M2PB13L9PC3L7PA5L5PB2L3PB12L1PB15K10PH0-OSC_INK8PA0K6PA7K4PC7K2PD14J9PH1-OSC_OUTJ7PA1J5PC8J3PC6J1PD15Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.855.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9mm
2. 2D FOOTPRINT
A1A3A5A7A9B2B4B6B8B10C1C3C5C7C9D2D4D6D8D10E1E3E5E7E9F2F4F6F8F10G1G3G5G7G9H2H4H6H8H10J1J3J5J7J9K2K4K6K8K10L1L3L5L7L9M2M4M6M8M10N1N3N5N7N9P2P4P6P8P10R1R3R5R7R9T2T4T6T8T10E=3.50mm · Pitch e=0.35mmD=3.30mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 3.50mm × 3.30mm · Pitch: 0.35mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (80/80)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A3PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
A5PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
A7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A9VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
B2VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
B4PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
B6PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
B8VSSGNDGround Reference Pin (VSS)
B10VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
C1PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
C3PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
C5PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
C7PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
C9PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
D2VSSGNDGround Reference Pin (VSS)
D4PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
D6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
D8BOOT0IInput-Only Pin BOOT0 (General)
D10PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
E1PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
E3PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
E5PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
E7PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
E9PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
F2PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
F4PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
F6PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
F8NRSTISystem Enable & Hardware Reset (NRST)
F10PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
G1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G3PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
G5PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
G7PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
G9VSSGNDGround Reference Pin (VSS)
H2VSSGNDGround Reference Pin (VSS)
H4PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
H6PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
H8PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
H10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J1PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
J3PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
J5PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
J7PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
J9PH1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1-OSC_OUT (RTC/CLK)
K2PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
K4PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
K6PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
K8PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
K10PH0-OSC_INI/OMultiplexed I/O & Peripheral Pin PH0-OSC_IN (RTC/CLK)
L1PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
L3PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
L5PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
L7PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
L9PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
M2PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
M4PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
M6PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
M8PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
M10PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
N1PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
N3VSSSMPSGNDGround Reference Pin (VSSSMPS)
N5PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
N7PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
N9VSSAGNDGround Reference Pin (VSSA)
P2VSSGNDGround Reference Pin (VSS)
P4PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
P6PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
P8VSSGNDGround Reference Pin (VSS)
P10VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
R1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
R3VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
R5PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
R7PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
R9PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
T2VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
T4VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
T6PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
T8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
T10PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
PIN A1 VDD
Power
Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 16 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32H563MIY3QTR (ST · WLCSP-80(3.3x3.5))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) - 2. Standard Pinout (Top View)
True package pinout (80 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) - 4. Package Dimensions (D×E×A)
WLCSP-80(3.3x3.5) · 3.50×3.30mm · Pitch 0.35mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) - 5. Recommended Land Pattern
IPC-7351B Footprint (80 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (16 figures · Page 1/2)
Showing 1–12 of 16 uncropped original figures for STM32H562 / STM32H563
P65 · p65_fig01EXACT PACKAGE
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Figure 6. VFQFPN68 pinout VDD 64
Figure 6. VFQFPN68 pinout VDD 64
P65 · p65_fig02EXACT PACKAGE
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — 16
16
P1 · p01_fig01881×845px
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Arm® Cortex®-M33 32-bit MCU + TrustZone® + FPU, 375 DMIPS,
Arm® Cortex®-M33 32-bit MCU + TrustZone® + FPU, 375 DMIPS,
P64 · p64_fig011546×998px
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Figure 5. LQFP64 pinout VDD 61 1 3 4
Figure 5. LQFP64 pinout VDD 61 1 3 4
P65 · p65_fig01P65
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Datasheet Page 65 (p65_fig01)
Datasheet Page 65 (p65_fig01)
P65 · p65_fig02P65
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Datasheet Page 65 (p65_fig02)
Datasheet Page 65 (p65_fig02)
P125 · p125_fig011656×2111px
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Figure 21. Power supply scheme with SMPS SMPS disabled
Figure 21. Power supply scheme with SMPS SMPS disabled
P125 · p125_fig01P125
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Datasheet Page 125 (p125_fig01)
Datasheet Page 125 (p125_fig01)
P126 · p126_fig011752×2135px
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Figure 22. Power supply scheme with LDO
Figure 22. Power supply scheme with LDO
P153 · p153_fig011546×519px
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Figure 30. Typical application with an 8 MHz crystal
Figure 30. Typical application with an 8 MHz crystal
P211 · p211_fig011550×999px
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Figure 57. ADC accuracy characteristics
Figure 57. ADC accuracy characteristics
P211 · p211_fig021548×726px
STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) — Figure 58. Typical connection diagram when using the ADC with FT/TT pins
Figure 58. Typical connection diagram when using the ADC with FT/TT pins
Page 1 / 2 (16 extracted figures)

Technical Specifications & Part Details (STM32H563MIY3QTR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) is a 80-pin embedded microcontroller unit (mcu) featuring a 3.30 × 3.50 × 0.55 mm mechanical envelope (lead pitch e = 0.35 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
250 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
3.30 × 3.50 × 0.55 mm (A1=0.17 mm)
Package family: WLCSP (WLCSP-80(3.3x3.5))
Pin Count & Lead PitchN / e
80 Pins | Pitch e = 0.35 mm (13.8 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol80 auto-grouped pins
OK
IPC-7351B Land Pattern80 pads · Pitch 0.35mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-80(3.3x3.5))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
3.30 × 3.50 mm
Height (A) & Pitch (e)IPC-7351B
A=0.55mm · e=0.35mm
Pad Size (W × L)Level B
0.16 × 0.16 mm
Pins / Total PadsTopology
80P / 80Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-80(3.3x3.5)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32H563MIY3QTR (WLCSP-80(3.3x3.5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32H563MIY3QTR (WLCSP-80(3.3x3.5))?

Manufactured by ST, the STM32H563MIY3QTR is housed in a WLCSP-80(3.3x3.5) package with 80 pins and a 0.35 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A3 (PD0: Multiplexed I/O & Peripheral Pin PD0 (General)), A5 (PD2: Multiplexed I/O & Peripheral Pin PD2 (General)), A7 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A9 (VCAP: Multiplexed I/O & Peripheral Pin VCAP (General)), B2 (VDDUSB: Power Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))).

What are the IPC-7351B PCB Footprint dimensions for STM32H563MIY3QTR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H563MIY3QTR (WLCSP-80(3.3x3.5)) has a nominal body envelope of 3.50 × 3.30 mm, pitch e = 0.35 mm, and 80 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H563MIY3QTR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H563MIY3QTR (ST, WLCSP-80(3.3x3.5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (80 pins) & STM32H562 / STM32H563 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A3PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
A5PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
A7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A9VCAPDigital_IOSignal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General.
B2VDDUSBPower_InPrimary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B4PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
B6PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
B8VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B10VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C1PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
C3PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
C5PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
C7PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
C9PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
D2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D4PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
D6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
D8BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
D10PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
E1PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
E3PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
E5PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
E7PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
E9PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
F2PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: General.
F4PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
F6PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
F8NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
F10PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
G1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
G3PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
G5PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
G7PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General.
G9VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
H2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
H4PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
H6PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
H8PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: General.
H10VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
J1PD15Digital_IOSignal terminal PD15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: General.
J3PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
J5PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
J7PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
J9PH1-OSC_OUTDigital_IOSignal terminal PH1-OSC_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH1-OSC_OUT. Supported peripheral buses: RTC/CLK.
K2PD14Digital_IOSignal terminal PD14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD14. Supported peripheral buses: General.
K4PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
K6PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
K8PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
K10PH0-OSC_INDigital_IOSignal terminal PH0-OSC_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH0-OSC_IN. Supported peripheral buses: RTC/CLK.
L1PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
L3PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
L5PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
L7PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
L9PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: General.
M2PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
M4PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: General.
M6PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: General.
M8PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
M10PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General.
N1PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
N3VSSSMPSGND0V electrical ground return terminal (VSSSMPS) for internal core logic, I/O drivers, and analog sub-blocks.
N5PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: General.
N7PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: General.
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