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ZL30621LFF7 (LGA-64(10x5)) — Symbol, Footprint IPC-7351B & 3D STEP Model

ZL30621LFF7

MICROCHIPID: C2669234LGA-64(10x5) · 66 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ZL30621LFF7 (LGA-64(10x5))1VDDO2_A2OC2P_A3OC2N_A4AVDD33_A5OC1N_A6OC1P_A7VDDO1_A8TEST/GPIO2_A9AC1/GPIO1_A10AC0/GPIO0_A11DVDD18_B12RSTN_B13SCL/SCLK_B14IF0/CSN_B15IF1/MISO_B16SDA/MOSI_B17DVDD33_B18IC3P/GPIO3_B19IC2N_B20IC2P_B21IC1N_B22IC1P_B23VDDXO33_B24XA_B25XB_B26AVDD18_B27AVDD18_B28OC3N_B29OC3P_B30VDDO3_B31AVDD18_B32AVDD18_B33VDDO2_B66VSS_B65VSS_A64AVDD18_A63AVDD18_A62VDDO3_A61OC3P_A60OC3N_A59AVDD18_A58AVDD18_A57XB_A56XA_A55VDDXO33_A54IC1P_A53IC1N_A52IC2P_A51IC2N_A50IC3P/GPIO3_A49DVDD33_A48SDA_MOSI_A47IF1/MISO_A46IF0/CSN_A45SCL/SCLK_A44RSTN_A43DVDD18_A42AC0/GPIO0_B41AC1/GPIO1_B40TEST/GPIO2_B39VDDO1_B38OC1P_B37OC1N_B36AVDD33_B35OC2N_B34OC2P_BGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.848.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3mm
2. 2D FOOTPRINT
666564636261605958575655545352515049484746454443424140393837363534333231302928272625242322212019181716151413121110987654321E=5.00mm · Pitch e=0.40mmD=10.00mm-5-4-3-2-1012345876543210-1-2-3-4-5-6-7-8mm
3. 3D CAD MODEL
Package Body: 5.00mm × 10.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (66/66)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VDDO2_APowerPower Supply Input (VDDO2_A — 1.5V to 3.3V)
2OC2P_AI/OMultiplexed I/O & Peripheral Pin OC2P_A (General)
3OC2N_AI/OMultiplexed I/O & Peripheral Pin OC2N_A (General)
4AVDD33_APowerPower Supply Input (AVDD33_A — 1.5V to 3.3V)
5OC1N_AI/OMultiplexed I/O & Peripheral Pin OC1N_A (General)
6OC1P_AI/OMultiplexed I/O & Peripheral Pin OC1P_A (General)
7VDDO1_APowerPower Supply Input (VDDO1_A — 1.5V to 3.3V)
8TEST/GPIO2_AI/OMultiplexed I/O & Peripheral Pin TEST/GPIO2_A (General)
9AC1/GPIO1_AI/OMultiplexed I/O & Peripheral Pin AC1/GPIO1_A (General)
10AC0/GPIO0_AI/OMultiplexed I/O & Peripheral Pin AC0/GPIO0_A (General)
11DVDD18_BPowerPower Supply Input (DVDD18_B — 1.5V to 3.3V)
12RSTN_BI/OMultiplexed I/O & Peripheral Pin RSTN_B (General)
13SCL/SCLK_BI/OMultiplexed I/O & Peripheral Pin SCL/SCLK_B (SPI, I2C)
14IF0/CSN_BI/OMultiplexed I/O & Peripheral Pin IF0/CSN_B (SPI)
15IF1/MISO_BI/OMultiplexed I/O & Peripheral Pin IF1/MISO_B (SPI)
16SDA/MOSI_BI/OMultiplexed I/O & Peripheral Pin SDA/MOSI_B (SPI, I2C)
17DVDD33_BPowerPower Supply Input (DVDD33_B — 1.5V to 3.3V)
18IC3P/GPIO3_BI/OMultiplexed I/O & Peripheral Pin IC3P/GPIO3_B (General)
19IC2N_BI/OMultiplexed I/O & Peripheral Pin IC2N_B (General)
20IC2P_BI/OMultiplexed I/O & Peripheral Pin IC2P_B (General)
21IC1N_BI/OMultiplexed I/O & Peripheral Pin IC1N_B (General)
22IC1P_BI/OMultiplexed I/O & Peripheral Pin IC1P_B (General)
23VDDXO33_BPowerPower Supply Input (VDDXO33_B — 1.5V to 3.3V)
24XA_BI/OMultiplexed I/O & Peripheral Pin XA_B (General)
25XB_BI/OMultiplexed I/O & Peripheral Pin XB_B (General)
26AVDD18_BPowerPower Supply Input (AVDD18_B — 1.5V to 3.3V)
27AVDD18_BPowerPower Supply Input (AVDD18_B — 1.5V to 3.3V)
28OC3N_BI/OMultiplexed I/O & Peripheral Pin OC3N_B (General)
29OC3P_BI/OMultiplexed I/O & Peripheral Pin OC3P_B (General)
30VDDO3_BPowerPower Supply Input (VDDO3_B — 1.5V to 3.3V)
31AVDD18_BPowerPower Supply Input (AVDD18_B — 1.5V to 3.3V)
32AVDD18_BPowerPower Supply Input (AVDD18_B — 1.5V to 3.3V)
33VDDO2_BPowerPower Supply Input (VDDO2_B — 1.5V to 3.3V)
34OC2P_BI/OMultiplexed I/O & Peripheral Pin OC2P_B (General)
35OC2N_BI/OMultiplexed I/O & Peripheral Pin OC2N_B (General)
36AVDD33_BPowerPower Supply Input (AVDD33_B — 1.5V to 3.3V)
37OC1N_BI/OMultiplexed I/O & Peripheral Pin OC1N_B (General)
38OC1P_BI/OMultiplexed I/O & Peripheral Pin OC1P_B (General)
39VDDO1_BPowerPower Supply Input (VDDO1_B — 1.5V to 3.3V)
40TEST/GPIO2_BI/OMultiplexed I/O & Peripheral Pin TEST/GPIO2_B (General)
41AC1/GPIO1_BI/OMultiplexed I/O & Peripheral Pin AC1/GPIO1_B (General)
42AC0/GPIO0_BI/OMultiplexed I/O & Peripheral Pin AC0/GPIO0_B (General)
43DVDD18_APowerPower Supply Input (DVDD18_A — 1.5V to 3.3V)
44RSTN_AI/OMultiplexed I/O & Peripheral Pin RSTN_A (General)
45SCL/SCLK_AI/OMultiplexed I/O & Peripheral Pin SCL/SCLK_A (SPI, I2C)
46IF0/CSN_AI/OMultiplexed I/O & Peripheral Pin IF0/CSN_A (SPI)
47IF1/MISO_AI/OMultiplexed I/O & Peripheral Pin IF1/MISO_A (SPI)
48SDA_MOSI_AI/OMultiplexed I/O & Peripheral Pin SDA_MOSI_A (SPI, I2C)
49DVDD33_APowerPower Supply Input (DVDD33_A — 1.5V to 3.3V)
50IC3P/GPIO3_AI/OMultiplexed I/O & Peripheral Pin IC3P/GPIO3_A (General)
51IC2N_AI/OMultiplexed I/O & Peripheral Pin IC2N_A (General)
52IC2P_AI/OMultiplexed I/O & Peripheral Pin IC2P_A (General)
53IC1N_AI/OMultiplexed I/O & Peripheral Pin IC1N_A (General)
54IC1P_AI/OMultiplexed I/O & Peripheral Pin IC1P_A (General)
55VDDXO33_APowerPower Supply Input (VDDXO33_A — 1.5V to 3.3V)
56XA_AI/OMultiplexed I/O & Peripheral Pin XA_A (General)
57XB_AI/OMultiplexed I/O & Peripheral Pin XB_A (General)
58AVDD18_APowerPower Supply Input (AVDD18_A — 1.5V to 3.3V)
59AVDD18_APowerPower Supply Input (AVDD18_A — 1.5V to 3.3V)
60OC3N_AI/OMultiplexed I/O & Peripheral Pin OC3N_A (General)
61OC3P_AI/OMultiplexed I/O & Peripheral Pin OC3P_A (General)
62VDDO3_APowerPower Supply Input (VDDO3_A — 1.5V to 3.3V)
63AVDD18_APowerPower Supply Input (AVDD18_A — 1.5V to 3.3V)
64AVDD18_APowerPower Supply Input (AVDD18_A — 1.5V to 3.3V)
65VSS_AGNDExposed Thermal & Ground Pad (VSS_A)
66VSS_BGNDGround Reference Pin (VSS_B)
PIN 1 VDDO2_A
Power
Power Supply Input (VDDO2_A — 1.5V to 3.3V)
Design note: Primary positive power supply input (VDDO2_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ZL30621LFF7 (MICROCHIP · LGA-64(10x5))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ZL30621LFF7 (LGA-64(10x5)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ZL30621LFF7 (LGA-64(10x5)) - 2. Standard Pinout (Top View)
True package pinout (66 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ZL30621LFF7 (LGA-64(10x5)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ZL30621LFF7 (LGA-64(10x5)) - 4. Package Dimensions (D×E×A)
LGA-64(10x5) · 5.00×10.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
ZL30621LFF7 (LGA-64(10x5)) - 5. Recommended Land Pattern
IPC-7351B Footprint (66 Pads)Expand ›
6. Application SchematicSCHEMATIC
ZL30621LFF7 (LGA-64(10x5)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)
Showing 1–9 of 9 uncropped original figures for ZL30621
P4 · p04_fig01EXACT PACKAGE
ZL30621LFF7 (LGA-64(10x5)) — Figure 4 - Pin Diagram
Figure 4 - Pin Diagram
P1 · p01_fig01886×169px
ZL30621LFF7 (LGA-64(10x5)) — Features
Features
P1 · p01_fig021942×1025px
ZL30621LFF7 (LGA-64(10x5)) — Figure 1 - Functional Block Diagram
Figure 1 - Functional Block Diagram
P2 · p02_fig011920×562px
ZL30621LFF7 (LGA-64(10x5)) — Figure 2 - Telecom Timing Card Application, TCXO + Crystal/XO for Lowest Jitter
Figure 2 - Telecom Timing Card Application, TCXO + Crystal/XO for Lowest Jitter
P2 · p02_fig021915×466px
ZL30621LFF7 (LGA-64(10x5)) — Figure 2 - Telecom Timing Card Application, TCXO + Crystal/XO for Lowest Jitter
Figure 2 - Telecom Timing Card Application, TCXO + Crystal/XO for Lowest Jitter
P2 · p02_fig01P2
ZL30621LFF7 (LGA-64(10x5)) — Datasheet Page 2 (p02_fig01)
Datasheet Page 2 (p02_fig01)
P4 · p04_fig01P4
ZL30621LFF7 (LGA-64(10x5)) — Datasheet Page 4 (p04_fig01)
Datasheet Page 4 (p04_fig01)
P5 · p05_fig011639×2233px
ZL30621LFF7 (LGA-64(10x5)) — 4. Mechanical Drawing
4. Mechanical Drawing
P5 · p05_fig01P5
ZL30621LFF7 (LGA-64(10x5)) — Datasheet Page 5 (p05_fig01)
Datasheet Page 5 (p05_fig01)

Technical Specifications & Part Details (ZL30621LFF7)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:ZL30621LFF7 (LGA-64(10x5)) is a 64-pin standard electronic & interconnect component featuring a 10.00 × 5.00 × 1.15 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.5V to 3.3V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated SPI, I2C interfaces.
Operating Supply VoltageV_CC / V_DD
1.5V to 3.3V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
10MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
10.00 × 5.00 × 1.15 mm (A1=0.03 mm)
Package family: LGA (LGA-64(10x5))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
SPI, I2C
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol66 auto-grouped pins
OK
IPC-7351B Land Pattern66 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LGA-64(10x5))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 5.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.15mm · e=0.40mm
Pad Size (W × L)Level B
0.22 × 0.70 mm
Pins / Total PadsTopology
66P / 66Pad (LGA_ARRAY)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LGA-64(10x5)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — ZL30621LFF7 (LGA-64(10x5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ZL30621LFF7 (LGA-64(10x5))?

Manufactured by MICROCHIP, the ZL30621LFF7 is housed in a LGA-64(10x5) package with 66 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.5V to 3.3V. Key pins include: 1 (VDDO2_A: Power Supply Input (VDDO2_A — 1.5V to 3.3V)), 2 (OC2P_A: Multiplexed I/O & Peripheral Pin OC2P_A (General)), 3 (OC2N_A: Multiplexed I/O & Peripheral Pin OC2N_A (General)), 4 (AVDD33_A: Power Supply Input (AVDD33_A — 1.5V to 3.3V)), 5 (OC1N_A: Multiplexed I/O & Peripheral Pin OC1N_A (General)), 6 (OC1P_A: Multiplexed I/O & Peripheral Pin OC1P_A (General)).

What are the IPC-7351B PCB Footprint dimensions for ZL30621LFF7?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ZL30621LFF7 (LGA-64(10x5)) has a nominal body envelope of 5.00 × 10.00 mm, pitch e = 0.40 mm, and 66 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ZL30621LFF7?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ZL30621LFF7 (MICROCHIP, LGA-64(10x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (66 pins) & ZL30621 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VDDO2_APower_InPrimary positive power supply input (VDDO2_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
2OC2P_ADigital_IOSignal terminal OC2P_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC2P_A. Supported peripheral buses: General.
3OC2N_ADigital_IOSignal terminal OC2N_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC2N_A. Supported peripheral buses: General.
4AVDD33_APower_InPrimary positive power supply input (AVDD33_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
5OC1N_ADigital_IOSignal terminal OC1N_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC1N_A. Supported peripheral buses: General.
6OC1P_ADigital_IOSignal terminal OC1P_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC1P_A. Supported peripheral buses: General.
7VDDO1_APower_InPrimary positive power supply input (VDDO1_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
8TEST/GPIO2_ADigital_IOSignal terminal TEST/GPIO2_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: TEST/GPIO2_A. Supported peripheral buses: General.
9AC1/GPIO1_ADigital_IOSignal terminal AC1/GPIO1_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: AC1/GPIO1_A. Supported peripheral buses: General.
10AC0/GPIO0_ADigital_IOSignal terminal AC0/GPIO0_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: AC0/GPIO0_A. Supported peripheral buses: General.
11DVDD18_BPower_InPrimary positive power supply input (DVDD18_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
12RSTN_BDigital_IOSignal terminal RSTN_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: RSTN_B. Supported peripheral buses: General.
13SCL/SCLK_BDigital_IOSignal terminal SCL/SCLK_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: SCL/SCLK_B. Supported peripheral buses: SPI, I2C.
14IF0/CSN_BDigital_IOSignal terminal IF0/CSN_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IF0/CSN_B. Supported peripheral buses: SPI.
15IF1/MISO_BDigital_IOSignal terminal IF1/MISO_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IF1/MISO_B. Supported peripheral buses: SPI.
16SDA/MOSI_BDigital_IOSignal terminal SDA/MOSI_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: SDA/MOSI_B. Supported peripheral buses: SPI, I2C.
17DVDD33_BPower_InPrimary positive power supply input (DVDD33_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
18IC3P/GPIO3_BDigital_IOSignal terminal IC3P/GPIO3_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC3P/GPIO3_B. Supported peripheral buses: General.
19IC2N_BDigital_IOSignal terminal IC2N_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC2N_B. Supported peripheral buses: General.
20IC2P_BDigital_IOSignal terminal IC2P_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC2P_B. Supported peripheral buses: General.
21IC1N_BDigital_IOSignal terminal IC1N_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC1N_B. Supported peripheral buses: General.
22IC1P_BDigital_IOSignal terminal IC1P_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC1P_B. Supported peripheral buses: General.
23VDDXO33_BPower_InPrimary positive power supply input (VDDXO33_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
24XA_BDigital_IOSignal terminal XA_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: XA_B. Supported peripheral buses: General.
25XB_BDigital_IOSignal terminal XB_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: XB_B. Supported peripheral buses: General.
26AVDD18_BPower_InPrimary positive power supply input (AVDD18_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
27AVDD18_BPower_InPrimary positive power supply input (AVDD18_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
28OC3N_BDigital_IOSignal terminal OC3N_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC3N_B. Supported peripheral buses: General.
29OC3P_BDigital_IOSignal terminal OC3P_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC3P_B. Supported peripheral buses: General.
30VDDO3_BPower_InPrimary positive power supply input (VDDO3_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
31AVDD18_BPower_InPrimary positive power supply input (AVDD18_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
32AVDD18_BPower_InPrimary positive power supply input (AVDD18_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
33VDDO2_BPower_InPrimary positive power supply input (VDDO2_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
34OC2P_BDigital_IOSignal terminal OC2P_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC2P_B. Supported peripheral buses: General.
35OC2N_BDigital_IOSignal terminal OC2N_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC2N_B. Supported peripheral buses: General.
36AVDD33_BPower_InPrimary positive power supply input (AVDD33_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
37OC1N_BDigital_IOSignal terminal OC1N_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC1N_B. Supported peripheral buses: General.
38OC1P_BDigital_IOSignal terminal OC1P_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC1P_B. Supported peripheral buses: General.
39VDDO1_BPower_InPrimary positive power supply input (VDDO1_B) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
40TEST/GPIO2_BDigital_IOSignal terminal TEST/GPIO2_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: TEST/GPIO2_B. Supported peripheral buses: General.
41AC1/GPIO1_BDigital_IOSignal terminal AC1/GPIO1_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: AC1/GPIO1_B. Supported peripheral buses: General.
42AC0/GPIO0_BDigital_IOSignal terminal AC0/GPIO0_B (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: AC0/GPIO0_B. Supported peripheral buses: General.
43DVDD18_APower_InPrimary positive power supply input (DVDD18_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
44RSTN_ADigital_IOSignal terminal RSTN_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: RSTN_A. Supported peripheral buses: General.
45SCL/SCLK_ADigital_IOSignal terminal SCL/SCLK_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: SCL/SCLK_A. Supported peripheral buses: SPI, I2C.
46IF0/CSN_ADigital_IOSignal terminal IF0/CSN_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IF0/CSN_A. Supported peripheral buses: SPI.
47IF1/MISO_ADigital_IOSignal terminal IF1/MISO_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IF1/MISO_A. Supported peripheral buses: SPI.
48SDA_MOSI_ADigital_IOSignal terminal SDA_MOSI_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: SDA_MOSI_A. Supported peripheral buses: SPI, I2C.
49DVDD33_APower_InPrimary positive power supply input (DVDD33_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
50IC3P/GPIO3_ADigital_IOSignal terminal IC3P/GPIO3_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC3P/GPIO3_A. Supported peripheral buses: General.
51IC2N_ADigital_IOSignal terminal IC2N_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC2N_A. Supported peripheral buses: General.
52IC2P_ADigital_IOSignal terminal IC2P_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC2P_A. Supported peripheral buses: General.
53IC1N_ADigital_IOSignal terminal IC1N_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC1N_A. Supported peripheral buses: General.
54IC1P_ADigital_IOSignal terminal IC1P_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: IC1P_A. Supported peripheral buses: General.
55VDDXO33_APower_InPrimary positive power supply input (VDDXO33_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
56XA_ADigital_IOSignal terminal XA_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: XA_A. Supported peripheral buses: General.
57XB_ADigital_IOSignal terminal XB_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: XB_A. Supported peripheral buses: General.
58AVDD18_APower_InPrimary positive power supply input (AVDD18_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
59AVDD18_APower_InPrimary positive power supply input (AVDD18_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
60OC3N_ADigital_IOSignal terminal OC3N_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC3N_A. Supported peripheral buses: General.
61OC3P_ADigital_IOSignal terminal OC3P_A (I/O, 1.5V to 3.3V domain). Multiplexed alternate functions: OC3P_A. Supported peripheral buses: General.
62VDDO3_APower_InPrimary positive power supply input (VDDO3_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
63AVDD18_APower_InPrimary positive power supply input (AVDD18_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
64AVDD18_APower_InPrimary positive power supply input (AVDD18_A) operating in the 1.5V to 3.3V domain (Max rating: 3.3V).
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