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STM32H7R3L8H6 (TFBGA-225(13x13)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32H7R3L8H6

STID: C23898422TFBGA-225(13x13) · 225 Pins · Pitch 0.80mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32H7R3L8H6 (TFBGA-225(13x13))A1VSSA2PE0A3PF3A4PF2A5PG3A6BOOT0A7PM12A8VSSA9PM6A10PM3A11VSSA12PD3A13PE14A14PD2A15VSSB1PB8B2PE2B3PB5B4PF4B5PF0B6PD7B7PM11B8PM9B9PM5B10PM2B11PG0B12PE13B13PD1B14PC10B15PC11C1VBATC2PB9C3PE1C4PB3C5PF1C6PG2C7PM13C8PM14C9PM8C10PM1C11PD4C12PE11C13PD0C14PA12C15PA11D1PC15-OSC32_OD2PC14-OSC32_ID3VSSD4PB7D5PB4D6VSSD7PD5D8DVDDD9VDD50USBD10PM0D11PE15D12PC12D13PA14D14PA9D15PC8E1PE6E2PE4E3VSSE4PC13E5PB6E6VCAP4E7PD6E8VSSUSBE9VSSE10PG1E11PE12E12PA13E13PA10E14PC9E15PC6F1PG14F2PG12F3PG11F4PE5F5PE3F6VSSF7VDDF8VDD33USBF9VDDF10VDDF11VCAP3F12PA8F13PC7F14PN1F15VSSG1VLXSMPSG2VFBSMPSG3PF5G4PG15G5PG13G6VDDG7VDDLDOG8VSSG9VDDLDOG10VSSG11PA15G12VSSG13PN3G14PN0G15PN11H1VDDSMPSH2VSSSMPSH3PF8H4PF7H5PF6H6VDDH7VSSH8VSSR15VSSR14PD10R13PG10R12VSSR11PP6R10PO4R9PO5R8PP4R7PG9R6VSSR5PE10R4PE8R3PF12R2PB1R1VSSP15PB10P14PD13P13PD9P12PP1P11PO2P10PP5P9VSSP8PO1P7PG8P6PG5P5PE9P4PF14P3PF13P2PB0P1PA6N15PB13N14PB11N13PD12N12PO0N11PP7N10PP0N9PP3N8PP2N7PG7N6PG4N5PF15N4PB2N3PC5N2PA5N1PA3M15VSSM14PB15M13PB14M12PD11M11PD8M10VDDXSPI1M9VSSM8VSSM7PG6M6PE7M5PF11M4PA7M3PA4M2PA1M1PA0L15PN12L14PD14L13PD15L12PB12L11VSSL10VDDXSPI1L9VDDL8VDDXSPI1L7VCAP1L6VSSL5PC4L4PA2L3PC3L2PC2L1PC1K15PN5K14PN4K13PN8K12VDDXSPI2K11VCAP2K10VDDK9VSSK8VDDK7VSSK6VDDK5VREFPK4VREFMK3PC0K2PH1-OSC_OUTK1PH0-OSC_INJ15VSSJ14PN6J13PN7J12VSSJ11VDDXSPI2J10VSSJ9VDDLDOJ8VSSJ7VDDLDOJ6VDDAJ5VSSAJ4NRSTJ3PF10J2PF9J1VSSH15PN2H14PN9H13PN10H12VDDXSPI2H11VSSH10VDDH9VSSGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8149.9144.8139.7134.6129.5124.5119.4114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3-119.4-124.5-129.5-134.6-139.7-144.8-149.9mm
2. 2D FOOTPRINT
A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15C1C2C3C4C5C6C7C8C9C10C11C12C13C14C15D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15E1E2E3E4E5E6E7E8E9E10E11E12E13E14E15F1F2F3F4F5F6F7F8F9F10F11F12F13F14F15G1G2G3G4G5G6G7G8G9G10G11G12G13G14G15H1H2H3H4H5H6H7H8H9H10H11H12H13H14H15J1J2J3J4J5J6J7J8J9J10J11J12J13J14J15K1K2K3K4K5K6K7K8K9K10K11K12K13K14K15L1L2L3L4L5L6L7L8L9L10L11L12L13L14L15M1M2M3M4M5M6M7M8M9M10M11M12M13M14M15N1N2N3N4N5N6N7N8N9N10N11N12N13N14N15P1P2P3P4P5P6P7P8P9P10P11P12P13P14P15R1R2R3R4R5R6R7R8R9R10R11R12R13R14R15E=13.00mm · Pitch e=0.80mmD=13.00mm-10-8-6-4-202468101086420-2-4-6-8-10mm
3. 3D CAD MODEL
Package Body: 13.00mm × 13.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (225/225)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VSSGNDGround Reference Pin (VSS)
A2PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
A3PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
A4PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
A5PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
A6BOOT0IInput-Only Pin BOOT0 (General)
A7PM12I/OMultiplexed I/O & Peripheral Pin PM12 (General)
A8VSSGNDGround Reference Pin (VSS)
A9PM6I/OMultiplexed I/O & Peripheral Pin PM6 (General)
A10PM3I/OMultiplexed I/O & Peripheral Pin PM3 (General)
A11VSSGNDGround Reference Pin (VSS)
A12PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
A13PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
A14PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
A15VSSGNDGround Reference Pin (VSS)
B1PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
B2PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
B3PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
B4PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
B5PF0I/OMultiplexed I/O & Peripheral Pin PF0 (General)
B6PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
B7PM11I/OMultiplexed I/O & Peripheral Pin PM11 (General)
B8PM9I/OMultiplexed I/O & Peripheral Pin PM9 (General)
B9PM5I/OMultiplexed I/O & Peripheral Pin PM5 (General)
B10PM2I/OMultiplexed I/O & Peripheral Pin PM2 (General)
B11PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
B12PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
B13PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
B14PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
B15PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
C1VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
C2PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
C3PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
C4PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
C5PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
C6PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
C7PM13I/OMultiplexed I/O & Peripheral Pin PM13 (General)
C8PM14I/OMultiplexed I/O & Peripheral Pin PM14 (General)
C9PM8I/OMultiplexed I/O & Peripheral Pin PM8 (General)
C10PM1I/OMultiplexed I/O & Peripheral Pin PM1 (General)
C11PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
C12PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
C13PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
C14PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
C15PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
D1PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
D2PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
D3VSSGNDGround Reference Pin (VSS)
D4PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
D5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
D6VSSGNDGround Reference Pin (VSS)
D7PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
D8DVDDPowerPower Supply Input (DVDD — 3.3V VDD (Max 4.0V))
D9VDD50USBPowerPower Supply Input (VDD50USB — 3.3V VDD (Max 4.0V))
D10PM0I/OMultiplexed I/O & Peripheral Pin PM0 (General)
D11PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
D12PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
D13PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
D14PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
D15PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
E1PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
E2PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
E3VSSGNDGround Reference Pin (VSS)
E4PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
E5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
E6VCAP4I/OMultiplexed I/O & Peripheral Pin VCAP4 (General)
E7PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
E8VSSUSBGNDGround Reference Pin (VSSUSB)
E9VSSGNDGround Reference Pin (VSS)
E10PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
E11PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
E12PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
E13PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
E14PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
E15PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
F1PG14I/OMultiplexed I/O & Peripheral Pin PG14 (General)
F2PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
F3PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
F4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
F5PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
F6VSSGNDGround Reference Pin (VSS)
F7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F8VDD33USBPowerPower Supply Input (VDD33USB — 3.3V VDD (Max 4.0V))
F9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F11VCAP3I/OMultiplexed I/O & Peripheral Pin VCAP3 (General)
F12PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
F13PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
F14PN1I/OMultiplexed I/O & Peripheral Pin PN1 (General)
F15VSSGNDGround Reference Pin (VSS)
G1VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
G2VFBSMPSI/OMultiplexed I/O & Peripheral Pin VFBSMPS (General)
G3PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
G4PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
G5PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
G6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G7VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
G8VSSGNDGround Reference Pin (VSS)
G9VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
G10VSSGNDGround Reference Pin (VSS)
G11PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
G12VSSGNDGround Reference Pin (VSS)
G13PN3I/OMultiplexed I/O & Peripheral Pin PN3 (General)
G14PN0I/OMultiplexed I/O & Peripheral Pin PN0 (General)
G15PN11I/OMultiplexed I/O & Peripheral Pin PN11 (General)
H1VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
H2VSSSMPSGNDGround Reference Pin (VSSSMPS)
H3PF8I/OMultiplexed I/O & Peripheral Pin PF8 (General)
H4PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
H5PF6I/OMultiplexed I/O & Peripheral Pin PF6 (General)
H6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H7VSSGNDGround Reference Pin (VSS)
H8VSSGNDGround Reference Pin (VSS)
H9VSSGNDGround Reference Pin (VSS)
H10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H11VSSGNDGround Reference Pin (VSS)
H12VDDXSPI2PowerPower Supply Input (VDDXSPI2 — 3.3V VDD (Max 4.0V))
H13PN10I/OMultiplexed I/O & Peripheral Pin PN10 (General)
H14PN9I/OMultiplexed I/O & Peripheral Pin PN9 (General)
H15PN2I/OMultiplexed I/O & Peripheral Pin PN2 (General)
J1VSSGNDGround Reference Pin (VSS)
J2PF9I/OMultiplexed I/O & Peripheral Pin PF9 (General)
J3PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
J4NRSTISystem Enable & Hardware Reset (NRST)
J5VSSAGNDGround Reference Pin (VSSA)
J6VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
J7VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
J8VSSGNDGround Reference Pin (VSS)
J9VDDLDOPowerPower Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))
J10VSSGNDGround Reference Pin (VSS)
J11VDDXSPI2PowerPower Supply Input (VDDXSPI2 — 3.3V VDD (Max 4.0V))
J12VSSGNDGround Reference Pin (VSS)
J13PN7I/OMultiplexed I/O & Peripheral Pin PN7 (General)
J14PN6I/OMultiplexed I/O & Peripheral Pin PN6 (General)
J15VSSGNDGround Reference Pin (VSS)
K1PH0-OSC_INI/OMultiplexed I/O & Peripheral Pin PH0-OSC_IN (RTC/CLK)
K2PH1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1-OSC_OUT (RTC/CLK)
K3PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
K4VREFMAnalogMultiplexed I/O & Peripheral Pin VREFM (General)
K5VREFPAnalogMultiplexed I/O & Peripheral Pin VREFP (General)
K6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K7VSSGNDGround Reference Pin (VSS)
K8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K9VSSGNDGround Reference Pin (VSS)
K10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K11VCAP2I/OMultiplexed I/O & Peripheral Pin VCAP2 (General)
K12VDDXSPI2PowerPower Supply Input (VDDXSPI2 — 3.3V VDD (Max 4.0V))
K13PN8I/OMultiplexed I/O & Peripheral Pin PN8 (General)
K14PN4I/OMultiplexed I/O & Peripheral Pin PN4 (General)
K15PN5I/OMultiplexed I/O & Peripheral Pin PN5 (General)
L1PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
L2PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
L3PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
L4PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
L5PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
L6VSSGNDGround Reference Pin (VSS)
L7VCAP1I/OMultiplexed I/O & Peripheral Pin VCAP1 (General)
L8VDDXSPI1PowerPower Supply Input (VDDXSPI1 — 3.3V VDD (Max 4.0V))
L9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
L10VDDXSPI1PowerPower Supply Input (VDDXSPI1 — 3.3V VDD (Max 4.0V))
L11VSSGNDGround Reference Pin (VSS)
L12PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
L13PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
L14PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
L15PN12I/OMultiplexed I/O & Peripheral Pin PN12 (General)
M1PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
M2PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
M3PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
M4PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
M5PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
M6PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
M7PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
M8VSSGNDGround Reference Pin (VSS)
M9VSSGNDGround Reference Pin (VSS)
M10VDDXSPI1PowerPower Supply Input (VDDXSPI1 — 3.3V VDD (Max 4.0V))
M11PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
M12PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
M13PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
M14PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
M15VSSGNDGround Reference Pin (VSS)
N1PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
N2PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
N3PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
N4PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
N5PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
N6PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
N7PG7I/OMultiplexed I/O & Peripheral Pin PG7 (General)
N8PP2I/OMultiplexed I/O & Peripheral Pin PP2 (General)
N9PP3I/OMultiplexed I/O & Peripheral Pin PP3 (General)
N10PP0I/OMultiplexed I/O & Peripheral Pin PP0 (General)
N11PP7I/OMultiplexed I/O & Peripheral Pin PP7 (General)
N12PO0I/OMultiplexed I/O & Peripheral Pin PO0 (General)
N13PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
N14PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
N15PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
P1PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
P2PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
P3PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
P4PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
P5PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
P6PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
P7PG8I/OMultiplexed I/O & Peripheral Pin PG8 (General)
P8PO1I/OMultiplexed I/O & Peripheral Pin PO1 (General)
P9VSSGNDGround Reference Pin (VSS)
P10PP5I/OMultiplexed I/O & Peripheral Pin PP5 (General)
P11PO2I/OMultiplexed I/O & Peripheral Pin PO2 (General)
P12PP1I/OMultiplexed I/O & Peripheral Pin PP1 (General)
P13PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
P14PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
P15PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
R1VSSGNDGround Reference Pin (VSS)
R2PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
R3PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
R4PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
R5PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
R6VSSGNDGround Reference Pin (VSS)
R7PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
R8PP4I/OMultiplexed I/O & Peripheral Pin PP4 (General)
R9PO5I/OMultiplexed I/O & Peripheral Pin PO5 (General)
R10PO4I/OMultiplexed I/O & Peripheral Pin PO4 (General)
R11PP6I/OMultiplexed I/O & Peripheral Pin PP6 (General)
R12VSSGNDGround Reference Pin (VSS)
R13PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
R14PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
R15VSSGNDGround Reference Pin (VSS)
PIN A1 VSS
GND
Ground Reference Pin (VSS)
Design note: 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32H7R3L8H6 (ST · TFBGA-225(13x13))
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1. Realistic 3D PackageREPRESENTATIVE
STM32H7R3L8H6 (TFBGA-225(13x13)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32H7R3L8H6 (TFBGA-225(13x13)) - 2. Standard Pinout (Top View)
True package pinout (225 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32H7R3L8H6 (TFBGA-225(13x13)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32H7R3L8H6 (TFBGA-225(13x13)) - 4. Package Dimensions (D×E×A)
TFBGA-225(13x13) · 13.00×13.00mm · Pitch 0.80mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32H7R3L8H6 (TFBGA-225(13x13)) - 5. Recommended Land Pattern
IPC-7351B Footprint (225 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32H7R3L8H6 (TFBGA-225(13x13)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)
Showing 1–12 of 12 uncropped original figures for STM32H7R3V8H / STM32H7R3Z8T / STM32H7R3L8H
P83 · p83_fig01EXACT PACKAGE
STM32H7R3L8H6 (TFBGA-225(13x13)) — Figure 16. TFBGA225 OCTO with SMPS pinout(a)(b)
Figure 16. TFBGA225 OCTO with SMPS pinout(a)(b)
P84 · p84_fig01EXACT PACKAGE
STM32H7R3L8H6 (TFBGA-225(13x13)) — Figure 17. TFBGA225 HEXA with SMPS pinout(a)(b)
Figure 17. TFBGA225 HEXA with SMPS pinout(a)(b)
P314 · p314_fig01EXACT PACKAGE
STM32H7R3L8H6 (TFBGA-225(13x13)) — Figure 99. TFBGA225 - Footprint example
Figure 99. TFBGA225 - Footprint example
P1 · p01_fig01881×841px
STM32H7R3L8H6 (TFBGA-225(13x13)) — • 64 Kbytes of user flash memory that can be used for user code and/or external memory configuration.
• 64 Kbytes of user flash memory that can be used for user code and/or external memory configuration.
P73 · p73_fig011751×1342px
STM32H7R3L8H6 (TFBGA-225(13x13)) — Figure 6. TFBGA100 SMPS pinout(a)
Figure 6. TFBGA100 SMPS pinout(a)
P83 · p83_fig01P83
STM32H7R3L8H6 (TFBGA-225(13x13)) — Datasheet Page 83 (p83_fig01)
Datasheet Page 83 (p83_fig01)
P192 · p192_fig011546×500px
STM32H7R3L8H6 (TFBGA-225(13x13)) — Figure 35. Typical application with an 8 MHz crystal
Figure 35. Typical application with an 8 MHz crystal
P193 · p193_fig011546×516px
STM32H7R3L8H6 (TFBGA-225(13x13)) — Figure 36. Typical application with a 32.768 kHz crystal
Figure 36. Typical application with a 32.768 kHz crystal
P193 · p193_fig01P193
STM32H7R3L8H6 (TFBGA-225(13x13)) — Datasheet Page 193 (p193_fig01)
Datasheet Page 193 (p193_fig01)
P292 · p292_fig011546×1290px
STM32H7R3L8H6 (TFBGA-225(13x13)) — Figure 84. TFBGA100 - Recommended footprint
Figure 84. TFBGA100 - Recommended footprint
P292 · p292_fig01P292
STM32H7R3L8H6 (TFBGA-225(13x13)) — Datasheet Page 292 (p292_fig01)
Datasheet Page 292 (p292_fig01)
P298 · p298_fig011546×1295px
STM32H7R3L8H6 (TFBGA-225(13x13)) — Figure 88. UFBGA144 - Recommended footprint
Figure 88. UFBGA144 - Recommended footprint

Technical Specifications & Part Details (STM32H7R3L8H6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32H7R3L8H6 (TFBGA-225(13x13)) is a 225-pin embedded microcontroller unit (mcu) featuring a 13.00 × 13.00 × 1.12 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, SDIO, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
600 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
13.00 × 13.00 × 1.12 mm (A1=0.25 mm)
Package family: BGA (TFBGA-225(13x13))
Pin Count & Lead PitchN / e
225 Pins | Pitch e = 0.80 mm (31.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, SDIO, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol225 auto-grouped pins
OK
IPC-7351B Land Pattern225 pads · Pitch 0.80mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TFBGA-225(13x13))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
13.00 × 13.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.12mm · e=0.80mm
Pad Size (W × L)Level B
0.24 × 0.24 mm
Pins / Total PadsTopology
225P / 225Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TFBGA-225(13x13)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32H7R3L8H6 (TFBGA-225(13x13))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32H7R3L8H6 (TFBGA-225(13x13))?

Manufactured by ST, the STM32H7R3L8H6 is housed in a TFBGA-225(13x13) package with 225 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PE0: Multiplexed I/O & Peripheral Pin PE0 (General)), A3 (PF3: Multiplexed I/O & Peripheral Pin PF3 (General)), A4 (PF2: Multiplexed I/O & Peripheral Pin PF2 (General)), A5 (PG3: Multiplexed I/O & Peripheral Pin PG3 (General)), A6 (BOOT0: Input-Only Pin BOOT0 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32H7R3L8H6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H7R3L8H6 (TFBGA-225(13x13)) has a nominal body envelope of 13.00 × 13.00 mm, pitch e = 0.80 mm, and 225 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H7R3L8H6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H7R3L8H6 (ST, TFBGA-225(13x13)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (225 pins) & STM32H7R3V8H / STM32H7R3Z8T / STM32H7R3L8H Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A2PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
A3PF3Digital_IOSignal terminal PF3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General.
A4PF2Digital_IOSignal terminal PF2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: General.
A5PG3Digital_IOSignal terminal PG3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG3. Supported peripheral buses: General.
A6BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
A7PM12Digital_IOSignal terminal PM12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM12. Supported peripheral buses: General.
A8VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A9PM6Digital_IOSignal terminal PM6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM6. Supported peripheral buses: General.
A10PM3Digital_IOSignal terminal PM3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM3. Supported peripheral buses: General.
A11VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A12PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
A13PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: General.
A14PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
A15VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B1PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
B2PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
B3PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
B4PF4Digital_IOSignal terminal PF4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
B5PF0Digital_IOSignal terminal PF0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF0. Supported peripheral buses: General.
B6PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
B7PM11Digital_IOSignal terminal PM11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM11. Supported peripheral buses: General.
B8PM9Digital_IOSignal terminal PM9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM9. Supported peripheral buses: General.
B9PM5Digital_IOSignal terminal PM5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM5. Supported peripheral buses: General.
B10PM2Digital_IOSignal terminal PM2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM2. Supported peripheral buses: General.
B11PG0Digital_IOSignal terminal PG0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG0. Supported peripheral buses: General.
B12PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: General.
B13PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
B14PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
B15PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
C1VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C2PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
C3PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
C4PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
C5PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
C6PG2Digital_IOSignal terminal PG2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG2. Supported peripheral buses: General.
C7PM13Digital_IOSignal terminal PM13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM13. Supported peripheral buses: General.
C8PM14Digital_IOSignal terminal PM14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM14. Supported peripheral buses: General.
C9PM8Digital_IOSignal terminal PM8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM8. Supported peripheral buses: General.
C10PM1Digital_IOSignal terminal PM1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM1. Supported peripheral buses: General.
C11PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
C12PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: General.
C13PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
C14PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
C15PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
D1PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
D2PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
D3VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D4PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
D5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
D6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D7PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
D8DVDDPower_InPrimary positive power supply input (DVDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D9VDD50USBPower_InPrimary positive power supply input (VDD50USB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D10PM0Digital_IOSignal terminal PM0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PM0. Supported peripheral buses: General.
D11PE15Digital_IOSignal terminal PE15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
D12PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
D13PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
D14PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
D15PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
E1PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
E2PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
E3VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E4PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
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