Mechanical Dimensions & Land Pattern (UFBGA-132(7x7))
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit UFBGA-132(7x7) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32U595QJI6Q (UFBGA-132(7x7))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32U595QJI6Q (UFBGA-132(7x7))?
Manufactured by ST, the STM32U595QJI6Q is housed in a UFBGA-132(7x7) package with 132 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (PE5: Multiplexed I/O & Peripheral Pin PE5 (SPI)), A2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (UART)), A3 (PE1: Multiplexed I/O & Peripheral Pin PE1 (General)), A4 (PB9: Multiplexed I/O & Peripheral Pin PB9 (General)), A5 (PB6: Multiplexed I/O & Peripheral Pin PB6 (General)), A6 (PG12: Multiplexed I/O & Peripheral Pin PG12 (General)).
What are the IPC-7351B PCB Footprint dimensions for STM32U595QJI6Q?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32U595QJI6Q (UFBGA-132(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 132 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32U595QJI6Q?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32U595QJI6Q (ST, UFBGA-132(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (132 pins) & STM32U595 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | PE5 | Digital_IO | Signal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: SPI. |
| A2 | PE3 | Digital_IO | Signal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: UART. |
| A3 | PE1 | Digital_IO | Signal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General. |
| A4 | PB9 | Digital_IO | Signal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General. |
| A5 | PB6 | Digital_IO | Signal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General. |
| A6 | PG12 | Digital_IO | Signal terminal PG12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General. |
| A7 | PD6 | Digital_IO | Signal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, I2C. |
| A8 | PD5 | Digital_IO | Signal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_RDY. Supported peripheral buses: UART, SPI. |
| A9 | PD2 | Digital_IO | Signal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C5_SMBA. Supported peripheral buses: UART, I2C. |
| A10 | PC11 | Digital_IO | Signal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI. |
| A11 | PA15(JTDI) | Digital_IO | Signal terminal PA15(JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSSSPI3NSS. Supported peripheral buses: UART, SPI, SWD/JTAG. |
| A12 | VDDUSB | Power_In | Primary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| B1 | VBAT | Power_In | Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| B2 | PE4 | Digital_IO | Signal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: UART. |
| B3 | PE2 | Digital_IO | Signal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: UART. |
| B4 | VDD11 | Power_In | Primary positive power supply input (VDD11) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| B5 | PH3-BOOT0 | Digital_IO | Signal terminal PH3-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH3-BOOT0. Supported peripheral buses: General. |
| B6 | PB4 | Digital_IO | Signal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General. |
| B7 | PG9 | Digital_IO | Signal terminal PG9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: General. |
| B8 | PD4 | Digital_IO | Signal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: UART, SPI. |
| B9 | PD1 | Digital_IO | Signal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKLCDB5. Supported peripheral buses: SPI, I2C. |
| B10 | PC12 | Digital_IO | Signal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI. |
| B11 | PC10 | Digital_IO | Signal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI. |
| B12 | PA12 | Digital_IO | Signal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI. |
| C1 | PC14 - OSC32_IN (PC14) | Digital_IO | Signal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK. |
| C2 | PE6 | Digital_IO | Signal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: I2C. |
| C3 | PC13 | Digital_IO | Signal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK. |
| C4 | PE0 | Digital_IO | Signal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General. |
| C5 | PB8 | Digital_IO | Signal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General. |
| C6 | PB3 | Digital_IO | Signal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General. |
| C7 | PG10 | Digital_IO | Signal terminal PG10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General. |
| C8 | PD3 | Digital_IO | Signal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C6_SMBA, SPI2_SCK, SPI2_MISO. Supported peripheral buses: UART, SPI, I2C. |
| C9 | PD0 | Digital_IO | Signal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C6_SDA. Supported peripheral buses: I2C, PWM. |
| C10 | PA13 (JTMS/ SWDIO) | Digital_IO | Signal terminal PA13 (JTMS/ SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13 (JTMS/ SWDIO). Supported peripheral buses: SWD/JTAG. |
| C11 | PA14 (JTCK/ SWCLK) | Digital_IO | Signal terminal PA14 (JTCK/ SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, I2C4_SMBA. Supported peripheral buses: I2C, SWD/JTAG. |
| C12 | PA11 | Digital_IO | Signal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, PWM. |
| D1 | IOD1 | Digital_IO | General Purpose Digital I/O Pin IOD1 |
| D2 | PF0 | Digital_IO | Signal terminal PF0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF0. Supported peripheral buses: UART, I2C. |
| D3 | PF3 | Digital_IO | Signal terminal PF3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: UART. |
| D4 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| D5 | PB7 | Digital_IO | Signal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General. |
| D6 | PB5 | Digital_IO | Signal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General. |
| D7 | PD7 | Digital_IO | Signal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General. |
| D8 | VDDIO2 | Power_In | Primary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| D9 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| D10 | PA9 | Digital_IO | Signal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART, PWM. |
| D11 | PA10 | Digital_IO | Signal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART, I2C, PWM. |
| D12 | PA8 | Digital_IO | Signal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: UART, SPI, RTC/CLK. |
| E1 | PF2 | Digital_IO | Signal terminal PF2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SMBA. Supported peripheral buses: UART, I2C. |
| E2 | PF1 | Digital_IO | Signal terminal PF1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: UART, I2C. |
| E3 | PF4 | Digital_IO | Signal terminal PF4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: UART. |
| E4 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| E9 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| E10 | PC7 | Digital_IO | Signal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: PWM. |
| E11 | PC9 | Digital_IO | Signal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: UART, PWM. |
| E12 | PC8 | Digital_IO | Signal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: UART, PWM. |
| F1 | PH0 - OSC_IN (PH0) | Digital_IO | Signal terminal PH0 - OSC_IN (PH0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0 - OSC_IN (PH0). Supported peripheral buses: RTC/CLK. |
| F2 | PF5 | Digital_IO | Signal terminal PF5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General. |
| F3 | PC2 | Digital_IO | Signal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, ADC. |
| F4 | PC3 | Digital_IO | Signal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: UART, I2C, ADC. |
| F6 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| F7 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| F9 | PG6 | Digital_IO | Signal terminal PG6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA, SPI1_RDYLCDR1. Supported peripheral buses: UART, SPI, I2C. |
| F10 | PG7 | Digital_IO | Signal terminal PG7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG7. Supported peripheral buses: General. |













