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CH643Q (LQFP-64(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH643Q

WCHID: C22448687LQFP-64(7x7) · 64 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH643Q (LQFP-64(7x7))1GND2PA15/TX2_3PA16/RX2_4PA17/CTS2_5PA18/TX3_/T26PA19/T2ET/RX7PA20/TX2_/T28PA21/T2C1N/R9PC0/TX2_/T2C10PC1/T1C2_/T211PC2/T1C3_/T212PC3/RTS2_/T113PA22/T2C2N/C14PA23/T2C3N/C15PA0/T2C1/CTS16PA1/RTS2/T2C17PA2/TX2/T2C318PA3/T2C4/O1O19PC4/CS_/T1BK20PC5/SCK_/T1C21PA4/CS/O2O0/22PA5/SCK/TX4_23PA6/MISO/T3C24PA7/MOSI/T3C25PB0/TX4/T1C226PB1/T1C3N_/R27PB2/C2O/RX1_28PB3/TX3/C3O/29PB4/T2C4_/T330GND3031VDD3132PB5/O1O1/T3C64VDD63PA14/SDA_/RT62PA13/SCL_/RT61PA12/CS_/T2C60PA11/SDA/SCK59PA10/SCL/TX158PA9/MOSI_/MI57PA8/MISO_/RT56PC15/CC2/T2C55PC14/CC1/T1C54PB15/T2C2_/S5354PB23/T1C4_52PB2251PB21/T2C1_/C50PB2049PB14/RX3_48PB13/TX4_4847PC19/DCK/T2C46PB12/T1C4_/T45PC18/DIO/TX344PC17/UDP/RTS43PC16/UDM/T1C42PB11/T1C3/T241PB10/TX1/T1C40PB9/T1C1/MCO39PB19/RTS3_/T38PB18/T2C3_/C37PB17/T2C2_/R36PB16/TX3_/T235PB8/T1C3N/O134PB7/T1C2N/RT33PB6/T1C1N/CTGrid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.245.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364E=7.00mm · Pitch e=0.40mmD=7.00mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1GNDGNDGround Reference Pin (GND)
2PA15/TX2_I/OMultiplexed I/O & Peripheral Pin PA15/TX2_ (General)
3PA16/RX2_I/OMultiplexed I/O & Peripheral Pin PA16/RX2_ (General)
4PA17/CTS2_I/OMultiplexed I/O & Peripheral Pin PA17/CTS2_ (UART)
5PA18/TX3_/T2ET_I/OMultiplexed I/O & Peripheral Pin PA18/TX3_/T2ET_ (General)
6PA19/T2ET/RX2_I/OMultiplexed I/O & Peripheral Pin PA19/T2ET/RX2_ (General)
7PA20/TX2_/T2BKI/OMultiplexed I/O & Peripheral Pin PA20/TX2_/T2BK (General)
8PA21/T2C1N/RTS2_I/OMultiplexed I/O & Peripheral Pin PA21/T2C1N/RTS2_ (UART)
9PC0/TX2_/T2C4_I/OMultiplexed I/O & Peripheral Pin PC0/TX2_/T2C4_ (General)
10PC1/T1C2_/T2C1N_I/OMultiplexed I/O & Peripheral Pin PC1/T1C2_/T2C1N_ (General)
11PC2/T1C3_/T2C2N_I/OMultiplexed I/O & Peripheral Pin PC2/T1C3_/T2C2N_ (General)
12PC3/RTS2_/T1C4_I/OMultiplexed I/O & Peripheral Pin PC3/RTS2_/T1C4_ (UART)
13PA22/T2C2N/C2N0I/OMultiplexed I/O & Peripheral Pin PA22/T2C2N/C2N0 (General)
14PA23/T2C3N/C1N1I/OMultiplexed I/O & Peripheral Pin PA23/T2C3N/C1N1 (General)
15PA0/T2C1/CTS2I/OMultiplexed I/O & Peripheral Pin PA0/T2C1/CTS2 (UART)
16PA1/RTS2/T2C2I/OMultiplexed I/O & Peripheral Pin PA1/RTS2/T2C2 (UART)
17PA2/TX2/T2C3/O2O1I/OMultiplexed I/O & Peripheral Pin PA2/TX2/T2C3/O2O1 (General)
18PA3/T2C4/O1O0I/OMultiplexed I/O & Peripheral Pin PA3/T2C4/O1O0 (General)
19PC4/CS_/T1BK_/T2ET_19I/OMultiplexed I/O & Peripheral Pin PC4/CS_/T1BK_/T2ET_19 (General)
20PC5/SCK_/T1C1N_20I/OMultiplexed I/O & Peripheral Pin PC5/SCK_/T1C1N_20 (SPI)
21PA4/CS/O2O0/RTS3_I/OMultiplexed I/O & Peripheral Pin PA4/CS/O2O0/RTS3_ (UART)
22PA5/SCK/TX4_/CTS4_I/OMultiplexed I/O & Peripheral Pin PA5/SCK/TX4_/CTS4_ (UART, SPI)
23PA6/MISO/T3C1/RTS4_I/OMultiplexed I/O & Peripheral Pin PA6/MISO/T3C1/RTS4_ (UART, SPI)
24PA7/MOSI/T3C2/T1C1N_I/OMultiplexed I/O & Peripheral Pin PA7/MOSI/T3C2/T1C1N_ (SPI)
25PB0/TX4/T1C2N_/O1P0I/OMultiplexed I/O & Peripheral Pin PB0/TX4/T1C2N_/O1P0 (General)
26PB1/T1C3N_/RX4I/OMultiplexed I/O & Peripheral Pin PB1/T1C3N_/RX4 (General)
27PB2/C2O/RX1_27I/OMultiplexed I/O & Peripheral Pin PB2/C2O/RX1_27 (General)
28PB3/TX3/C3O/T2C3_I/OMultiplexed I/O & Peripheral Pin PB3/TX3/C3O/T2C3_ (General)
29PB4/T2C4_/T3C1_/T2BK_I/OMultiplexed I/O & Peripheral Pin PB4/T2C4_/T3C1_/T2BK_ (General)
30GND30GNDGround Reference Pin (GND30)
31VDD31PowerPower Supply Input (VDD31 — 2V~5.5V)
32PB5/O1O1/T3C2_I/OMultiplexed I/O & Peripheral Pin PB5/O1O1/T3C2_ (General)
33PB6/T1C1N/CTS3/O1N133I/OMultiplexed I/O & Peripheral Pin PB6/T1C1N/CTS3/O1N133 (UART)
34PB7/T1C2N/RTS3_/O2P234I/OMultiplexed I/O & Peripheral Pin PB7/T1C2N/RTS3_/O2P234 (UART)
35PB8/T1C3N/O1P135I/OMultiplexed I/O & Peripheral Pin PB8/T1C3N/O1P135 (General)
36PB16/TX3_/T2C1_36I/OMultiplexed I/O & Peripheral Pin PB16/TX3_/T2C1_36 (General)
37PB17/T2C2_/RX3_37I/OMultiplexed I/O & Peripheral Pin PB17/T2C2_/RX3_37 (General)
38PB18/T2C3_/CTS3_38I/OMultiplexed I/O & Peripheral Pin PB18/T2C3_/CTS3_38 (UART)
39PB19/RTS3_/T2C4_39I/OMultiplexed I/O & Peripheral Pin PB19/RTS3_/T2C4_39 (UART)
40PB9/T1C1/MCO/TX4_40I/OMultiplexed I/O & Peripheral Pin PB9/T1C1/MCO/TX4_40 (RTC/CLK)
41PB10/TX1/T1C241I/OMultiplexed I/O & Peripheral Pin PB10/TX1/T1C241 (General)
42PB11/T1C3/T2C1N_/RX142I/OMultiplexed I/O & Peripheral Pin PB11/T1C3/T2C1N_/RX142 (General)
43PC16/UDM/T1C4/TX4_I/OMultiplexed I/O & Peripheral Pin PC16/UDM/T1C4/TX4_ (General)
44PC17/UDP/RTS1/TX4_I/OMultiplexed I/O & Peripheral Pin PC17/UDP/RTS1/TX4_ (UART)
45PC18/DIO/TX3_/T2C1N_I/OMultiplexed I/O & Peripheral Pin PC18/DIO/TX3_/T2C1N_ (General)
46PB12/T1C4_/T2C2N_46I/OMultiplexed I/O & Peripheral Pin PB12/T1C4_/T2C2N_46 (General)
47PC19/DCK/T2C1_I/OMultiplexed I/O & Peripheral Pin PC19/DCK/T2C1_ (General)
48PB13/TX4_48I/OMultiplexed I/O & Peripheral Pin PB13/TX4_48 (General)
49PB14/RX3_I/OMultiplexed I/O & Peripheral Pin PB14/RX3_ (General)
50PB20I/OMultiplexed I/O & Peripheral Pin PB20 (General)
51PB21/T2C1_/CS_/RTS4_I/OMultiplexed I/O & Peripheral Pin PB21/T2C1_/CS_/RTS4_ (UART)
52PB22I/OMultiplexed I/O & Peripheral Pin PB22 (General)
5354PB23/T1C4_I/OMultiplexed I/O & Peripheral Pin 54PB23/T1C4_ (General)
54PB15/T2C2_/SCK_/CTS4I/OMultiplexed I/O & Peripheral Pin PB15/T2C2_/SCK_/CTS4 (UART, SPI)
55PC14/CC1/T1C3_/T2C2_I/OMultiplexed I/O & Peripheral Pin PC14/CC1/T1C3_/T2C2_ (General)
56PC15/CC2/T2C3_/T1ET_I/OMultiplexed I/O & Peripheral Pin PC15/CC2/T2C3_/T1ET_ (General)
57PA8/MISO_/RTS4/RTS1_I/OMultiplexed I/O & Peripheral Pin PA8/MISO_/RTS4/RTS1_ (UART, SPI)
58PA9/MOSI_/MISO_/RX4_I/OMultiplexed I/O & Peripheral Pin PA9/MOSI_/MISO_/RX4_ (SPI)
59PA10/SCL/TX1_/MOSI_I/OMultiplexed I/O & Peripheral Pin PA10/SCL/TX1_/MOSI_ (SPI, I2C)
60PA11/SDA/SCK_/RX1_I/OMultiplexed I/O & Peripheral Pin PA11/SDA/SCK_/RX1_ (SPI, I2C)
61PA12/CS_/T2C2_/T2C1N_I/OMultiplexed I/O & Peripheral Pin PA12/CS_/T2C2_/T2C1N_ (General)
62PA13/SCL_/RTS4_I/OMultiplexed I/O & Peripheral Pin PA13/SCL_/RTS4_ (UART, I2C)
63PA14/SDA_/RTS1_I/OMultiplexed I/O & Peripheral Pin PA14/SDA_/RTS1_ (UART, I2C)
64VDDPowerPower Supply Input (VDD — 2V~5.5V)
PIN 1 GND
GND
Ground Reference Pin (GND)
Design note: 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH643Q (WCH · LQFP-64(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH643Q (LQFP-64(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH643Q (LQFP-64(7x7)) - 2. Standard Pinout (Top View)
True package pinout (64 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH643Q (LQFP-64(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH643Q (LQFP-64(7x7)) - 4. Package Dimensions (D×E×A)
LQFP-64(7x7) · 7.00×7.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH643Q (LQFP-64(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (64 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH643Q (LQFP-64(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)
Showing 1–8 of 8 uncropped original figures for CH643
P35 · p35_fig01EXACT PACKAGE
CH643Q (LQFP-64(7x7)) — CH643 数据手册 https://wch.cn
CH643 数据手册 https://wch.cn
P2 · p02_fig011862×539px
CH643Q (LQFP-64(7x7)) — 型号 闪 存RAM | 通 用 I/O | 高级 定时 | 器 | 通用 定时 | 器 | RGB LED PWM | 串 口 | 看 门 狗 | USB Host | Dev | USB | PD typeC | ADC | OPA | 运 放 | CMP 比较 | 器 | 电容 触摸 按键 | SPI | PIOC 单线 接口 | 封装 形式 | CH643W 62K 20K 69 2 1 48x18 4 2 √ √ 15+1 2 组 3 组15 路√ √ QFN80 |
型号 闪 存RAM | 通 用 I/O | 高级 定时 | 器 | 通用 定时 | 器 | RGB LED PWM | 串 口 | 看 门 狗 | USB Host | Dev | USB | PD typeC | ADC | OPA | 运 放 | CMP 比较 | 器 | 电容 触摸 按键 | SPI | PIOC 单线 接口 | 封装 形式 | CH643W 62K 20K 69 2 1 48x18 4 2 √ √ 15+1 2 组 3 组15 路√ √ QFN80 |
P10 · p10_fig011808×843px
CH643Q (LQFP-64(7x7)) — 所有PA 引脚具有source 源电流简单恒流功能、sink 灌电流简单恒流功能；所有PB 引脚具有sink 灌电流简单恒流功能、作为全内置COM 驱动端具有较大sink 灌电流驱动能力。 | CH643 芯片支持的矩阵组合如下。 | LED 矩阵 | PWM 引脚 | 模式 | PWM 通道 引脚名称 | PWM 通道 LED 列数 | 键盘 列数 | COM 数量 | 行扫描 | CH 643W CH 643Q CH 643L CH 643U COM 方式 外围器件 |
所有PA 引脚具有source 源电流简单恒流功能、sink 灌电流简单恒流功能；所有PB 引脚具有sink 灌电流简单恒流功能、作为全内置COM 驱动端具有较大sink 灌电流驱动能力。 | CH643 芯片支持的矩阵组合如下。 | LED 矩阵 | PWM 引脚 | 模式 | PWM 通道 引脚名称 | PWM 通道 LED 列数 | 键盘 列数 | COM 数量 | 行扫描 | CH 643W CH 643Q CH 643L CH 643U COM 方式 外围器件 |
P11 · p11_fig011963×1961px
CH643Q (LQFP-64(7x7)) — 第2 章 引脚信息
第2 章 引脚信息
P11 · p11_fig01P11
CH643Q (LQFP-64(7x7)) — Datasheet Page 11 (p11_fig01)
Datasheet Page 11 (p11_fig01)
P32 · p32_fig011852×1256px
CH643Q (LQFP-64(7x7)) — 符号 参数 条件 最小值 典型值 最大值 单位
符号 参数 条件 最小值 典型值 最大值 单位
P32 · p32_fig021852×506px
CH643Q (LQFP-64(7x7)) — 符号 参数 条件 最小值 典型值 最大值 单位
符号 参数 条件 最小值 典型值 最大值 单位
P32 · p32_fig01P32
CH643Q (LQFP-64(7x7)) — Datasheet Page 32 (p32_fig01)
Datasheet Page 32 (p32_fig01)

Technical Specifications & Part Details (CH643Q)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH643Q (LQFP-64(7x7)) is a 64-pin standard electronic & interconnect component featuring a 7.00 × 7.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 2V~5.5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, ADC, PWM, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
2V~5.5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
48 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-64(7x7))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, ADC, PWM, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol64 auto-grouped pins
OK
IPC-7351B Land Pattern64 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-64(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.40mm
Pad Size (W × L)Level B
0.24 × 1.25 mm
Pins / Total PadsTopology
64P / 64Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-64(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH643Q (LQFP-64(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH643Q (LQFP-64(7x7))?

Manufactured by WCH, the CH643Q is housed in a LQFP-64(7x7) package with 64 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 2V~5.5V. Key pins include: 1 (GND: Ground Reference Pin (GND)), 2 (PA15/TX2_: Multiplexed I/O & Peripheral Pin PA15/TX2_ (General)), 3 (PA16/RX2_: Multiplexed I/O & Peripheral Pin PA16/RX2_ (General)), 4 (PA17/CTS2_: Multiplexed I/O & Peripheral Pin PA17/CTS2_ (UART)), 5 (PA18/TX3_/T2ET_: Multiplexed I/O & Peripheral Pin PA18/TX3_/T2ET_ (General)), 6 (PA19/T2ET/RX2_: Multiplexed I/O & Peripheral Pin PA19/T2ET/RX2_ (General)).

What are the IPC-7351B PCB Footprint dimensions for CH643Q?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH643Q (LQFP-64(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.40 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH643Q?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH643Q (WCH, LQFP-64(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & CH643 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
2PA15/TX2_Digital_IOSignal terminal PA15/TX2_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA15/TX2_. Supported peripheral buses: General.
3PA16/RX2_Digital_IOSignal terminal PA16/RX2_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA16/RX2_. Supported peripheral buses: General.
4PA17/CTS2_Digital_IOSignal terminal PA17/CTS2_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA17/CTS2_. Supported peripheral buses: UART.
5PA18/TX3_/T2ET_Digital_IOSignal terminal PA18/TX3_/T2ET_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA18/TX3_/T2ET_. Supported peripheral buses: General.
6PA19/T2ET/RX2_Digital_IOSignal terminal PA19/T2ET/RX2_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA19/T2ET/RX2_. Supported peripheral buses: General.
7PA20/TX2_/T2BKDigital_IOSignal terminal PA20/TX2_/T2BK (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA20/TX2_/T2BK. Supported peripheral buses: General.
8PA21/T2C1N/RTS2_Digital_IOSignal terminal PA21/T2C1N/RTS2_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA21/T2C1N/RTS2_. Supported peripheral buses: UART.
9PC0/TX2_/T2C4_Digital_IOSignal terminal PC0/TX2_/T2C4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC0/TX2_/T2C4_. Supported peripheral buses: General.
10PC1/T1C2_/T2C1N_Digital_IOSignal terminal PC1/T1C2_/T2C1N_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC1/T1C2_/T2C1N_. Supported peripheral buses: General.
11PC2/T1C3_/T2C2N_Digital_IOSignal terminal PC2/T1C3_/T2C2N_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC2/T1C3_/T2C2N_. Supported peripheral buses: General.
12PC3/RTS2_/T1C4_Digital_IOSignal terminal PC3/RTS2_/T1C4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC3/RTS2_/T1C4_. Supported peripheral buses: UART.
13PA22/T2C2N/C2N0Digital_IOSignal terminal PA22/T2C2N/C2N0 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA22/T2C2N/C2N0. Supported peripheral buses: General.
14PA23/T2C3N/C1N1Digital_IOSignal terminal PA23/T2C3N/C1N1 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA23/T2C3N/C1N1. Supported peripheral buses: General.
15PA0/T2C1/CTS2Digital_IOSignal terminal PA0/T2C1/CTS2 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA0/T2C1/CTS2. Supported peripheral buses: UART.
16PA1/RTS2/T2C2Digital_IOSignal terminal PA1/RTS2/T2C2 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA1/RTS2/T2C2. Supported peripheral buses: UART.
17PA2/TX2/T2C3/O2O1Digital_IOSignal terminal PA2/TX2/T2C3/O2O1 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA2/TX2/T2C3/O2O1. Supported peripheral buses: General.
18PA3/T2C4/O1O0Digital_IOSignal terminal PA3/T2C4/O1O0 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA3/T2C4/O1O0. Supported peripheral buses: General.
19PC4/CS_/T1BK_/T2ET_19Digital_IOSignal terminal PC4/CS_/T1BK_/T2ET_19 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC4/CS_/T1BK_/T2ET_19. Supported peripheral buses: General.
20PC5/SCK_/T1C1N_20Digital_IOSignal terminal PC5/SCK_/T1C1N_20 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC5/SCK_/T1C1N_20. Supported peripheral buses: SPI.
21PA4/CS/O2O0/RTS3_Digital_IOSignal terminal PA4/CS/O2O0/RTS3_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA4/CS/O2O0/RTS3_. Supported peripheral buses: UART.
22PA5/SCK/TX4_/CTS4_Digital_IOSignal terminal PA5/SCK/TX4_/CTS4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA5/SCK/TX4_/CTS4_. Supported peripheral buses: UART, SPI.
23PA6/MISO/T3C1/RTS4_Digital_IOSignal terminal PA6/MISO/T3C1/RTS4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA6/MISO/T3C1/RTS4_. Supported peripheral buses: UART, SPI.
24PA7/MOSI/T3C2/T1C1N_Digital_IOSignal terminal PA7/MOSI/T3C2/T1C1N_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA7/MOSI/T3C2/T1C1N_. Supported peripheral buses: SPI.
25PB0/TX4/T1C2N_/O1P0Digital_IOSignal terminal PB0/TX4/T1C2N_/O1P0 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB0/TX4/T1C2N_/O1P0. Supported peripheral buses: General.
26PB1/T1C3N_/RX4Digital_IOSignal terminal PB1/T1C3N_/RX4 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB1/T1C3N_/RX4. Supported peripheral buses: General.
27PB2/C2O/RX1_27Digital_IOSignal terminal PB2/C2O/RX1_27 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB2/C2O/RX1_27. Supported peripheral buses: General.
28PB3/TX3/C3O/T2C3_Digital_IOSignal terminal PB3/TX3/C3O/T2C3_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB3/TX3/C3O/T2C3_. Supported peripheral buses: General.
29PB4/T2C4_/T3C1_/T2BK_Digital_IOSignal terminal PB4/T2C4_/T3C1_/T2BK_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB4/T2C4_/T3C1_/T2BK_. Supported peripheral buses: General.
30GND30GND0V electrical ground return terminal (GND30) for internal core logic, I/O drivers, and analog sub-blocks.
31VDD31Power_InPrimary positive power supply input (VDD31) operating in the 2V~5.5V domain (Max rating: 5.5V).
32PB5/O1O1/T3C2_Digital_IOSignal terminal PB5/O1O1/T3C2_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB5/O1O1/T3C2_. Supported peripheral buses: General.
33PB6/T1C1N/CTS3/O1N133Digital_IOSignal terminal PB6/T1C1N/CTS3/O1N133 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB6/T1C1N/CTS3/O1N133. Supported peripheral buses: UART.
34PB7/T1C2N/RTS3_/O2P234Digital_IOSignal terminal PB7/T1C2N/RTS3_/O2P234 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB7/T1C2N/RTS3_/O2P234. Supported peripheral buses: UART.
35PB8/T1C3N/O1P135Digital_IOSignal terminal PB8/T1C3N/O1P135 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB8/T1C3N/O1P135. Supported peripheral buses: General.
36PB16/TX3_/T2C1_36Digital_IOSignal terminal PB16/TX3_/T2C1_36 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB16/TX3_/T2C1_36. Supported peripheral buses: General.
37PB17/T2C2_/RX3_37Digital_IOSignal terminal PB17/T2C2_/RX3_37 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB17/T2C2_/RX3_37. Supported peripheral buses: General.
38PB18/T2C3_/CTS3_38Digital_IOSignal terminal PB18/T2C3_/CTS3_38 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB18/T2C3_/CTS3_38. Supported peripheral buses: UART.
39PB19/RTS3_/T2C4_39Digital_IOSignal terminal PB19/RTS3_/T2C4_39 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB19/RTS3_/T2C4_39. Supported peripheral buses: UART.
40PB9/T1C1/MCO/TX4_40Digital_IOSignal terminal PB9/T1C1/MCO/TX4_40 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB9/T1C1/MCO/TX4_40. Supported peripheral buses: RTC/CLK.
41PB10/TX1/T1C241Digital_IOSignal terminal PB10/TX1/T1C241 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB10/TX1/T1C241. Supported peripheral buses: General.
42PB11/T1C3/T2C1N_/RX142Digital_IOSignal terminal PB11/T1C3/T2C1N_/RX142 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB11/T1C3/T2C1N_/RX142. Supported peripheral buses: General.
43PC16/UDM/T1C4/TX4_Digital_IOSignal terminal PC16/UDM/T1C4/TX4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC16/UDM/T1C4/TX4_. Supported peripheral buses: General.
44PC17/UDP/RTS1/TX4_Digital_IOSignal terminal PC17/UDP/RTS1/TX4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC17/UDP/RTS1/TX4_. Supported peripheral buses: UART.
45PC18/DIO/TX3_/T2C1N_Digital_IOSignal terminal PC18/DIO/TX3_/T2C1N_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC18/DIO/TX3_/T2C1N_. Supported peripheral buses: General.
46PB12/T1C4_/T2C2N_46Digital_IOSignal terminal PB12/T1C4_/T2C2N_46 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB12/T1C4_/T2C2N_46. Supported peripheral buses: General.
47PC19/DCK/T2C1_Digital_IOSignal terminal PC19/DCK/T2C1_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC19/DCK/T2C1_. Supported peripheral buses: General.
48PB13/TX4_48Digital_IOSignal terminal PB13/TX4_48 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB13/TX4_48. Supported peripheral buses: General.
49PB14/RX3_Digital_IOSignal terminal PB14/RX3_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB14/RX3_. Supported peripheral buses: General.
50PB20Digital_IOSignal terminal PB20 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB20. Supported peripheral buses: General.
51PB21/T2C1_/CS_/RTS4_Digital_IOSignal terminal PB21/T2C1_/CS_/RTS4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB21/T2C1_/CS_/RTS4_. Supported peripheral buses: UART.
52PB22Digital_IOSignal terminal PB22 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB22. Supported peripheral buses: General.
5354PB23/T1C4_Digital_IOSignal terminal 54PB23/T1C4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: 54PB23/T1C4_. Supported peripheral buses: General.
54PB15/T2C2_/SCK_/CTS4Digital_IOSignal terminal PB15/T2C2_/SCK_/CTS4 (I/O, 2V~5.5V domain). Multiplexed alternate functions: PB15/T2C2_/SCK_/CTS4. Supported peripheral buses: UART, SPI.
55PC14/CC1/T1C3_/T2C2_Digital_IOSignal terminal PC14/CC1/T1C3_/T2C2_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC14/CC1/T1C3_/T2C2_. Supported peripheral buses: General.
56PC15/CC2/T2C3_/T1ET_Digital_IOSignal terminal PC15/CC2/T2C3_/T1ET_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PC15/CC2/T2C3_/T1ET_. Supported peripheral buses: General.
57PA8/MISO_/RTS4/RTS1_Digital_IOSignal terminal PA8/MISO_/RTS4/RTS1_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA8/MISO_/RTS4/RTS1_. Supported peripheral buses: UART, SPI.
58PA9/MOSI_/MISO_/RX4_Digital_IOSignal terminal PA9/MOSI_/MISO_/RX4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA9/MOSI_/MISO_/RX4_. Supported peripheral buses: SPI.
59PA10/SCL/TX1_/MOSI_Digital_IOSignal terminal PA10/SCL/TX1_/MOSI_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA10/SCL/TX1_/MOSI_. Supported peripheral buses: SPI, I2C.
60PA11/SDA/SCK_/RX1_Digital_IOSignal terminal PA11/SDA/SCK_/RX1_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA11/SDA/SCK_/RX1_. Supported peripheral buses: SPI, I2C.
61PA12/CS_/T2C2_/T2C1N_Digital_IOSignal terminal PA12/CS_/T2C2_/T2C1N_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA12/CS_/T2C2_/T2C1N_. Supported peripheral buses: General.
62PA13/SCL_/RTS4_Digital_IOSignal terminal PA13/SCL_/RTS4_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA13/SCL_/RTS4_. Supported peripheral buses: UART, I2C.
63PA14/SDA_/RTS1_Digital_IOSignal terminal PA14/SDA_/RTS1_ (I/O, 2V~5.5V domain). Multiplexed alternate functions: PA14/SDA_/RTS1_. Supported peripheral buses: UART, I2C.
64VDDPower_InPrimary positive power supply input (VDD) operating in the 2V~5.5V domain (Max rating: 5.5V).
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