Mechanical Dimensions & Land Pattern (LQFP-144(20x20))
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit LQFP-144(20x20) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32U5G9ZJT6Q (LQFP-144(20x20))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32U5G9ZJT6Q (LQFP-144(20x20))?
Manufactured by ST, the STM32U5G9ZJT6Q is housed in a LQFP-144(20x20) package with 144 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: 1 (PE2: Multiplexed I/O & Peripheral Pin PE2 (UART)), 2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), 3 (PE4: Multiplexed I/O & Peripheral Pin PE4 (UART)), 4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (SPI)), 5 (PE6: Multiplexed I/O & Peripheral Pin PE6 (General)), 6 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))).
What are the IPC-7351B PCB Footprint dimensions for STM32U5G9ZJT6Q?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32U5G9ZJT6Q (LQFP-144(20x20)) has a nominal body envelope of 20.00 × 20.00 mm, pitch e = 0.50 mm, and 144 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32U5G9ZJT6Q?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32U5G9ZJT6Q (ST, LQFP-144(20x20)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (144 pins) & STM32U5G9ZJT Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | PE2 | Digital_IO | Signal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: UART. |
| 2 | PE3 | Digital_IO | Signal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General. |
| 3 | PE4 | Digital_IO | Signal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: UART. |
| 4 | PE5 | Digital_IO | Signal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: SPI. |
| 5 | PE6 | Digital_IO | Signal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General. |
| 6 | VBAT | Power_In | Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 7 | PC13 | Digital_IO | Signal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK. |
| 8 | PC14 - OSC32 IN(PC14)_ | Digital_IO | Signal terminal PC14 - OSC32 IN(PC14)_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32 IN(PC14)_. Supported peripheral buses: RTC/CLK. |
| 9 | IO4 | Digital_IO | GPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3 |
| 10 | PF0 | Digital_IO | Signal terminal PF0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C6_SDA. Supported peripheral buses: UART, I2C. |
| 11 | PF1 | Digital_IO | Signal terminal PF1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C6_SCL. Supported peripheral buses: UART, I2C. |
| 12 | PF2 | Digital_IO | Signal terminal PF2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: UART. |
| 13 | VDDDSI | Power_In | Primary positive power supply input (VDDDSI) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 14 | VDD11DSI | Power_In | Primary positive power supply input (VDD11DSI) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 15 | DSI_D0P | Digital_IO | Signal terminal DSI_D0P (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_D0P. Supported peripheral buses: General. |
| 16 | DSI_D0N | Digital_IO | Signal terminal DSI_D0N (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_D0N. Supported peripheral buses: General. |
| 17 | VSSDSI | GND | 0V electrical ground return terminal (VSSDSI) for internal core logic, I/O drivers, and analog sub-blocks. |
| 18 | DSI_CKP | Digital_IO | Signal terminal DSI_CKP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_CKP. Supported peripheral buses: General. |
| 19 | DSI_CKN | Digital_IO | Signal terminal DSI_CKN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_CKN. Supported peripheral buses: General. |
| 20 | VDD11DSI | Power_In | Primary positive power supply input (VDD11DSI) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 21 | DSI_D1P | Digital_IO | Signal terminal DSI_D1P (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_D1P. Supported peripheral buses: General. |
| 22 | DSI_D1N | Digital_IO | Signal terminal DSI_D1N (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_D1N. Supported peripheral buses: General. |
| 23 | VSSDSI | GND | 0V electrical ground return terminal (VSSDSI) for internal core logic, I/O drivers, and analog sub-blocks. |
| 24 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 25 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 26 | PH0 OSC IN(PH0) -_ | Digital_IO | Signal terminal PH0 OSC IN(PH0) -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0 OSC IN(PH0) -_. Supported peripheral buses: RTC/CLK. |
| 27 | PH1OSC OUT(PH1) -_ | Digital_IO | Signal terminal PH1OSC OUT(PH1) -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH1OSC OUT(PH1) -_. Supported peripheral buses: RTC/CLK. |
| 28 | NRST | Digital_IO | Active-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals. |
| 29 | PC0 | Digital_IO | Signal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL, SPI2_RDY. Supported peripheral buses: SPI, I2C, ADC. |
| 30 | PC1 | Digital_IO | Signal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI, I2C3_SDA. Supported peripheral buses: SPI, I2C, ADC. |
| 31 | PC2 | Digital_IO | Signal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOMDF1CCK1. Supported peripheral buses: UART, SPI, ADC. |
| 32 | PC3 | Digital_IO | Signal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSIUSART6TX. Supported peripheral buses: SPI, ADC. |
| 33 | VSSA | GND | 0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks. |
| 34 | VREF+ | Analog | Signal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General. |
| 35 | VDDA | Power_In | Primary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 36 | PA0 | Digital_IO | Signal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_RDY. Supported peripheral buses: UART, SPI, ADC, PWM. |
| 37 | PA1 | Digital_IO | Signal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, SPI1_SCK_USART2RTSDE. Supported peripheral buses: UART, SPI, I2C, ADC, PWM. |
| 38 | PA2 | Digital_IO | Signal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, PWM. |
| 39 | PA3 | Digital_IO | Signal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC, PWM. |
| 40 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 41 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 42 | PA4 | Digital_IO | Signal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSSUSART2CK. Supported peripheral buses: SPI, ADC, DAC. |
| 43 | PA5 | Digital_IO | Signal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, ADC, DAC. |
| 44 | PA6 | Digital_IO | Signal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC. |
| 45 | PA7 | Digital_IO | Signal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL, SPI1_MOSI. Supported peripheral buses: UART, SPI, I2C, ADC. |
| 46 | PB0 | Digital_IO | Signal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSSUSART3CK. Supported peripheral buses: SPI, ADC, PWM. |
| 47 | PB1 | Digital_IO | Signal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM. |
| 48 | PB2 | Digital_IO | Signal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_RDY. Supported peripheral buses: SPI, ADC, PWM, RTC/CLK. |
| 49 | PG0 | Digital_IO | Signal terminal PG0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG0. Supported peripheral buses: ADC. |
| 50 | PG1 | Digital_IO | Signal terminal PG1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG1. Supported peripheral buses: ADC. |
| 51 | PE7 | Digital_IO | Signal terminal PE7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General. |
| 52 | PE8 | Digital_IO | Signal terminal PE8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: SPI. |
| 53 | PE9 | Digital_IO | Signal terminal PE9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: General. |
| 54 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 55 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 56 | PE10 | Digital_IO | Signal terminal PE10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: General. |
| 57 | PE11 | Digital_IO | Signal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_RDYMDF1CKI4. Supported peripheral buses: SPI. |
| 58 | PE12 | Digital_IO | Signal terminal PE12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSSMDF1SDI5. Supported peripheral buses: SPI. |
| 59 | PE13 | Digital_IO | Signal terminal PE13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCKMDF1CKI5. Supported peripheral buses: SPI. |
| 60 | PE14 | Digital_IO | Signal terminal PE14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: General. |
| 61 | PE15 | Digital_IO | Signal terminal PE15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI. |
| 62 | PB10 | Digital_IO | Signal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SCL, SPI2_SCKUSART3TX. Supported peripheral buses: SPI, I2C. |
| 63 | PB11 | Digital_IO | Signal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SDA, I2C2_SDA, SPI2_RDY. Supported peripheral buses: UART, SPI, I2C. |
| 64 | VLXSMPS | Digital_IO | Signal terminal VLXSMPS (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VLXSMPS. Supported peripheral buses: General. |












