Mechanical Dimensions & Land Pattern (TFBGA-216(13x13))
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit TFBGA-216(13x13) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32U5G9NJH6Q (TFBGA-216(13x13))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32U5G9NJH6Q (TFBGA-216(13x13))?
Manufactured by ST, the STM32U5G9NJH6Q is housed in a TFBGA-216(13x13) package with 216 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PE0: Multiplexed I/O & Peripheral Pin PE0 (UART)), A3 (PB7: Multiplexed I/O & Peripheral Pin PB7 (UART, I2C, PWM)), A4 (PB6: Multiplexed I/O & Peripheral Pin PB6 (UART, I2C, PWM)), A5 (PG15: Multiplexed I/O & Peripheral Pin PG15 (General)), A6 (PG12: Multiplexed I/O & Peripheral Pin PG12 (UART, SPI, I2C)).
What are the IPC-7351B PCB Footprint dimensions for STM32U5G9NJH6Q?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32U5G9NJH6Q (TFBGA-216(13x13)) has a nominal body envelope of 13.00 × 13.00 mm, pitch e = 0.80 mm, and 216 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32U5G9NJH6Q?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32U5G9NJH6Q (ST, TFBGA-216(13x13)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (216 pins) & STM32U5G9NJH Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A2 | PE0 | Digital_IO | Signal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: UART. |
| A3 | PB7 | Digital_IO | Signal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: UART, I2C, PWM. |
| A4 | PB6 | Digital_IO | Signal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C, PWM. |
| A5 | PG15 | Digital_IO | Signal terminal PG15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General. |
| A6 | PG12 | Digital_IO | Signal terminal PG12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_NSS. Supported peripheral buses: UART, SPI, I2C. |
| A7 | PG9 | Digital_IO | Signal terminal PG9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI. |
| A8 | PD4 | Digital_IO | Signal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSIMDF1CKI0. Supported peripheral buses: UART, SPI. |
| A9 | PD3 | Digital_IO | Signal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C6_SMBA, SPI2_SCK, SPI2_MISO. Supported peripheral buses: SPI, I2C. |
| A10 | PC10 | Digital_IO | Signal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI. |
| A11 | PA15(JTDI) | Digital_IO | Signal terminal PA15(JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS_USART3RTSDE. Supported peripheral buses: UART, SPI, SWD/JTAG. |
| A12 | PA14(JTCK/SWCLK) | Digital_IO | Signal terminal PA14(JTCK/SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, I2C4_SMBA. Supported peripheral buses: I2C, SWD/JTAG. |
| A13 | PA8 | Digital_IO | Signal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_RDYUSART1CK. Supported peripheral buses: SPI, RTC/CLK. |
| A14 | PC8 | Digital_IO | Signal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: UART. |
| A15 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B1 | PC14 - OSC32 IN(PC14)_ | Digital_IO | Signal terminal PC14 - OSC32 IN(PC14)_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32 IN(PC14)_. Supported peripheral buses: RTC/CLK. |
| B2 | PE4 | Digital_IO | Signal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: UART. |
| B3 | PE1 | Digital_IO | Signal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: UART. |
| B4 | PH3 BOOT0 - | Digital_IO | Signal terminal PH3 BOOT0 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH3 BOOT0 -. Supported peripheral buses: General. |
| B5 | PB5 | Digital_IO | Signal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, SPI3_MOSI. Supported peripheral buses: UART, SPI. |
| B6 | PG13 | Digital_IO | Signal terminal PG13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, SPI3_RDYUSART1CK. Supported peripheral buses: SPI, I2C. |
| B7 | PG10 | Digital_IO | Signal terminal PG10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI. |
| B8 | PD5 | Digital_IO | Signal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_RDYUSART2TX. Supported peripheral buses: SPI. |
| B9 | PD2 | Digital_IO | Signal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C5_SMBA. Supported peripheral buses: UART, I2C. |
| B10 | PC11 | Digital_IO | Signal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI. |
| B11 | PH7 | Digital_IO | Signal terminal PH7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH7. Supported peripheral buses: I2C. |
| B12 | PH5 | Digital_IO | Signal terminal PH5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH5. Supported peripheral buses: I2C. |
| B13 | PA12 | Digital_IO | Signal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: UART. |
| B14 | PA11 | Digital_IO | Signal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: UART. |
| B15 | PC7 | Digital_IO | Signal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General. |
| C1 | IOC1 | Digital_IO | General Purpose Digital I/O Pin IOC1 |
| C2 | VBAT | Power_In | Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| C3 | PE3 | Digital_IO | Signal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General. |
| C4 | PI5 | Digital_IO | Signal terminal PI5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI5. Supported peripheral buses: General. |
| C5 | PB9 | Digital_IO | Signal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI. |
| C6 | PB8 | Digital_IO | Signal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_RDYLCDB1. Supported peripheral buses: SPI. |
| C7 | PG11 | Digital_IO | Signal terminal PG11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI. |
| C8 | PD6 | Digital_IO | Signal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: SPI. |
| C9 | PD1 | Digital_IO | Signal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C6_SCL, I2C5_SCL, SPI2_SCKLCDB5. Supported peripheral buses: SPI, I2C. |
| C10 | PC12 | Digital_IO | Signal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI. |
| C11 | PH6 | Digital_IO | Signal terminal PH6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH6. Supported peripheral buses: I2C. |
| C12 | PH4 | Digital_IO | Signal terminal PH4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH4. Supported peripheral buses: I2C. |
| C13 | PA13(JTMS/SWDIO) | Digital_IO | Signal terminal PA13(JTMS/SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13(JTMS/SWDIO). Supported peripheral buses: SWD/JTAG. |
| C14 | PC9 | Digital_IO | Signal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: UART. |
| C15 | PC6 | Digital_IO | Signal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General. |
| D1 | PJ3 | Digital_IO | Signal terminal PJ3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PJ3. Supported peripheral buses: UART. |
| D2 | PJ2 | Digital_IO | Signal terminal PJ2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C5_SCLEVENTOUT. Supported peripheral buses: I2C. |
| D3 | PE5 | Digital_IO | Signal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: SPI. |
| D4 | PI7 | Digital_IO | Signal terminal PI7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI7. Supported peripheral buses: General. |
| D5 | PI6 | Digital_IO | Signal terminal PI6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI6. Supported peripheral buses: General. |
| D6 | PB4(NJTRST) | Digital_IO | Signal terminal PB4(NJTRST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISOUSART1CTS. Supported peripheral buses: UART, SPI, I2C, SWD/JTAG. |
| D7 | PG14 | Digital_IO | Signal terminal PG14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG14. Supported peripheral buses: I2C. |
| D8 | PD7 | Digital_IO | Signal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General. |
| D9 | PD0 | Digital_IO | Signal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C6_SDA, SPI2_NSS. Supported peripheral buses: SPI, I2C, PWM. |
| D10 | PH8 | Digital_IO | Signal terminal PH8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH8. Supported peripheral buses: I2C. |
| D11 | PH2 | Digital_IO | Signal terminal PH2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH2. Supported peripheral buses: General. |
| D12 | PA10 | Digital_IO | Signal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART, PWM. |
| D13 | PG7 | Digital_IO | Signal terminal PG7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG7. Supported peripheral buses: General. |
| D14 | PG6 | Digital_IO | Signal terminal PG6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_RDY. Supported peripheral buses: SPI. |
| D15 | PG3 | Digital_IO | Signal terminal PG3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI. |
| E1 | PJ7 | Digital_IO | Signal terminal PJ7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PJ7. Supported peripheral buses: UART. |
| E2 | PJ6 | Digital_IO | Signal terminal PJ6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PJ6. Supported peripheral buses: UART. |
| E3 | PJ4 | Digital_IO | Signal terminal PJ4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PJ4. Supported peripheral buses: UART. |
| E4 | PE6 | Digital_IO | Signal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General. |













