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STM32U5G9ZJJ6Q (UFBGA-144(10x10)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32U5G9ZJJ6Q

STID: C22405230UFBGA-144(10x10) · 144 Pins · Pitch 0.80mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32U5G9ZJJ6Q (UFBGA-144(10x10))A1VSSA2PB9A3PH3-BOOT0A4PB6A5PB4A6PG14A7PG12A8PG10A9PD7A10PD3A11PC12A12VSSB1PE2B2PE3B3PE0B4PB8B5PB5B6PG15B7PG9B8PD5B9PD2B10PC10B11PA14B12PA10C1PC14-OSC32_IC2VBATC3PE4C4PE5C5PB7C6PG13C7PD4C8PC11C9PA15C10PA13C11PA12C12PA11D1VSSDSID2PC15-OSC32_OD3PE6D4VDD11D5VSSD6PB3D7PD6D8PD0D9VSSD10VDDUSBD11PA8D12PC8E1DSI_D0NE2DSI_D0PE3VDDDSIE4PC13E5PF0E6VDDIO2E7PD1E8VDDE9PA9E10VDDE11PI2E12PI3F1DSI_CKNF2DSI_CKPF3VSSDSIF4PF1F5VDDF6VSSF7VSSF8PC9F9PC7F10VSSF11PI0F12PI1M12VSSM11PD8M10PB13M9PB15M8VDDSMPSM7VLXSMPSM6PE15M5PE11M4PB1M3PA6M2PA3M1VSSL12PD14L11PD10L10PB14L9PD11L8VSSSMPSL7PB11L6PE13L5PE7L4PA7L3PA4L2PA2L1PC3K12PH9K11PD12K10PD9K9PD13K8PB10K7PE14K6PE9K5PG0K4PA5K3PA1K2PC0K1PC1J12PH10J11PH11J10VDDJ9VDD11J8PE12J7PE10J6PG1J5PB0J4VDDAJ3VSSAJ2NRSTJ1PH1-OSC_OUTH12PH13H11PH12H10VSSH9PD15H8PE8H7VDDH6PB2H5VDDH4PA0H3VREF+H2PH0-OSC_INH1VSSDSIG12PH15G11PH14G10VDDG9PC6G8VDDG7VSSG6VSSG5PC2G4PF2G3VDD11DSIG2DSI_D1PG1DSI_D1NGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.896.591.486.481.376.271.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1-76.2-81.3-86.4-91.4-96.5mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1A2B2C2D2E2F2G2H2J2K2L2M2A3B3C3D3E3F3G3H3J3K3L3M3A4B4C4D4E4F4G4H4J4K4L4M4A5B5C5D5E5F5G5H5J5K5L5M5A6B6C6D6E6F6G6H6J6K6L6M6A7B7C7D7E7F7G7H7J7K7L7M7A8B8C8D8E8F8G8H8J8K8L8M8A9B9C9D9E9F9G9H9J9K9L9M9A10B10C10D10E10F10G10H10J10K10L10M10A11B11C11D11E11F11G11H11J11K11L11M11A12B12C12D12E12F12G12H12J12K12L12M12E=10.00mm · Pitch e=0.80mmD=10.00mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 10.00mm × 10.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (144/144)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VSSGNDGround Reference Pin (VSS)
A2PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
A3PH3-BOOT0I/OMultiplexed I/O & Peripheral Pin PH3-BOOT0 (General)
A4PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
A5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
A6PG14I/OMultiplexed I/O & Peripheral Pin PG14 (General)
A7PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
A8PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
A9PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
A10PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
A11PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
A12VSSGNDGround Reference Pin (VSS)
B1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
B2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
B3PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
B4PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
B5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
B6PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
B7PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
B8PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
B9PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
B10PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
B11PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
B12PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
C1PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
C2VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
C3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
C4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
C5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
C6PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
C7PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
C8PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
C9PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
C10PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
C11PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
C12PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
D1VSSDSIGNDGround Reference Pin (VSSDSI)
D2PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
D3PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
D4VDD11PowerPower Supply Input (VDD11 — 3.3V VDD (Max 4.0V))
D5VSSGNDGround Reference Pin (VSS)
D6PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
D7PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
D8PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
D9VSSGNDGround Reference Pin (VSS)
D10VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
D11PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
D12PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
E1DSI_D0NI/OMultiplexed I/O & Peripheral Pin DSI_D0N (General)
E2DSI_D0PI/OMultiplexed I/O & Peripheral Pin DSI_D0P (General)
E3VDDDSIPowerPower Supply Input (VDDDSI — 3.3V VDD (Max 4.0V))
E4PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
E5PF0I/OMultiplexed I/O & Peripheral Pin PF0 (General)
E6VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
E7PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
E8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E9PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
E10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E11PI2I/OMultiplexed I/O & Peripheral Pin PI2 (General)
E12PI3I/OMultiplexed I/O & Peripheral Pin PI3 (General)
F1DSI_CKNI/OMultiplexed I/O & Peripheral Pin DSI_CKN (General)
F2DSI_CKPI/OMultiplexed I/O & Peripheral Pin DSI_CKP (General)
F3VSSDSIGNDGround Reference Pin (VSSDSI)
F4PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
F5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F6VSSGNDGround Reference Pin (VSS)
F7VSSGNDGround Reference Pin (VSS)
F8PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
F9PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
F10VSSGNDGround Reference Pin (VSS)
F11PI0I/OMultiplexed I/O & Peripheral Pin PI0 (General)
F12PI1I/OMultiplexed I/O & Peripheral Pin PI1 (General)
G1DSI_D1NI/OMultiplexed I/O & Peripheral Pin DSI_D1N (General)
G2DSI_D1PI/OMultiplexed I/O & Peripheral Pin DSI_D1P (General)
G3VDD11DSIPowerPower Supply Input (VDD11DSI — 3.3V VDD (Max 4.0V))
G4PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
G5PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
G6VSSGNDGround Reference Pin (VSS)
G7VSSGNDGround Reference Pin (VSS)
G8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G9PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
G10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G11PH14I/OMultiplexed I/O & Peripheral Pin PH14 (General)
G12PH15I/OMultiplexed I/O & Peripheral Pin PH15 (General)
H1VSSDSIGNDGround Reference Pin (VSSDSI)
H2PH0-OSC_INI/OMultiplexed I/O & Peripheral Pin PH0-OSC_IN (RTC/CLK)
H3VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (General)
H4PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
H5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H6PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
H7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H8PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
H9PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
H10VSSGNDGround Reference Pin (VSS)
H11PH12I/OMultiplexed I/O & Peripheral Pin PH12 (General)
H12PH13I/OMultiplexed I/O & Peripheral Pin PH13 (General)
J1PH1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1-OSC_OUT (RTC/CLK)
J2NRSTISystem Enable & Hardware Reset (NRST)
J3VSSAGNDGround Reference Pin (VSSA)
J4VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
J5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
J6PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
J7PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
J8PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
J9VDD11PowerPower Supply Input (VDD11 — 3.3V VDD (Max 4.0V))
J10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J11PH11I/OMultiplexed I/O & Peripheral Pin PH11 (General)
J12PH10I/OMultiplexed I/O & Peripheral Pin PH10 (General)
K1PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
K2PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
K3PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
K4PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
K5PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
K6PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
K7PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
K8PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
K9PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
K10PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
K11PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
K12PH9I/OMultiplexed I/O & Peripheral Pin PH9 (General)
L1PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
L2PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
L3PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
L4PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
L5PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
L6PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
L7PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
L8VSSSMPSGNDGround Reference Pin (VSSSMPS)
L9PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
L10PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
L11PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
L12PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
M1VSSGNDGround Reference Pin (VSS)
M2PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
M3PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
M4PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
M5PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
M6PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
M7VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
M8VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
M9PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
M10PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
M11PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
M12VSSGNDGround Reference Pin (VSS)
PIN A1 VSS
GND
Ground Reference Pin (VSS)
Design note: 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32U5G9ZJJ6Q (ST · UFBGA-144(10x10))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32U5G9ZJJ6Q (UFBGA-144(10x10)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32U5G9ZJJ6Q (UFBGA-144(10x10)) - 2. Standard Pinout (Top View)
True package pinout (144 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32U5G9ZJJ6Q (UFBGA-144(10x10)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32U5G9ZJJ6Q (UFBGA-144(10x10)) - 4. Package Dimensions (D×E×A)
UFBGA-144(10x10) · 10.00×10.00mm · Pitch 0.80mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32U5G9ZJJ6Q (UFBGA-144(10x10)) - 5. Recommended Land Pattern
IPC-7351B Footprint (144 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32U5G9ZJJ6Q (UFBGA-144(10x10)) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (STM32U5G9ZJJ6Q)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32U5G9ZJJ6Q (UFBGA-144(10x10)) is a 144-pin embedded microcontroller unit (mcu) featuring a 10.00 × 10.00 × 0.58 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
10.00 × 10.00 × 0.58 mm (A1=0.20 mm)
Package family: BGA (UFBGA-144(10x10))
Pin Count & Lead PitchN / e
144 Pins | Pitch e = 0.80 mm (31.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol144 auto-grouped pins
OK
IPC-7351B Land Pattern144 pads · Pitch 0.80mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-144(10x10))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.58mm · e=0.80mm
Pad Size (W × L)Level B
0.32 × 0.32 mm
Pins / Total PadsTopology
144P / 144Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-144(10x10)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32U5G9ZJJ6Q (UFBGA-144(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32U5G9ZJJ6Q (UFBGA-144(10x10))?

Manufactured by ST, the STM32U5G9ZJJ6Q is housed in a UFBGA-144(10x10) package with 144 pins and a 0.80 mm lead pitch. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PB9: Multiplexed I/O & Peripheral Pin PB9 (General)), A3 (PH3-BOOT0: Multiplexed I/O & Peripheral Pin PH3-BOOT0 (General)), A4 (PB6: Multiplexed I/O & Peripheral Pin PB6 (General)), A5 (PB4: Multiplexed I/O & Peripheral Pin PB4 (General)), A6 (PG14: Multiplexed I/O & Peripheral Pin PG14 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32U5G9ZJJ6Q?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32U5G9ZJJ6Q (UFBGA-144(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.80 mm, and 144 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32U5G9ZJJ6Q?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32U5G9ZJJ6Q (ST, UFBGA-144(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (144 pins) & STM32U5G9ZJJ Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A2PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
A3PH3-BOOT0Digital_IOSignal terminal PH3-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH3-BOOT0. Supported peripheral buses: General.
A4PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
A5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
A6PG14Digital_IOSignal terminal PG14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG14. Supported peripheral buses: General.
A7PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General.
A8PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General.
A9PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
A10PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
A11PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
A12VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B1PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
B2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
B3PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
B4PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
B5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
B6PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General.
B7PG9Digital_IOSignal terminal PG9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: General.
B8PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
B9PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
B10PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
B11PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
B12PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
C1PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
C2VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C3PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
C4PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
C5PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
C6PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG13. Supported peripheral buses: General.
C7PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
C8PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
C9PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
C10PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
C11PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
C12PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
D1VSSDSIGND0V electrical ground return terminal (VSSDSI) for internal core logic, I/O drivers, and analog sub-blocks.
D2PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
D3PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
D4VDD11Power_InPrimary positive power supply input (VDD11) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D5VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D6PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
D7PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
D8PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
D9VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D10VDDUSBPower_InPrimary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D11PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
D12PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
E1DSI_D0NDigital_IOSignal terminal DSI_D0N (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_D0N. Supported peripheral buses: General.
E2DSI_D0PDigital_IOSignal terminal DSI_D0P (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_D0P. Supported peripheral buses: General.
E3VDDDSIPower_InPrimary positive power supply input (VDDDSI) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E4PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
E5PF0Digital_IOSignal terminal PF0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF0. Supported peripheral buses: General.
E6VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E7PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
E8VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E9PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
E10VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E11PI2Digital_IOSignal terminal PI2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI2. Supported peripheral buses: General.
E12PI3Digital_IOSignal terminal PI3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI3. Supported peripheral buses: General.
F1DSI_CKNDigital_IOSignal terminal DSI_CKN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_CKN. Supported peripheral buses: General.
F2DSI_CKPDigital_IOSignal terminal DSI_CKP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DSI_CKP. Supported peripheral buses: General.
F3VSSDSIGND0V electrical ground return terminal (VSSDSI) for internal core logic, I/O drivers, and analog sub-blocks.
F4PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
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