PIC32MX360F256L-80I/PT (TQFP-100(12x12)) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of PIC32MX360F256L-80I/PT (TQFP-100(12x12))?

Manufactured by MICROCHIP, the PIC32MX360F256L-80I/PT is housed in a TQFP-100(12x12) package with 100 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 2.3V to 3.6V. Key pins include: 1 (RG15: Multiplexed I/O & Peripheral Pin RG15 (General)), 2 (VDD: Power Supply Input (VDD — 2.3V to 3.6V)), 3 (PMD5: Multiplexed I/O & Peripheral Pin PMD5 (General)), 4 (PMD6: Multiplexed I/O & Peripheral Pin PMD6 (General)), 5 (PMD7: Multiplexed I/O & Peripheral Pin PMD7 (General)), 6 (T2CK: Multiplexed I/O & Peripheral Pin T2CK (General)).

Q: What are the IPC-7351B PCB Footprint dimensions for PIC32MX360F256L-80I/PT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC32MX360F256L-80I/PT (TQFP-100(12x12)) has a nominal body envelope of 12.00 × 12.00 mm, pitch e = 0.40 mm, and 100 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC32MX360F256L-80I/PT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC32MX360F256L-80I/PT (MICROCHIP, TQFP-100(12x12)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 12.00mm × 12.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (100/100)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	RG15	I/O	Multiplexed I/O & Peripheral Pin RG15 (General)
2	VDD	Power	Power Supply Input (VDD — 2.3V to 3.6V)
3	PMD5	I/O	Multiplexed I/O & Peripheral Pin PMD5 (General)
4	PMD6	I/O	Multiplexed I/O & Peripheral Pin PMD6 (General)
5	PMD7	I/O	Multiplexed I/O & Peripheral Pin PMD7 (General)
6	T2CK	I/O	Multiplexed I/O & Peripheral Pin T2CK (General)
7	T3CK	I/O	Multiplexed I/O & Peripheral Pin T3CK (General)
8	T4CK	I/O	Multiplexed I/O & Peripheral Pin T4CK (General)
9	SDI1	I/O	Multiplexed I/O & Peripheral Pin SDI1 (SPI)
10	PMA5	I/O	Multiplexed I/O & Peripheral Pin PMA5 (General)
11	PMA4	I/O	Multiplexed I/O & Peripheral Pin PMA4 (General)
12	PMA3	I/O	Multiplexed I/O & Peripheral Pin PMA3 (General)
13	MCLR	I/O	Multiplexed I/O & Peripheral Pin MCLR (General)
14	PMA2	I/O	Multiplexed I/O & Peripheral Pin PMA2 (General)
15	Vss	GND	Ground Reference Pin (Vss)
16	VDD	Power	Power Supply Input (VDD — 2.3V to 3.6V)
17	TMS	I/O	Multiplexed I/O & Peripheral Pin TMS (SWD/JTAG)
18	RE8	I/O	Multiplexed I/O & Peripheral Pin RE8 (General)
19	RE9	I/O	Multiplexed I/O & Peripheral Pin RE9 (General)
20	VBUSON	Power	Regulated Power Output (VBUSON — 2.3V to 3.6V)
21	C1IN -	I/O	Multiplexed I/O & Peripheral Pin C1IN - (General)
22	C2IN+	I/O	Multiplexed I/O & Peripheral Pin C2IN+ (General)
23	C2IN -	I/O	Multiplexed I/O & Peripheral Pin C2IN - (General)
24	PGEC1	I/O	Multiplexed I/O & Peripheral Pin PGEC1 (General)
25	PGED1	I/O	Multiplexed I/O & Peripheral Pin PGED1 (General)
26	PGEC2	I/O	Multiplexed I/O & Peripheral Pin PGEC2 (General)
27	PGED2	I/O	Multiplexed I/O & Peripheral Pin PGED2 (General)
28	VREF-	Analog	Multiplexed I/O & Peripheral Pin VREF- (General)
29	VREF+	Analog	Multiplexed I/O & Peripheral Pin VREF+ (General)
30	AVDD	Power	Power Supply Input (AVDD — 2.3V to 3.6V)
31	AVSS	GND	Ground Reference Pin (AVSS)
32	C1OUT	I/O	Multiplexed I/O & Peripheral Pin C1OUT (General)
33	C2OUT	I/O	Multiplexed I/O & Peripheral Pin C2OUT (General)
34	PMA13	I/O	Multiplexed I/O & Peripheral Pin PMA13 (General)
35	PMA12	I/O	Multiplexed I/O & Peripheral Pin PMA12 (General)
36	Vss	GND	Ground Reference Pin (Vss)
37	VDD	Power	Power Supply Input (VDD — 2.3V to 3.6V)
38	TCK	I/O	Multiplexed I/O & Peripheral Pin TCK (SWD/JTAG)
39	U2RTS	I/O	Multiplexed I/O & Peripheral Pin U2RTS (UART)
40	U2CTS	I/O	Multiplexed I/O & Peripheral Pin U2CTS (UART)
41	PMA11	I/O	Multiplexed I/O & Peripheral Pin PMA11 (General)
42	PMA10	I/O	Multiplexed I/O & Peripheral Pin PMA10 (General)
43	PMALH	I/O	Multiplexed I/O & Peripheral Pin PMALH (General)
44	PMALL	I/O	Multiplexed I/O & Peripheral Pin PMALL (General)
45	Vss	GND	Ground Reference Pin (Vss)
46	VDD	Power	Power Supply Input (VDD — 2.3V to 3.6V)
47	U1CTS	I/O	Multiplexed I/O & Peripheral Pin U1CTS (UART)
48	U1RTS	I/O	Multiplexed I/O & Peripheral Pin U1RTS (UART)
49	PMA9	I/O	Multiplexed I/O & Peripheral Pin PMA9 (General)
50	PMA8	I/O	Multiplexed I/O & Peripheral Pin PMA8 (General)
51	USBID	I/O	Multiplexed I/O & Peripheral Pin USBID (USB)
52	U1RX	I/O	Multiplexed I/O & Peripheral Pin U1RX (UART)
53	SDO1	I/O	Multiplexed I/O & Peripheral Pin SDO1 (SPI)
54	VBUS	Power	Power Supply Input (VBUS — 2.3V to 3.6V)
55	VUSB	I/O	Multiplexed I/O & Peripheral Pin VUSB (USB)
56	D -	I/O	Multiplexed I/O & Peripheral Pin D - (USB)
57	D+	I/O	Multiplexed I/O & Peripheral Pin D+ (USB)
58	SCL2	I/O	Multiplexed I/O & Peripheral Pin SCL2 (I2C)
59	SDA2	I/O	Multiplexed I/O & Peripheral Pin SDA2 (I2C)
60	TDI	I/O	Multiplexed I/O & Peripheral Pin TDI (SWD/JTAG)
61	TDO	I/O	Multiplexed I/O & Peripheral Pin TDO (SWD/JTAG)
62	VDD	Power	Power Supply Input (VDD — 2.3V to 3.6V)
63	RC12	I/O	Multiplexed I/O & Peripheral Pin RC12 (General)
64	RC15	I/O	Multiplexed I/O & Peripheral Pin RC15 (General)
65	Vss	GND	Exposed Thermal & Ground Pad (Vss)
66	SCL1	I/O	Multiplexed I/O & Peripheral Pin SCL1 (I2C)
67	SDA1	I/O	Multiplexed I/O & Peripheral Pin SDA1 (I2C)
68	RTCC	I/O	Multiplexed I/O & Peripheral Pin RTCC (RTC/CLK)
69	SS1	I/O	Multiplexed I/O & Peripheral Pin SS1 (SPI)
70	PMCS2	I/O	Multiplexed I/O & Peripheral Pin PMCS2 (General)
71	PMCS1	I/O	Multiplexed I/O & Peripheral Pin PMCS1 (General)
72	SDO1	I/O	Multiplexed I/O & Peripheral Pin SDO1 (SPI)
73	RC13	I/O	Multiplexed I/O & Peripheral Pin RC13 (General)
74	T1CK	I/O	Multiplexed I/O & Peripheral Pin T1CK (General)
75	Vss	GND	Ground Reference Pin (Vss)
76	RD1	I/O	Multiplexed I/O & Peripheral Pin RD1 (General)
77	RD2	I/O	Multiplexed I/O & Peripheral Pin RD2 (General)
78	RD3	I/O	Multiplexed I/O & Peripheral Pin RD3 (General)
79	PMD12	I/O	Multiplexed I/O & Peripheral Pin PMD12 (General)
80	PMD13	I/O	Multiplexed I/O & Peripheral Pin PMD13 (General)
81	PMWR	I/O	Multiplexed I/O & Peripheral Pin PMWR (General)
82	PMRD	I/O	Multiplexed I/O & Peripheral Pin PMRD (General)
83	PMD14	I/O	Multiplexed I/O & Peripheral Pin PMD14 (General)
84	PMD15	I/O	Multiplexed I/O & Peripheral Pin PMD15 (General)
85	VCORE/ VCAP	I/O	Multiplexed I/O & Peripheral Pin VCORE/ VCAP (General)
86	ENVREG	I/O	Multiplexed I/O & Peripheral Pin ENVREG (General)
87	PMD11	I/O	Multiplexed I/O & Peripheral Pin PMD11 (General)
88	PMD10	I/O	Multiplexed I/O & Peripheral Pin PMD10 (General)
89	PMD9	I/O	Multiplexed I/O & Peripheral Pin PMD9 (General)
90	PMD8	I/O	Multiplexed I/O & Peripheral Pin PMD8 (General)
91	TRCLK	I/O	Multiplexed I/O & Peripheral Pin TRCLK (General)
92	TRD3	I/O	Multiplexed I/O & Peripheral Pin TRD3 (General)
93	PMD0	I/O	Multiplexed I/O & Peripheral Pin PMD0 (General)
94	PMD1	I/O	Multiplexed I/O & Peripheral Pin PMD1 (General)
95	TRD2	I/O	Multiplexed I/O & Peripheral Pin TRD2 (General)
96	TRD1	I/O	Multiplexed I/O & Peripheral Pin TRD1 (General)
97	TRD0	I/O	Multiplexed I/O & Peripheral Pin TRD0 (General)
98	PMD2	I/O	Multiplexed I/O & Peripheral Pin PMD2 (General)
99	PMD3	I/O	Multiplexed I/O & Peripheral Pin PMD3 (General)
100	PMD4	I/O	Multiplexed I/O & Peripheral Pin PMD4 (General)

PIN 1 RG15

I/O

Multiplexed I/O & Peripheral Pin RG15 (General)

Design note: Signal terminal RG15 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RG15. Supported peripheral buses: General.

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

PIC32MX360F256L-80I/PT (TQFP-100(12x12)) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

PIC32MX360F256L-80I/PT (TQFP-100(12x12)) - 2. Standard Pinout (Top View)

True package pinout (100 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

PIC32MX360F256L-80I/PT (TQFP-100(12x12)) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

PIC32MX360F256L-80I/PT (TQFP-100(12x12)) - 4. Package Dimensions (D×E×A)

TQFP-100(12x12) · 12.00×12.00mm · Pitch 0.40mmExpand ›

5. Recommended Land PatternLAND PATTERN

PIC32MX360F256L-80I/PT (TQFP-100(12x12)) - 5. Recommended Land Pattern

IPC-7351B Footprint (100 Pads)Expand ›

6. Application SchematicSCHEMATIC

PIC32MX360F256L-80I/PT (TQFP-100(12x12)) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)

Showing 1–8 of 8 uncropped original figures for PIC32MX360F2

P1 · p01_fig01752×399px

PIC32MX3XX/4XX

P1 · p01_fig01P1

Datasheet Page 1 (p01_fig01)

P2 · p02_fig011777×1639px

PIC32MX360F256L-80I/PT (TQFP-100(12x12)) — DS61143H-page 2 © 2011 Microchip Technology Inc. | Trademarks | FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Inc

DS61143H-page 2 © 2011 Microchip Technology Inc. | Trademarks | FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Inc

P2 · p02_fig02785×283px

ISBN: 978-1-61341-149-0

P191 · p191_fig02428×1789px

PIC32MX360F256L-80I/PT (TQFP-100(12x12)) — 3 e

3 e

P191 · p191_fig031777×666px

0510017

P191 · p191_fig03P191

Datasheet Page 191 (p191_fig03)

P191 · p191_fig01All Packages in PDF

PIC32MX360F256L-80I/PT (TQFP-100(12x12)) — 30.0 PACKAGING INFORMATION | 30.1 Package Marking Information | 64-Lead TQFP (10x10x1 mm) | XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN | 100-Lead TQFP (12x12x1 mm) | XXXXXXXXXXXX XXXXXXXXXXXX YYWWNNN | XXXXXXXXXX | 64-Lead QFN (9x9x0.9 mm) |

Technical Specifications & Part Details (PIC32MX360F256L-80I/PT)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:PIC32MX360F256L-80I/PT (TQFP-100(12x12)) is a 100-pin standard electronic & interconnect component featuring a 12.00 × 12.00 × 1.20 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 2.3V to 3.6V supply operation across -40°C to +85°C with integrated USB, UART, SPI, I2C, PWM, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG interfaces.

Operating Supply VoltageV_CC / V_DD

2.3V to 3.6V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C to +85°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

80 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

12.00 × 12.00 × 1.20 mm (A1=0.10 mm)

Package family: TQFP (TQFP-100(12x12))

Pin Count & Lead PitchN / e

100 Pins | Pitch e = 0.40 mm (15.7 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

USB, UART, SPI, I2C, PWM, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol100 auto-grouped pins

IPC-7351B Land Pattern100 pads · Pitch 0.40mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TQFP-100(12x12))

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

12.00 × 12.00 mm

Height (A) & Pitch (e)IPC-7351B

A=1.20mm · e=0.40mm

Pad Size (W × L)Level B

0.24 × 1.25 mm

Pins / Total PadsTopology

100P / 100Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit TQFP-100(12x12)	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC32MX360F256L-80I/PT (TQFP-100(12x12))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC32MX360F256L-80I/PT (TQFP-100(12x12))?

Manufactured by MICROCHIP, the PIC32MX360F256L-80I/PT is housed in a TQFP-100(12x12) package with 100 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 2.3V to 3.6V. Key pins include: 1 (RG15: Multiplexed I/O & Peripheral Pin RG15 (General)), 2 (VDD: Power Supply Input (VDD — 2.3V to 3.6V)), 3 (PMD5: Multiplexed I/O & Peripheral Pin PMD5 (General)), 4 (PMD6: Multiplexed I/O & Peripheral Pin PMD6 (General)), 5 (PMD7: Multiplexed I/O & Peripheral Pin PMD7 (General)), 6 (T2CK: Multiplexed I/O & Peripheral Pin T2CK (General)).

What are the IPC-7351B PCB Footprint dimensions for PIC32MX360F256L-80I/PT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC32MX360F256L-80I/PT (TQFP-100(12x12)) has a nominal body envelope of 12.00 × 12.00 mm, pitch e = 0.40 mm, and 100 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC32MX360F256L-80I/PT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC32MX360F256L-80I/PT (MICROCHIP, TQFP-100(12x12)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (100 pins) & PIC32MX360F2 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	RG15	Digital_IO	Signal terminal RG15 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RG15. Supported peripheral buses: General.
2	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
3	PMD5	Digital_IO	Signal terminal PMD5 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMD5. Supported peripheral buses: General.
4	PMD6	Digital_IO	Signal terminal PMD6 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMD6. Supported peripheral buses: General.
5	PMD7	Digital_IO	Signal terminal PMD7 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMD7. Supported peripheral buses: General.
6	T2CK	Digital_IO	Signal terminal T2CK (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: T2CK. Supported peripheral buses: General.
7	T3CK	Digital_IO	Signal terminal T3CK (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: T3CK. Supported peripheral buses: General.
8	T4CK	Digital_IO	Signal terminal T4CK (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: T4CK. Supported peripheral buses: General.
9	SDI1	Digital_IO	Signal terminal SDI1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: SPI1DATAIN. Supported peripheral buses: SPI.
10	PMA5	Digital_IO	Signal terminal PMA5 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA5. Supported peripheral buses: General.
11	PMA4	Digital_IO	Signal terminal PMA4 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA4. Supported peripheral buses: General.
12	PMA3	Digital_IO	Signal terminal PMA3 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA3. Supported peripheral buses: General.
13	MCLR	Digital_IO	Signal terminal MCLR (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: MCLR. Supported peripheral buses: General.
14	PMA2	Digital_IO	Signal terminal PMA2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA2. Supported peripheral buses: General.
15	Vss	GND	0V electrical ground return terminal (Vss) for internal core logic, I/O drivers, and analog sub-blocks.
16	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
17	TMS	Digital_IO	Signal terminal TMS (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: TMS. Supported peripheral buses: SWD/JTAG.
18	RE8	Digital_IO	Signal terminal RE8 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RE8. Supported peripheral buses: General.
19	RE9	Digital_IO	Signal terminal RE9 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RE9. Supported peripheral buses: General.
20	VBUSON	Power_Out	Regulated power output rail (VBUSON) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
21	C1IN -	Digital_IO	Signal terminal C1IN - (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C1IN -. Supported peripheral buses: General.
22	C2IN+	Digital_IO	Signal terminal C2IN+ (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C2IN+. Supported peripheral buses: General.
23	C2IN -	Digital_IO	Signal terminal C2IN - (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C2IN -. Supported peripheral buses: General.
24	PGEC1	Digital_IO	Signal terminal PGEC1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PGEC1. Supported peripheral buses: General.
25	PGED1	Digital_IO	Signal terminal PGED1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PGED1. Supported peripheral buses: General.
26	PGEC2	Digital_IO	Signal terminal PGEC2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PGEC2. Supported peripheral buses: General.
27	PGED2	Digital_IO	Signal terminal PGED2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PGED2. Supported peripheral buses: General.
28	VREF-	Analog	Signal terminal VREF- (Analog, 2.3V to 3.6V domain). Multiplexed alternate functions: VREF-. Supported peripheral buses: General.
29	VREF+	Analog	Signal terminal VREF+ (Analog, 2.3V to 3.6V domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
30	AVDD	Power_In	Primary positive power supply input (AVDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
31	AVSS	GND	0V electrical ground return terminal (AVSS) for internal core logic, I/O drivers, and analog sub-blocks.
32	C1OUT	Digital_IO	Signal terminal C1OUT (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C1OUT. Supported peripheral buses: General.
33	C2OUT	Digital_IO	Signal terminal C2OUT (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: C2OUT. Supported peripheral buses: General.
34	PMA13	Digital_IO	Signal terminal PMA13 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA13. Supported peripheral buses: General.
35	PMA12	Digital_IO	Signal terminal PMA12 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA12. Supported peripheral buses: General.
36	Vss	GND	0V electrical ground return terminal (Vss) for internal core logic, I/O drivers, and analog sub-blocks.
37	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
38	TCK	Digital_IO	Signal terminal TCK (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: TCK. Supported peripheral buses: SWD/JTAG.
39	U2RTS	Digital_IO	Signal terminal U2RTS (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: U2RTS. Supported peripheral buses: UART.
40	U2CTS	Digital_IO	Signal terminal U2CTS (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: U2CTS. Supported peripheral buses: UART.
41	PMA11	Digital_IO	Signal terminal PMA11 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA11. Supported peripheral buses: General.
42	PMA10	Digital_IO	Signal terminal PMA10 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA10. Supported peripheral buses: General.
43	PMALH	Digital_IO	Signal terminal PMALH (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMALH. Supported peripheral buses: General.
44	PMALL	Digital_IO	Signal terminal PMALL (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMALL. Supported peripheral buses: General.
45	Vss	GND	0V electrical ground return terminal (Vss) for internal core logic, I/O drivers, and analog sub-blocks.
46	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
47	U1CTS	Digital_IO	Signal terminal U1CTS (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: U1CTS. Supported peripheral buses: UART.
48	U1RTS	Digital_IO	Signal terminal U1RTS (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: U1RTS. Supported peripheral buses: UART.
49	PMA9	Digital_IO	Signal terminal PMA9 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA9. Supported peripheral buses: General.
50	PMA8	Digital_IO	Signal terminal PMA8 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: PMA8. Supported peripheral buses: General.
51	USBID	Digital_IO	Signal terminal USBID (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: USBID. Supported peripheral buses: USB.
52	U1RX	Digital_IO	Signal terminal U1RX (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: U1RX. Supported peripheral buses: UART.
53	SDO1	Digital_IO	Signal terminal SDO1 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: SPI1DATAOUT. Supported peripheral buses: SPI.
54	VBUS	Power_In	Primary positive power supply input (VBUS) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
55	VUSB	Digital_IO	Signal terminal VUSB (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: VUSB. Supported peripheral buses: USB.
56	D -	Digital_IO	Signal terminal D - (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: D -. Supported peripheral buses: USB.
57	D+	Digital_IO	Signal terminal D+ (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: D+. Supported peripheral buses: USB.
58	SCL2	Digital_IO	Signal terminal SCL2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: SCL2. Supported peripheral buses: I2C.
59	SDA2	Digital_IO	Signal terminal SDA2 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: SDA2. Supported peripheral buses: I2C.
60	TDI	Digital_IO	Signal terminal TDI (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: TDI. Supported peripheral buses: SWD/JTAG.
61	TDO	Digital_IO	Signal terminal TDO (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: TDO. Supported peripheral buses: SWD/JTAG.
62	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.3V to 3.6V domain (Max rating: 3.6V).
63	RC12	Digital_IO	Signal terminal RC12 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RC12. Supported peripheral buses: General.
64	RC15	Digital_IO	Signal terminal RC15 (I/O, 2.3V to 3.6V domain). Multiplexed alternate functions: RC15. Supported peripheral buses: General.

4D Studio: PIC32MX360F256L-80I/PT Permalink: /part/C220261 MICROCHIP TQFP-100(12x12)All Packages All Manufacturers