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ATMEGA329PV-10AU (TQFP-64(14x14)) — Symbol, Footprint IPC-7351B & 3D STEP Model

ATMEGA329PV-10AU

MICROCHIPTQFP-64(14x14) · 64 Pins · Pitch 0.80mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ATMEGA329PV-10AU (TQFP-64(14x14))1LCDCAP2(RXD/PCINT0)3(TXD/PCINT1)4(XCK/AIN0/PC5(AIN1/PCINT36(USCK/SCL/PC7(DI/SDA/PCIN8(DO/PCINT6)P9(CLKO/PCINT710(#SS/PCINT8)11(SCK/PCINT9)12(MOSI/PCINT113(MISO/PCINT114(OC0A/PCINT115(OC1A/PCINT116(OC1B/PCINT117(OC2A/PCINT118(T1/SEG24)PG19(T0/SEG23)PG20#RESET/PG521VCC22GND23(TOSC2)XTAL224(TOSC1)XTAL125(ICP1/SEG22)26(INT0/SEG21)27(SEG20)PD228(SEG19)PD329(SEG18)PD430(SEG17)PD531(SEG16)PD632(SEG15)PD764AVCC63GND62AREF61PF0(ADC0)60PF1(ADC1)59PF2(ADC2)58PF3(ADC3)57PF4(ADC4/TCK56PF5(ADC5/TMS55PF6(ADC6/TDO54PF7(ADC7/TDI53GND52VCC51PA0(COM0)50PA1(COM1)49PA2(COM2)48PA3(COM3)47PA4(SEG0)46PA5(SEG1)45PA6(SEG2)44PA7(SEG3)43PG2(SEG4)42PC7(SEG5)41PC6(SEG6)40PC5(SEG7)39PC4(SEG8)38PC3(SEG9)37PC2(SEG10)36PC1(SEG11)35PC0(SEG12)34PG1(SEG13)33PG0(SEG14)Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364E=14.00mm · Pitch e=0.80mmD=14.00mm-13-11-9-7-5-3-1135791113131197531-1-3-5-7-9-11-13mm
3. 3D CAD MODEL
Package Body: 14.00mm × 14.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1LCDCAPI/OMultiplexed I/O & Peripheral Pin LCDCAP (General)
2(RXD/PCINT0)PE0I/OMultiplexed I/O & Peripheral Pin (RXD/PCINT0)PE0 (UART)
3(TXD/PCINT1)PE1I/OMultiplexed I/O & Peripheral Pin (TXD/PCINT1)PE1 (UART)
4(XCK/AIN0/PCINT2)PE2I/OMultiplexed I/O & Peripheral Pin (XCK/AIN0/PCINT2)PE2 (ADC)
5(AIN1/PCINT3)PE3I/OMultiplexed I/O & Peripheral Pin (AIN1/PCINT3)PE3 (ADC)
6(USCK/SCL/PCINT4)PE4I/OMultiplexed I/O & Peripheral Pin (USCK/SCL/PCINT4)PE4 (I2C)
7(DI/SDA/PCINT5)PE5I/OMultiplexed I/O & Peripheral Pin (DI/SDA/PCINT5)PE5 (I2C)
8(DO/PCINT6)PE6I/OMultiplexed I/O & Peripheral Pin (DO/PCINT6)PE6 (General)
9(CLKO/PCINT7)PE7I/OMultiplexed I/O & Peripheral Pin (CLKO/PCINT7)PE7 (General)
10(#SS/PCINT8)PB0I/OMultiplexed I/O & Peripheral Pin (#SS/PCINT8)PB0 (General)
11(SCK/PCINT9)PB1I/OMultiplexed I/O & Peripheral Pin (SCK/PCINT9)PB1 (SPI)
12(MOSI/PCINT10)PB2I/OMultiplexed I/O & Peripheral Pin (MOSI/PCINT10)PB2 (SPI)
13(MISO/PCINT11)PB3I/OMultiplexed I/O & Peripheral Pin (MISO/PCINT11)PB3 (SPI)
14(OC0A/PCINT12)PB4I/OMultiplexed I/O & Peripheral Pin (OC0A/PCINT12)PB4 (PWM)
15(OC1A/PCINT13)PB5I/OMultiplexed I/O & Peripheral Pin (OC1A/PCINT13)PB5 (PWM)
16(OC1B/PCINT14)PB6I/OMultiplexed I/O & Peripheral Pin (OC1B/PCINT14)PB6 (PWM)
17(OC2A/PCINT15)PB7I/OMultiplexed I/O & Peripheral Pin (OC2A/PCINT15)PB7 (PWM)
18(T1/SEG24)PG3I/OMultiplexed I/O & Peripheral Pin (T1/SEG24)PG3 (General)
19(T0/SEG23)PG4I/OMultiplexed I/O & Peripheral Pin (T0/SEG23)PG4 (General)
20#RESET/PG5ISystem Enable & Hardware Reset (#RESET/PG5)
21VCCPowerPower Supply Input (VCC — 1.8V ~ 5.5V VCC)
22GNDGNDGround Reference Pin (GND)
23(TOSC2)XTAL2I/OMultiplexed I/O & Peripheral Pin (TOSC2)XTAL2 (RTC/CLK)
24(TOSC1)XTAL1I/OMultiplexed I/O & Peripheral Pin (TOSC1)XTAL1 (RTC/CLK)
25(ICP1/SEG22)PD0I/OMultiplexed I/O & Peripheral Pin (ICP1/SEG22)PD0 (General)
26(INT0/SEG21)PD1I/OMultiplexed I/O & Peripheral Pin (INT0/SEG21)PD1 (General)
27(SEG20)PD2I/OMultiplexed I/O & Peripheral Pin (SEG20)PD2 (General)
28(SEG19)PD3I/OMultiplexed I/O & Peripheral Pin (SEG19)PD3 (General)
29(SEG18)PD4I/OMultiplexed I/O & Peripheral Pin (SEG18)PD4 (General)
30(SEG17)PD5I/OMultiplexed I/O & Peripheral Pin (SEG17)PD5 (General)
31(SEG16)PD6I/OMultiplexed I/O & Peripheral Pin (SEG16)PD6 (General)
32(SEG15)PD7I/OMultiplexed I/O & Peripheral Pin (SEG15)PD7 (General)
33PG0(SEG14)I/OMultiplexed I/O & Peripheral Pin PG0(SEG14) (General)
34PG1(SEG13)I/OMultiplexed I/O & Peripheral Pin PG1(SEG13) (General)
35PC0(SEG12)I/OMultiplexed I/O & Peripheral Pin PC0(SEG12) (General)
36PC1(SEG11)I/OMultiplexed I/O & Peripheral Pin PC1(SEG11) (General)
37PC2(SEG10)I/OMultiplexed I/O & Peripheral Pin PC2(SEG10) (General)
38PC3(SEG9)I/OMultiplexed I/O & Peripheral Pin PC3(SEG9) (General)
39PC4(SEG8)I/OMultiplexed I/O & Peripheral Pin PC4(SEG8) (General)
40PC5(SEG7)I/OMultiplexed I/O & Peripheral Pin PC5(SEG7) (General)
41PC6(SEG6)I/OMultiplexed I/O & Peripheral Pin PC6(SEG6) (General)
42PC7(SEG5)I/OMultiplexed I/O & Peripheral Pin PC7(SEG5) (General)
43PG2(SEG4)I/OMultiplexed I/O & Peripheral Pin PG2(SEG4) (General)
44PA7(SEG3)I/OMultiplexed I/O & Peripheral Pin PA7(SEG3) (General)
45PA6(SEG2)I/OMultiplexed I/O & Peripheral Pin PA6(SEG2) (General)
46PA5(SEG1)I/OMultiplexed I/O & Peripheral Pin PA5(SEG1) (General)
47PA4(SEG0)I/OMultiplexed I/O & Peripheral Pin PA4(SEG0) (General)
48PA3(COM3)I/OMultiplexed I/O & Peripheral Pin PA3(COM3) (General)
49PA2(COM2)I/OMultiplexed I/O & Peripheral Pin PA2(COM2) (General)
50PA1(COM1)I/OMultiplexed I/O & Peripheral Pin PA1(COM1) (General)
51PA0(COM0)I/OMultiplexed I/O & Peripheral Pin PA0(COM0) (General)
52VCCPowerPower Supply Input (VCC — 1.8V ~ 5.5V VCC)
53GNDGNDGround Reference Pin (GND)
54PF7(ADC7/TDI)I/OMultiplexed I/O & Peripheral Pin PF7(ADC7/TDI) (ADC)
55PF6(ADC6/TDO)I/OMultiplexed I/O & Peripheral Pin PF6(ADC6/TDO) (ADC)
56PF5(ADC5/TMS)I/OMultiplexed I/O & Peripheral Pin PF5(ADC5/TMS) (ADC)
57PF4(ADC4/TCK)I/OMultiplexed I/O & Peripheral Pin PF4(ADC4/TCK) (ADC)
58PF3(ADC3)I/OMultiplexed I/O & Peripheral Pin PF3(ADC3) (ADC)
59PF2(ADC2)I/OMultiplexed I/O & Peripheral Pin PF2(ADC2) (ADC)
60PF1(ADC1)I/OMultiplexed I/O & Peripheral Pin PF1(ADC1) (ADC)
61PF0(ADC0)I/OMultiplexed I/O & Peripheral Pin PF0(ADC0) (ADC)
62AREFI/OMultiplexed I/O & Peripheral Pin AREF (ADC)
63GNDGNDGround Reference Pin (GND)
64AVCCPowerPower Supply Input (AVCC — 1.8V ~ 5.5V VCC)
PIN 1 LCDCAP
I/O
Multiplexed I/O & Peripheral Pin LCDCAP (General)
Design note: Signal terminal LCDCAP (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: LCDCAP. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
1. Realistic 3D PackageREPRESENTATIVE
ATMEGA329PV-10AU (TQFP-64(14x14)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ATMEGA329PV-10AU (TQFP-64(14x14)) - 2. Standard Pinout (Top View)
True package pinout (64 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ATMEGA329PV-10AU (TQFP-64(14x14)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ATMEGA329PV-10AU (TQFP-64(14x14)) - 4. Package Dimensions (D×E×A)
TQFP-64(14x14) · 14.00×14.00mm · Pitch 0.80mmExpand ›
5. Recommended Land PatternLAND PATTERN
ATMEGA329PV-10AU (TQFP-64(14x14)) - 5. Recommended Land Pattern
IPC-7351B Footprint (64 Pads)Expand ›
6. Application SchematicSCHEMATIC
ATMEGA329PV-10AU (TQFP-64(14x14)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)
Showing 1–9 of 9 uncropped original figures for ATMEGA329PV
P19 · p19_fig01EXACT PACKAGE
ATMEGA329PV-10AU (TQFP-64(14x14)) — ATmega329P/3290P
ATmega329P/3290P
P1 · p01_fig01393×173px
ATMEGA329PV-10AU (TQFP-64(14x14)) — 8-bit Atmel Microcontroller with 32KBytes In-System Programmable Flash
8-bit Atmel Microcontroller with 32KBytes In-System Programmable Flash
P1 · p01_fig01P1
ATMEGA329PV-10AU (TQFP-64(14x14)) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P3 · p03_fig011946×1819px
ATMEGA329PV-10AU (TQFP-64(14x14)) — Figure 1-2. TQFP / Pinout ATmega3290P
Figure 1-2. TQFP / Pinout ATmega3290P
P3 · p03_fig01P3
ATMEGA329PV-10AU (TQFP-64(14x14)) — Datasheet Page 3 (p03_fig01)
Datasheet Page 3 (p03_fig01)
P19 · p19_fig01P19
ATMEGA329PV-10AU (TQFP-64(14x14)) — Datasheet Page 19 (p19_fig01)
Datasheet Page 19 (p19_fig01)
P20 · p20_fig012128×2383px
ATMEGA329PV-10AU (TQFP-64(14x14)) — 20
20
P2 · p02_fig01All Packages in PDF
ATMEGA329PV-10AU (TQFP-64(14x14)) — Figure 1-1. MLF/ Pinout ATmega329P
Figure 1-1. MLF/ Pinout ATmega329P
P21 · p21_fig01All Packages in PDF
ATMEGA329PV-10AU (TQFP-64(14x14)) — 21
21

Technical Specifications & Part Details (ATMEGA329PV-10AU)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:ATMEGA329PV-10AU (TQFP-64(14x14)) is a 64-pin embedded microcontroller unit (mcu) featuring a 14.00 × 14.00 × 1.20 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.8V ~ 5.5V supply operation across -40°C to 85°C with integrated UART, SPI, I2C, ADC, PWM, JTAG / SWD, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
20MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
64 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
14.00 × 14.00 × 1.20 mm (A1=0.10 mm)
Package family: TQFP (TQFP-64(14x14))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.80 mm (31.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, PWM, JTAG / SWD, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol64 auto-grouped pins
OK
IPC-7351B Land Pattern64 pads · Pitch 0.80mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TQFP-64(14x14))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
14.00 × 14.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.20mm · e=0.80mm
Pad Size (W × L)Level B
0.45 × 1.90 mm
Pins / Total PadsTopology
64P / 64Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TQFP-64(14x14)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — ATMEGA329PV-10AU (TQFP-64(14x14))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ATMEGA329PV-10AU (TQFP-64(14x14))?

Manufactured by MICROCHIP, the ATMEGA329PV-10AU is housed in a TQFP-64(14x14) package with 64 pins and a 0.80 mm lead pitch. Key pins include: 1 (LCDCAP: Multiplexed I/O & Peripheral Pin LCDCAP (General)), 2 ((RXD/PCINT0)PE0: Multiplexed I/O & Peripheral Pin (RXD/PCINT0)PE0 (UART)), 3 ((TXD/PCINT1)PE1: Multiplexed I/O & Peripheral Pin (TXD/PCINT1)PE1 (UART)), 4 ((XCK/AIN0/PCINT2)PE2: Multiplexed I/O & Peripheral Pin (XCK/AIN0/PCINT2)PE2 (ADC)), 5 ((AIN1/PCINT3)PE3: Multiplexed I/O & Peripheral Pin (AIN1/PCINT3)PE3 (ADC)), 6 ((USCK/SCL/PCINT4)PE4: Multiplexed I/O & Peripheral Pin (USCK/SCL/PCINT4)PE4 (I2C)).

What are the IPC-7351B PCB Footprint dimensions for ATMEGA329PV-10AU?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATMEGA329PV-10AU (TQFP-64(14x14)) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.80 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATMEGA329PV-10AU?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATMEGA329PV-10AU (MICROCHIP, TQFP-64(14x14)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & ATMEGA329PV Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1LCDCAPDigital_IOSignal terminal LCDCAP (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: LCDCAP. Supported peripheral buses: General.
2(RXD/PCINT0)PE0Digital_IOSignal terminal (RXD/PCINT0)PE0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (RXD/PCINT0)PE0. Supported peripheral buses: UART.
3(TXD/PCINT1)PE1Digital_IOSignal terminal (TXD/PCINT1)PE1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (TXD/PCINT1)PE1. Supported peripheral buses: UART.
4(XCK/AIN0/PCINT2)PE2AnalogSignal terminal (XCK/AIN0/PCINT2)PE2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (XCK/AIN0/PCINT2)PE2. Supported peripheral buses: ADC.
5(AIN1/PCINT3)PE3AnalogSignal terminal (AIN1/PCINT3)PE3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (AIN1/PCINT3)PE3. Supported peripheral buses: ADC.
6(USCK/SCL/PCINT4)PE4Digital_IOSignal terminal (USCK/SCL/PCINT4)PE4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (USCK/SCL/PCINT4)PE4. Supported peripheral buses: I2C.
7(DI/SDA/PCINT5)PE5Digital_IOSignal terminal (DI/SDA/PCINT5)PE5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (DI/SDA/PCINT5)PE5. Supported peripheral buses: I2C.
8(DO/PCINT6)PE6Digital_IOSignal terminal (DO/PCINT6)PE6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (DO/PCINT6)PE6. Supported peripheral buses: General.
9(CLKO/PCINT7)PE7Digital_IOSignal terminal (CLKO/PCINT7)PE7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (CLKO/PCINT7)PE7. Supported peripheral buses: General.
10(#SS/PCINT8)PB0Digital_IOSignal terminal (#SS/PCINT8)PB0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (#SS/PCINT8)PB0. Supported peripheral buses: General.
11(SCK/PCINT9)PB1Digital_IOSignal terminal (SCK/PCINT9)PB1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (SCK/PCINT9)PB1. Supported peripheral buses: SPI.
12(MOSI/PCINT10)PB2Digital_IOSignal terminal (MOSI/PCINT10)PB2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (MOSI/PCINT10)PB2. Supported peripheral buses: SPI.
13(MISO/PCINT11)PB3Digital_IOSignal terminal (MISO/PCINT11)PB3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (MISO/PCINT11)PB3. Supported peripheral buses: SPI.
14(OC0A/PCINT12)PB4Digital_IOSignal terminal (OC0A/PCINT12)PB4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (OC0A/PCINT12)PB4. Supported peripheral buses: PWM.
15(OC1A/PCINT13)PB5Digital_IOSignal terminal (OC1A/PCINT13)PB5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (OC1A/PCINT13)PB5. Supported peripheral buses: PWM.
16(OC1B/PCINT14)PB6Digital_IOSignal terminal (OC1B/PCINT14)PB6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (OC1B/PCINT14)PB6. Supported peripheral buses: PWM.
17(OC2A/PCINT15)PB7Digital_IOSignal terminal (OC2A/PCINT15)PB7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (OC2A/PCINT15)PB7. Supported peripheral buses: PWM.
18(T1/SEG24)PG3Digital_IOSignal terminal (T1/SEG24)PG3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (T1/SEG24)PG3. Supported peripheral buses: General.
19(T0/SEG23)PG4Digital_IOSignal terminal (T0/SEG23)PG4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (T0/SEG23)PG4. Supported peripheral buses: General.
20#RESET/PG5Digital_IOActive-low hardware reset terminal (#RESET/PG5): pulling this pin Low resets the processor core and peripherals.
21VCCPower_InPrimary positive power supply input (VCC) operating in the 1.8V ~ 5.5V VCC domain (Max rating: 6.0V).
22GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
23(TOSC2)XTAL2Digital_IOSignal terminal (TOSC2)XTAL2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (TOSC2)XTAL2. Supported peripheral buses: RTC/CLK.
24(TOSC1)XTAL1Digital_IOSignal terminal (TOSC1)XTAL1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (TOSC1)XTAL1. Supported peripheral buses: RTC/CLK.
25(ICP1/SEG22)PD0Digital_IOSignal terminal (ICP1/SEG22)PD0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (ICP1/SEG22)PD0. Supported peripheral buses: General.
26(INT0/SEG21)PD1Digital_IOSignal terminal (INT0/SEG21)PD1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (INT0/SEG21)PD1. Supported peripheral buses: General.
27(SEG20)PD2Digital_IOSignal terminal (SEG20)PD2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (SEG20)PD2. Supported peripheral buses: General.
28(SEG19)PD3Digital_IOSignal terminal (SEG19)PD3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (SEG19)PD3. Supported peripheral buses: General.
29(SEG18)PD4Digital_IOSignal terminal (SEG18)PD4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (SEG18)PD4. Supported peripheral buses: General.
30(SEG17)PD5Digital_IOSignal terminal (SEG17)PD5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (SEG17)PD5. Supported peripheral buses: General.
31(SEG16)PD6Digital_IOSignal terminal (SEG16)PD6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (SEG16)PD6. Supported peripheral buses: General.
32(SEG15)PD7Digital_IOSignal terminal (SEG15)PD7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (SEG15)PD7. Supported peripheral buses: General.
33PG0(SEG14)Digital_IOSignal terminal PG0(SEG14) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG0(SEG14). Supported peripheral buses: General.
34PG1(SEG13)Digital_IOSignal terminal PG1(SEG13) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG1(SEG13). Supported peripheral buses: General.
35PC0(SEG12)Digital_IOSignal terminal PC0(SEG12) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC0(SEG12). Supported peripheral buses: General.
36PC1(SEG11)Digital_IOSignal terminal PC1(SEG11) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC1(SEG11). Supported peripheral buses: General.
37PC2(SEG10)Digital_IOSignal terminal PC2(SEG10) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC2(SEG10). Supported peripheral buses: General.
38PC3(SEG9)Digital_IOSignal terminal PC3(SEG9) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC3(SEG9). Supported peripheral buses: General.
39PC4(SEG8)Digital_IOSignal terminal PC4(SEG8) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC4(SEG8). Supported peripheral buses: General.
40PC5(SEG7)Digital_IOSignal terminal PC5(SEG7) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC5(SEG7). Supported peripheral buses: General.
41PC6(SEG6)Digital_IOSignal terminal PC6(SEG6) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC6(SEG6). Supported peripheral buses: General.
42PC7(SEG5)Digital_IOSignal terminal PC7(SEG5) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC7(SEG5). Supported peripheral buses: General.
43PG2(SEG4)Digital_IOSignal terminal PG2(SEG4) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG2(SEG4). Supported peripheral buses: General.
44PA7(SEG3)Digital_IOSignal terminal PA7(SEG3) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA7(SEG3). Supported peripheral buses: General.
45PA6(SEG2)Digital_IOSignal terminal PA6(SEG2) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA6(SEG2). Supported peripheral buses: General.
46PA5(SEG1)Digital_IOSignal terminal PA5(SEG1) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA5(SEG1). Supported peripheral buses: General.
47PA4(SEG0)Digital_IOSignal terminal PA4(SEG0) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA4(SEG0). Supported peripheral buses: General.
48PA3(COM3)Digital_IOSignal terminal PA3(COM3) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA3(COM3). Supported peripheral buses: General.
49PA2(COM2)Digital_IOSignal terminal PA2(COM2) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA2(COM2). Supported peripheral buses: General.
50PA1(COM1)Digital_IOSignal terminal PA1(COM1) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA1(COM1). Supported peripheral buses: General.
51PA0(COM0)Digital_IOSignal terminal PA0(COM0) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA0(COM0). Supported peripheral buses: General.
52VCCPower_InPrimary positive power supply input (VCC) operating in the 1.8V ~ 5.5V VCC domain (Max rating: 6.0V).
53GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
54PF7(ADC7/TDI)AnalogSignal terminal PF7(ADC7/TDI) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF7(ADC7/TDI). Supported peripheral buses: ADC.
55PF6(ADC6/TDO)AnalogSignal terminal PF6(ADC6/TDO) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF6(ADC6/TDO). Supported peripheral buses: ADC.
56PF5(ADC5/TMS)AnalogSignal terminal PF5(ADC5/TMS) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF5(ADC5/TMS). Supported peripheral buses: ADC.
57PF4(ADC4/TCK)AnalogSignal terminal PF4(ADC4/TCK) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF4(ADC4/TCK). Supported peripheral buses: ADC.
58PF3(ADC3)AnalogSignal terminal PF3(ADC3) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF3(ADC3). Supported peripheral buses: ADC.
59PF2(ADC2)AnalogSignal terminal PF2(ADC2) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF2(ADC2). Supported peripheral buses: ADC.
60PF1(ADC1)AnalogSignal terminal PF1(ADC1) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF1(ADC1). Supported peripheral buses: ADC.
61PF0(ADC0)AnalogSignal terminal PF0(ADC0) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF0(ADC0). Supported peripheral buses: ADC.
62AREFDigital_IOSignal terminal AREF (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: AREF. Supported peripheral buses: ADC.
63GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
64AVCCPower_InPrimary positive power supply input (AVCC) operating in the 1.8V ~ 5.5V VCC domain (Max rating: 6.0V).
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