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PIC18F66K40T-I/PT (TQFP-64(10x10)) — Symbol, Footprint IPC-7351B & 3D STEP Model

PIC18F66K40T-I/PT

MICROCHIPID: C219257TQFP-64(10x10) · 64 Pins · Pitch 0.50mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · PIC18F66K40T-I/PT (TQFP-64(10x10))1IOCGN5=12RE03RG04RG15RG26RG37VPP/#MCLR/RG8RG49Vss10Vdd11RF712RF613RF514RF415RF316RF217RF118RF019RG720RG621RA322RA223RA124RA025RH126RH027RA528RA429RC130RC031RC632RC764RE263RE362RE461RE560RE659RE758RD057RH256RH355RD154RD253RD352RD451RD550RD649RD748RB047RB146RB245RB344RB443RB542RB641Vss40RA639RA738Vdd37RB736RC535RC434RC333RC2Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364E=10.00mm · Pitch e=0.50mmD=10.00mm-9-7-5-3-11357997531-1-3-5-7-9mm
3. 3D CAD MODEL
Package Body: 10.00mm × 10.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1IOCGN5=1I/OMultiplexed I/O & Peripheral Pin IOCGN5=1 (General)
2RE0I/OMultiplexed I/O & Peripheral Pin RE0 (General)
3RG0I/OMultiplexed I/O & Peripheral Pin RG0 (General)
4RG1I/OMultiplexed I/O & Peripheral Pin RG1 (General)
5RG2I/OMultiplexed I/O & Peripheral Pin RG2 (General)
6RG3I/OMultiplexed I/O & Peripheral Pin RG3 (General)
7VPP/#MCLR/RG5I/OMultiplexed I/O & Peripheral Pin VPP/#MCLR/RG5 (General)
8RG4I/OMultiplexed I/O & Peripheral Pin RG4 (General)
9VssGNDGround Reference Pin (Vss)
10VddPowerPower Supply Input (Vdd — 1.8V to 3.6V)
11RF7I/OMultiplexed I/O & Peripheral Pin RF7 (General)
12RF6I/OMultiplexed I/O & Peripheral Pin RF6 (General)
13RF5I/OMultiplexed I/O & Peripheral Pin RF5 (General)
14RF4I/OMultiplexed I/O & Peripheral Pin RF4 (General)
15RF3I/OMultiplexed I/O & Peripheral Pin RF3 (General)
16RF2I/OMultiplexed I/O & Peripheral Pin RF2 (General)
17RF1I/OMultiplexed I/O & Peripheral Pin RF1 (General)
18RF0I/OMultiplexed I/O & Peripheral Pin RF0 (General)
19RG7I/OMultiplexed I/O & Peripheral Pin RG7 (General)
20RG6I/OMultiplexed I/O & Peripheral Pin RG6 (General)
21RA3I/OMultiplexed I/O & Peripheral Pin RA3 (General)
22RA2I/OMultiplexed I/O & Peripheral Pin RA2 (General)
23RA1I/OMultiplexed I/O & Peripheral Pin RA1 (General)
24RA0I/OMultiplexed I/O & Peripheral Pin RA0 (General)
25RH1I/OMultiplexed I/O & Peripheral Pin RH1 (General)
26RH0I/OMultiplexed I/O & Peripheral Pin RH0 (General)
27RA5I/OMultiplexed I/O & Peripheral Pin RA5 (General)
28RA4I/OMultiplexed I/O & Peripheral Pin RA4 (General)
29RC1I/OMultiplexed I/O & Peripheral Pin RC1 (General)
30RC0I/OMultiplexed I/O & Peripheral Pin RC0 (General)
31RC6I/OMultiplexed I/O & Peripheral Pin RC6 (General)
32RC7I/OMultiplexed I/O & Peripheral Pin RC7 (General)
33RC2I/OMultiplexed I/O & Peripheral Pin RC2 (General)
34RC3I/OMultiplexed I/O & Peripheral Pin RC3 (General)
35RC4I/OMultiplexed I/O & Peripheral Pin RC4 (General)
36RC5I/OMultiplexed I/O & Peripheral Pin RC5 (General)
37RB7I/OMultiplexed I/O & Peripheral Pin RB7 (General)
38VddPowerPower Supply Input (Vdd — 1.8V to 3.6V)
39RA7I/OMultiplexed I/O & Peripheral Pin RA7 (General)
40RA6I/OMultiplexed I/O & Peripheral Pin RA6 (General)
41VssGNDGround Reference Pin (Vss)
42RB6I/OMultiplexed I/O & Peripheral Pin RB6 (General)
43RB5I/OMultiplexed I/O & Peripheral Pin RB5 (General)
44RB4I/OMultiplexed I/O & Peripheral Pin RB4 (General)
45RB3I/OMultiplexed I/O & Peripheral Pin RB3 (General)
46RB2I/OMultiplexed I/O & Peripheral Pin RB2 (General)
47RB1I/OMultiplexed I/O & Peripheral Pin RB1 (General)
48RB0I/OMultiplexed I/O & Peripheral Pin RB0 (General)
49RD7I/OMultiplexed I/O & Peripheral Pin RD7 (General)
50RD6I/OMultiplexed I/O & Peripheral Pin RD6 (General)
51RD5I/OMultiplexed I/O & Peripheral Pin RD5 (General)
52RD4I/OMultiplexed I/O & Peripheral Pin RD4 (General)
53RD3I/OMultiplexed I/O & Peripheral Pin RD3 (General)
54RD2I/OMultiplexed I/O & Peripheral Pin RD2 (General)
55RD1I/OMultiplexed I/O & Peripheral Pin RD1 (General)
56RH3I/OMultiplexed I/O & Peripheral Pin RH3 (General)
57RH2I/OMultiplexed I/O & Peripheral Pin RH2 (General)
58RD0I/OMultiplexed I/O & Peripheral Pin RD0 (General)
59RE7I/OMultiplexed I/O & Peripheral Pin RE7 (General)
60RE6I/OMultiplexed I/O & Peripheral Pin RE6 (General)
61RE5I/OMultiplexed I/O & Peripheral Pin RE5 (General)
62RE4I/OMultiplexed I/O & Peripheral Pin RE4 (General)
63RE3I/OMultiplexed I/O & Peripheral Pin RE3 (General)
64RE2I/OMultiplexed I/O & Peripheral Pin RE2 (General)
PIN 1 IOCGN5=1
I/O
Multiplexed I/O & Peripheral Pin IOCGN5=1 (General)
Design note: Signal terminal IOCGN5=1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: IOCGN5=1. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: PIC18F66K40T-I/PT (MICROCHIP · TQFP-64(10x10))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
PIC18F66K40T-I/PT (TQFP-64(10x10)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
PIC18F66K40T-I/PT (TQFP-64(10x10)) - 2. Standard Pinout (Top View)
True package pinout (64 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
PIC18F66K40T-I/PT (TQFP-64(10x10)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
PIC18F66K40T-I/PT (TQFP-64(10x10)) - 4. Package Dimensions (D×E×A)
TQFP-64(10x10) · 10.00×10.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
PIC18F66K40T-I/PT (TQFP-64(10x10)) - 5. Recommended Land Pattern
IPC-7351B Footprint (64 Pads)Expand ›
6. Application SchematicSCHEMATIC
PIC18F66K40T-I/PT (TQFP-64(10x10)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)
Showing 1–12 of 12 uncropped original figures for PIC18F66K40T
P1 · p01_fig01EXACT PACKAGE
PIC18F66K40T-I/PT (TQFP-64(10x10)) — 64-Pin, Low-Power, High-Performance Microcontrollers
64-Pin, Low-Power, High-Performance Microcontrollers
P27 · p27_fig01585×438px
PIC18F66K40T-I/PT (TQFP-64(10x10)) — Figure 2-2. Example of MCLR Pin Connections
Figure 2-2. Example of MCLR Pin Connections
P77 · p77_fig011778×712px
PIC18F66K40T-I/PT (TQFP-64(10x10)) — Figure 6-3. WAKE-UP FROM SLEEP THROUGH INTERRUPT
Figure 6-3. WAKE-UP FROM SLEEP THROUGH INTERRUPT
P314 · p314_fig011775×1560px
PIC18F66K40T-I/PT (TQFP-64(10x10)) — 16.4 Enabling the Module
16.4 Enabling the Module
P515 · p515_fig011469×1318px
PIC18F66K40T-I/PT (TQFP-64(10x10)) — Figure 28-1. MSSP Block Diagram (SPI mode)
Figure 28-1. MSSP Block Diagram (SPI mode)
P517 · p517_fig011705×878px
PIC18F66K40T-I/PT (TQFP-64(10x10)) — Figure 28-3. SPI Master/Slave Connection
Figure 28-3. SPI Master/Slave Connection
P517 · p517_fig01P517
PIC18F66K40T-I/PT (TQFP-64(10x10)) — Datasheet Page 517 (p517_fig01)
Datasheet Page 517 (p517_fig01)
P860 · p860_fig011914×1604px
PIC18F66K40T-I/PT (TQFP-64(10x10)) — PIC18(L)F65/66K40
PIC18(L)F65/66K40
P860 · p860_fig01P860
PIC18F66K40T-I/PT (TQFP-64(10x10)) — Datasheet Page 860 (p860_fig01)
Datasheet Page 860 (p860_fig01)
P863 · p863_fig011137×1320px
PIC18F66K40T-I/PT (TQFP-64(10x10)) — 9.00
9.00
P863 · p863_fig01P863
PIC18F66K40T-I/PT (TQFP-64(10x10)) — Datasheet Page 863 (p863_fig01)
Datasheet Page 863 (p863_fig01)
P866 · p866_fig011053×854px
PIC18F66K40T-I/PT (TQFP-64(10x10)) — RECOMMENDED LAND PATTERN
RECOMMENDED LAND PATTERN

Technical Specifications & Part Details (PIC18F66K40T-I/PT)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:PIC18F66K40T-I/PT (TQFP-64(10x10)) is a 64-pin standard electronic & interconnect component featuring a 10.00 × 10.00 × 1.20 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.8V to 3.6V supply operation across -40°C to 85°C with integrated UART, SPI, I2C, ADC, DAC, PWM interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
64 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
10.00 × 10.00 × 1.20 mm (A1=0.10 mm)
Package family: TQFP (TQFP-64(10x10))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, DAC, PWM
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol64 auto-grouped pins
OK
IPC-7351B Land Pattern64 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TQFP-64(10x10))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.20mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.25 mm
Pins / Total PadsTopology
64P / 64Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TQFP-64(10x10)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC18F66K40T-I/PT (TQFP-64(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC18F66K40T-I/PT (TQFP-64(10x10))?

Manufactured by MICROCHIP, the PIC18F66K40T-I/PT is housed in a TQFP-64(10x10) package with 64 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.8V to 3.6V. Key pins include: 1 (IOCGN5=1: Multiplexed I/O & Peripheral Pin IOCGN5=1 (General)), 2 (RE0: Multiplexed I/O & Peripheral Pin RE0 (General)), 3 (RG0: Multiplexed I/O & Peripheral Pin RG0 (General)), 4 (RG1: Multiplexed I/O & Peripheral Pin RG1 (General)), 5 (RG2: Multiplexed I/O & Peripheral Pin RG2 (General)), 6 (RG3: Multiplexed I/O & Peripheral Pin RG3 (General)).

What are the IPC-7351B PCB Footprint dimensions for PIC18F66K40T-I/PT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC18F66K40T-I/PT (TQFP-64(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.50 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC18F66K40T-I/PT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC18F66K40T-I/PT (MICROCHIP, TQFP-64(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & PIC18F66K40T Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1IOCGN5=1Digital_IOSignal terminal IOCGN5=1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: IOCGN5=1. Supported peripheral buses: General.
2RE0Digital_IOSignal terminal RE0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE0. Supported peripheral buses: General.
3RG0Digital_IOSignal terminal RG0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RG0. Supported peripheral buses: General.
4RG1Digital_IOSignal terminal RG1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RG1. Supported peripheral buses: General.
5RG2Digital_IOSignal terminal RG2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RG2. Supported peripheral buses: General.
6RG3Digital_IOSignal terminal RG3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RG3. Supported peripheral buses: General.
7VPP/#MCLR/RG5Digital_IOSignal terminal VPP/#MCLR/RG5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: VPP/#MCLR/RG5. Supported peripheral buses: General.
8RG4Digital_IOSignal terminal RG4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RG4. Supported peripheral buses: General.
9VssGND0V electrical ground return terminal (Vss) for internal core logic, I/O drivers, and analog sub-blocks.
10VddPower_InPrimary positive power supply input (Vdd) operating in the 1.8V to 3.6V domain (Max rating: 3.6V).
11RF7RF_50OhmSignal terminal RF7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RF7. Supported peripheral buses: General.
12RF6RF_50OhmSignal terminal RF6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RF6. Supported peripheral buses: General.
13RF5RF_50OhmSignal terminal RF5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RF5. Supported peripheral buses: General.
14RF4RF_50OhmSignal terminal RF4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RF4. Supported peripheral buses: General.
15RF3RF_50OhmSignal terminal RF3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RF3. Supported peripheral buses: General.
16RF2RF_50OhmSignal terminal RF2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RF2. Supported peripheral buses: General.
17RF1RF_50OhmSignal terminal RF1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RF1. Supported peripheral buses: General.
18RF0RF_50OhmSignal terminal RF0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RF0. Supported peripheral buses: General.
19RG7Digital_IOSignal terminal RG7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RG7. Supported peripheral buses: General.
20RG6Digital_IOSignal terminal RG6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RG6. Supported peripheral buses: General.
21RA3Digital_IOSignal terminal RA3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA3. Supported peripheral buses: General.
22RA2Digital_IOSignal terminal RA2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA2. Supported peripheral buses: General.
23RA1Digital_IOSignal terminal RA1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA1. Supported peripheral buses: General.
24RA0Digital_IOSignal terminal RA0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA0. Supported peripheral buses: General.
25RH1Digital_IOSignal terminal RH1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RH1. Supported peripheral buses: General.
26RH0Digital_IOSignal terminal RH0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RH0. Supported peripheral buses: General.
27RA5Digital_IOSignal terminal RA5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA5. Supported peripheral buses: General.
28RA4Digital_IOSignal terminal RA4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA4. Supported peripheral buses: General.
29RC1Digital_IOSignal terminal RC1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC1. Supported peripheral buses: General.
30RC0Digital_IOSignal terminal RC0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC0. Supported peripheral buses: General.
31RC6Digital_IOSignal terminal RC6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC6. Supported peripheral buses: General.
32RC7Digital_IOSignal terminal RC7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC7. Supported peripheral buses: General.
33RC2Digital_IOSignal terminal RC2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC2. Supported peripheral buses: General.
34RC3Digital_IOSignal terminal RC3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC3. Supported peripheral buses: General.
35RC4Digital_IOSignal terminal RC4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC4. Supported peripheral buses: General.
36RC5Digital_IOSignal terminal RC5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RC5. Supported peripheral buses: General.
37RB7Digital_IOSignal terminal RB7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB7. Supported peripheral buses: General.
38VddPower_InPrimary positive power supply input (Vdd) operating in the 1.8V to 3.6V domain (Max rating: 3.6V).
39RA7Digital_IOSignal terminal RA7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA7. Supported peripheral buses: General.
40RA6Digital_IOSignal terminal RA6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RA6. Supported peripheral buses: General.
41VssGND0V electrical ground return terminal (Vss) for internal core logic, I/O drivers, and analog sub-blocks.
42RB6Digital_IOSignal terminal RB6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB6. Supported peripheral buses: General.
43RB5Digital_IOSignal terminal RB5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB5. Supported peripheral buses: General.
44RB4Digital_IOSignal terminal RB4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB4. Supported peripheral buses: General.
45RB3Digital_IOSignal terminal RB3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB3. Supported peripheral buses: General.
46RB2Digital_IOSignal terminal RB2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB2. Supported peripheral buses: General.
47RB1Digital_IOSignal terminal RB1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB1. Supported peripheral buses: General.
48RB0Digital_IOSignal terminal RB0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RB0. Supported peripheral buses: General.
49RD7Digital_IOSignal terminal RD7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD7. Supported peripheral buses: General.
50RD6Digital_IOSignal terminal RD6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD6. Supported peripheral buses: General.
51RD5Digital_IOSignal terminal RD5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD5. Supported peripheral buses: General.
52RD4Digital_IOSignal terminal RD4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD4. Supported peripheral buses: General.
53RD3Digital_IOSignal terminal RD3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD3. Supported peripheral buses: General.
54RD2Digital_IOSignal terminal RD2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD2. Supported peripheral buses: General.
55RD1Digital_IOSignal terminal RD1 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD1. Supported peripheral buses: General.
56RH3Digital_IOSignal terminal RH3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RH3. Supported peripheral buses: General.
57RH2Digital_IOSignal terminal RH2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RH2. Supported peripheral buses: General.
58RD0Digital_IOSignal terminal RD0 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RD0. Supported peripheral buses: General.
59RE7Digital_IOSignal terminal RE7 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE7. Supported peripheral buses: General.
60RE6Digital_IOSignal terminal RE6 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE6. Supported peripheral buses: General.
61RE5Digital_IOSignal terminal RE5 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE5. Supported peripheral buses: General.
62RE4Digital_IOSignal terminal RE4 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE4. Supported peripheral buses: General.
63RE3Digital_IOSignal terminal RE3 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE3. Supported peripheral buses: General.
64RE2Digital_IOSignal terminal RE2 (I/O, 1.8V to 3.6V domain). Multiplexed alternate functions: RE2. Supported peripheral buses: General.
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