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PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — Symbol, Footprint IPC-7351B & 3D STEP Model

PIC24FJ128GA108-I/PT

MICROCHIPTQFP-80(12x12) · 80 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · PIC24FJ128GA108-I/PT (TQFP-80(12x12))1ST2I2C3I2C4ST5ST6ST7ST8ST9ST10ST11VSS12VDD13ST14—15ST16ST17ST18ST19ST20ST21ST22ST23ANA24ANA25—26—27ST28ST29ST30ST31VSS32VDD33ST34ST35ST36ST37ST38ST39ST40ST80ST79ST78ST77ST76ST75ST74ST73ST72ST71ST70—69ST68ST67ST66ST65ST64ST63ST62ST61ST60ST59ANA58ST57ST56ST55ST54—53I2C52I2C51—50ST49ST48—47I2C46I2C45ST44ST43ST42ST41STGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.855.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980E=12.00mm · Pitch e=0.50mmD=12.00mm-11-9-7-5-3-113579111197531-1-3-5-7-9-11mm
3. 3D CAD MODEL
Package Body: 12.00mm × 12.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (80/80)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1STI/OMultiplexed I/O & Peripheral Pin ST (General)
2I2CI/OMultiplexed I/O & Peripheral Pin I2C (I2C)
3I2CI/OMultiplexed I/O & Peripheral Pin I2C (I2C)
4STI/OMultiplexed I/O & Peripheral Pin ST (General)
5STI/OMultiplexed I/O & Peripheral Pin ST (General)
6STI/OMultiplexed I/O & Peripheral Pin ST (General)
7STI/OMultiplexed I/O & Peripheral Pin ST (General)
8STI/OMultiplexed I/O & Peripheral Pin ST (General)
9STI/OMultiplexed I/O & Peripheral Pin ST (General)
10STI/OMultiplexed I/O & Peripheral Pin ST (General)
11VSSGNDGround Reference Pin (VSS)
12VDDPowerPower Supply Input (VDD — 2.0V to 3.6V)
13STI/OMultiplexed I/O & Peripheral Pin ST (General)
14—I/OMultiplexed I/O & Peripheral Pin — (General)
15STI/OMultiplexed I/O & Peripheral Pin ST (General)
16STI/OMultiplexed I/O & Peripheral Pin ST (General)
17STI/OMultiplexed I/O & Peripheral Pin ST (General)
18STI/OMultiplexed I/O & Peripheral Pin ST (General)
19STI/OMultiplexed I/O & Peripheral Pin ST (General)
20STI/OMultiplexed I/O & Peripheral Pin ST (General)
21STI/OMultiplexed I/O & Peripheral Pin ST (General)
22STI/OMultiplexed I/O & Peripheral Pin ST (General)
23ANAI/OMultiplexed I/O & Peripheral Pin ANA (General)
24ANAI/OMultiplexed I/O & Peripheral Pin ANA (General)
25—I/OMultiplexed I/O & Peripheral Pin — (General)
26—I/OMultiplexed I/O & Peripheral Pin — (General)
27STI/OMultiplexed I/O & Peripheral Pin ST (General)
28STI/OMultiplexed I/O & Peripheral Pin ST (General)
29STI/OMultiplexed I/O & Peripheral Pin ST (General)
30STI/OMultiplexed I/O & Peripheral Pin ST (General)
31VSSGNDGround Reference Pin (VSS)
32VDDPowerPower Supply Input (VDD — 2.0V to 3.6V)
33STI/OMultiplexed I/O & Peripheral Pin ST (General)
34STI/OMultiplexed I/O & Peripheral Pin ST (General)
35STI/OMultiplexed I/O & Peripheral Pin ST (General)
36STI/OMultiplexed I/O & Peripheral Pin ST (General)
37STI/OMultiplexed I/O & Peripheral Pin ST (General)
38STI/OMultiplexed I/O & Peripheral Pin ST (General)
39STI/OMultiplexed I/O & Peripheral Pin ST (General)
40STI/OMultiplexed I/O & Peripheral Pin ST (General)
41STI/OMultiplexed I/O & Peripheral Pin ST (General)
42STI/OMultiplexed I/O & Peripheral Pin ST (General)
43STI/OMultiplexed I/O & Peripheral Pin ST (General)
44STI/OMultiplexed I/O & Peripheral Pin ST (General)
45STI/OMultiplexed I/O & Peripheral Pin ST (General)
46I2CI/OMultiplexed I/O & Peripheral Pin I2C (I2C)
47I2CI/OMultiplexed I/O & Peripheral Pin I2C (I2C)
48—I/OMultiplexed I/O & Peripheral Pin — (General)
49STI/OMultiplexed I/O & Peripheral Pin ST (General)
50STI/OMultiplexed I/O & Peripheral Pin ST (General)
51—I/OMultiplexed I/O & Peripheral Pin — (General)
52I2CI/OMultiplexed I/O & Peripheral Pin I2C (I2C)
53I2CI/OMultiplexed I/O & Peripheral Pin I2C (I2C)
54—I/OMultiplexed I/O & Peripheral Pin — (RTC/CLK)
55STI/OMultiplexed I/O & Peripheral Pin ST (General)
56STI/OMultiplexed I/O & Peripheral Pin ST (General)
57STI/OMultiplexed I/O & Peripheral Pin ST (General)
58STI/OMultiplexed I/O & Peripheral Pin ST (General)
59ANAI/OMultiplexed I/O & Peripheral Pin ANA (General)
60STI/OMultiplexed I/O & Peripheral Pin ST (General)
61STI/OMultiplexed I/O & Peripheral Pin ST (General)
62STI/OMultiplexed I/O & Peripheral Pin ST (General)
63STI/OMultiplexed I/O & Peripheral Pin ST (General)
64STI/OMultiplexed I/O & Peripheral Pin ST (General)
65STI/OMultiplexed I/O & Peripheral Pin ST (General)
66STI/OMultiplexed I/O & Peripheral Pin ST (General)
67STI/OMultiplexed I/O & Peripheral Pin ST (General)
68STI/OMultiplexed I/O & Peripheral Pin ST (General)
69STI/OMultiplexed I/O & Peripheral Pin ST (General)
70—I/OMultiplexed I/O & Peripheral Pin — (General)
71STI/OMultiplexed I/O & Peripheral Pin ST (General)
72STI/OMultiplexed I/O & Peripheral Pin ST (General)
73STI/OMultiplexed I/O & Peripheral Pin ST (General)
74STI/OMultiplexed I/O & Peripheral Pin ST (General)
75STI/OMultiplexed I/O & Peripheral Pin ST (General)
76STI/OMultiplexed I/O & Peripheral Pin ST (General)
77STI/OMultiplexed I/O & Peripheral Pin ST (General)
78STI/OMultiplexed I/O & Peripheral Pin ST (General)
79STI/OMultiplexed I/O & Peripheral Pin ST (General)
80STI/OMultiplexed I/O & Peripheral Pin ST (General)
PIN 1 ST
I/O
Multiplexed I/O & Peripheral Pin ST (General)
Design note: RE5
IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 17 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
1. Realistic 3D PackageREPRESENTATIVE
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) - 2. Standard Pinout (Top View)
True package pinout (80 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) - 4. Package Dimensions (D×E×A)
TQFP-80(12x12) · 12.00×12.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) - 5. Recommended Land Pattern
IPC-7351B Footprint (80 Pads)Expand ›
6. Application SchematicSCHEMATIC
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (17 figures · Page 1/2)
Showing 1–12 of 17 uncropped original figures for PIC24FJ128GA
P1 · p01_fig01752×399px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — PIC24FJ256GA110 Family
PIC24FJ256GA110 Family
P1 · p01_fig01P1
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P2 · p02_fig011777×1640px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — DS39905E-page 2  2010 Microchip Technology Inc. | Trademarks | FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Inc
DS39905E-page 2  2010 Microchip Technology Inc. | Trademarks | FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Inc
P2 · p02_fig02788×285px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — ISBN: 978-1-60932-670-8
ISBN: 978-1-60932-670-8
P24 · p24_fig01867×940px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — FIGURE 2-2: EXAMPLE OF MCLR PIN CONNECTIONS
FIGURE 2-2: EXAMPLE OF MCLR PIN CONNECTIONS
P27 · p27_fig01867×1876px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — FIGURE 2-5: SUGGESTED PLACEMENT OF THE OSCILLATOR CIRCUIT
FIGURE 2-5: SUGGESTED PLACEMENT OF THE OSCILLATOR CIRCUIT
P241 · p241_fig011778×776px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — PIC24FJ256GA110 FAMILY | 24.0 CHARGE TIME MEASUREMENT UNIT (CTMU) | The Charge Time Measurement Unit is a flexible analog module that provides accurate differential time measure- ment between pulse sources, as well as asynchronous pulse gen
PIC24FJ256GA110 FAMILY | 24.0 CHARGE TIME MEASUREMENT UNIT (CTMU) | The Charge Time Measurement Unit is a flexible analog module that provides accurate differential time measure- ment between pulse sources, as well as asynchronous pulse gen
P241 · p241_fig021783×1001px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — FIGURE 24-1: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR CAPACITANCE MEASUREMENT
FIGURE 24-1: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR CAPACITANCE MEASUREMENT
P241 · p241_fig02P241
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — Datasheet Page 241 (p241_fig02)
Datasheet Page 241 (p241_fig02)
P242 · p242_fig01978×657px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — FIGURE 24-2: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR TIME MEASUREMENT
FIGURE 24-2: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR TIME MEASUREMENT
P242 · p242_fig021777×834px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — FIGURE 24-3: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE DELAY GENERATION
FIGURE 24-3: TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE DELAY GENERATION
P270 · p270_fig011243×787px
PIC24FJ128GA108-I/PT (TQFP-80(12x12)) — FIGURE 28-1: PIC24FJ256GA110 FAMILY VOLTAGE-FREQUENCY GRAPH (INDUSTRIAL)
FIGURE 28-1: PIC24FJ256GA110 FAMILY VOLTAGE-FREQUENCY GRAPH (INDUSTRIAL)
Page 1 / 2 (17 extracted figures)

Technical Specifications & Part Details (PIC24FJ128GA108-I/PT)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:PIC24FJ128GA108-I/PT (TQFP-80(12x12)) is a 80-pin standard electronic & interconnect component featuring a 12.00 × 12.00 × 1.20 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 2.0V to 3.6V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, SPI, I2C, ADC, PWM, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
2.0V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
32 kHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
12.00 × 12.00 × 1.20 mm (A1=0.10 mm)
Package family: TQFP (TQFP-80(12x12))
Pin Count & Lead PitchN / e
80 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, PWM, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol80 auto-grouped pins
OK
IPC-7351B Land Pattern80 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — PIC24FJ128GA (3)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (TQFP-80(12x12))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
12.00 × 12.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.20mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.25 mm
Pins / Total PadsTopology
80P / 80Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TQFP-80(12x12)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC24FJ128GA108-I/PT (TQFP-80(12x12))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC24FJ128GA108-I/PT (TQFP-80(12x12))?

Manufactured by MICROCHIP, the PIC24FJ128GA108-I/PT is housed in a TQFP-80(12x12) package with 80 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.0V to 3.6V. Key pins include: 1 (ST: Multiplexed I/O & Peripheral Pin ST (General)), 2 (I2C: Multiplexed I/O & Peripheral Pin I2C (I2C)), 3 (I2C: Multiplexed I/O & Peripheral Pin I2C (I2C)), 4 (ST: Multiplexed I/O & Peripheral Pin ST (General)), 5 (ST: Multiplexed I/O & Peripheral Pin ST (General)), 6 (ST: Multiplexed I/O & Peripheral Pin ST (General)).

What are the IPC-7351B PCB Footprint dimensions for PIC24FJ128GA108-I/PT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC24FJ128GA108-I/PT (TQFP-80(12x12)) has a nominal body envelope of 12.00 × 12.00 mm, pitch e = 0.50 mm, and 80 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC24FJ128GA108-I/PT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC24FJ128GA108-I/PT (MICROCHIP, TQFP-80(12x12)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (80 pins) & PIC24FJ128GA Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
2I2CDigital_IOSignal terminal I2C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: I2C. Supported peripheral buses: I2C.
3I2CDigital_IOSignal terminal I2C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: I2C. Supported peripheral buses: I2C.
4STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
5STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
6STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
7STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
8STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
9STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
10STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
11VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
12VDDPower_InPrimary positive power supply input (VDD) operating in the 2.0V to 3.6V domain (Max rating: 3.6V).
13STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
14—Digital_IOSignal terminal — (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: —. Supported peripheral buses: General.
15STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
16STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
17STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
18STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
19STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
20STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
21STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
22STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
23ANADigital_IOSignal terminal ANA (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ANA. Supported peripheral buses: General.
24ANADigital_IOSignal terminal ANA (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ANA. Supported peripheral buses: General.
25—Digital_IOSignal terminal — (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: —. Supported peripheral buses: General.
26—Digital_IOSignal terminal — (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: —. Supported peripheral buses: General.
27STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
28STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
29STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
30STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
31VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
32VDDPower_InPrimary positive power supply input (VDD) operating in the 2.0V to 3.6V domain (Max rating: 3.6V).
33STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
34STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
35STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
36STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
37STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
38STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
39STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
40STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
41STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
42STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
43STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
44STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
45STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
46I2CDigital_IOSignal terminal I2C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: I2C. Supported peripheral buses: I2C.
47I2CDigital_IOSignal terminal I2C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: I2C. Supported peripheral buses: I2C.
48—Digital_IOSignal terminal — (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: —. Supported peripheral buses: General.
49STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
50STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
51—Digital_IOSignal terminal — (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: —. Supported peripheral buses: General.
52I2CDigital_IOSignal terminal I2C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: I2C. Supported peripheral buses: I2C.
53I2CDigital_IOSignal terminal I2C (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: I2C. Supported peripheral buses: I2C.
54—Digital_IOSignal terminal — (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: —. Supported peripheral buses: RTC/CLK.
55STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
56STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
57STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
58STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
59ANADigital_IOSignal terminal ANA (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ANA. Supported peripheral buses: General.
60STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
61STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
62STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
63STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
64STDigital_IOSignal terminal ST (I/O, 2.0V to 3.6V domain). Multiplexed alternate functions: ST. Supported peripheral buses: General.
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