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STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F733VEY6TR

STID: C2055955WLCSP-100(4.2x4.7) · 100 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F733VEY6TR (WLCSP-100(4.2x4.7))A1VDDA2VSSA3PE1A4PE0A5PB8A6PB5A7PG14A8PG13A9PB4(NJTRST)A10PB3(JTDO/TRAB1PA13(JTMS - B2PA12B3VCAP_2B4PB9B5PB7B6PB6B7PG15B8PG12B9PG11B10PG10C1PA11C2PI7C3PI6C4PI5C5VDDC6PDR_ONC7VDDC8PB8C9PE2C10VBATD1PC9D2PC8D3PA8D4PI4D5VSSD6BOOTD7VSSD8PB9D9PE4D10PC13E1PC6E2PD15E3PD13E4PE10E5PD2E6PD7E7PE0E8PE5E9PC14E10PC15K10VSSAK9VDDAK8VSSK7VSSK6VSSK5PE9K4PE14K3VSSK2VDDK1VDDUSBJ10VSSJ9VSSJ8VSSJ7VSSJ6VSSJ5PE7J4PE13J3VCAP_1J2PB12J1PB14H10VSSH9VSSH8VSSH7VSSH6VSSH5PE8H4PE12H3PB11H2PB13H1PB15G10VSSG9VSSG8VSSG7VSSG6VSSG5PB1G4PE11G3PB10G2OTG_HSREXT_G1VDD12OTGHSF10VSSF9VSSF8VSSF7VSSF6VSSF5PB0F4PE15F3PD11F2PD12F1PD14Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.868.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1A2B2C2D2E2F2G2H2J2K2A3B3C3D3E3F3G3H3J3K3A4B4C4D4E4F4G4H4J4K4A5B5C5D5E5F5G5H5J5K5A6B6C6D6E6F6G6H6J6K6A7B7C7D7E7F7G7H7J7K7A8B8C8D8E8F8G8H8J8K8A9B9C9D9E9F9G9H9J9K9A10B10C10D10E10F10G10H10J10K10E=4.20mm · Pitch e=0.40mmD=4.70mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 4.20mm × 4.70mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (100/100)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A2VSSGNDGround Reference Pin (VSS)
A3PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
A4PE0I/OMultiplexed I/O & Peripheral Pin PE0 (UART)
A5PB8I/OMultiplexed I/O & Peripheral Pin PB8 (I2C, PWM)
A6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, PWM)
A7PG14I/OMultiplexed I/O & Peripheral Pin PG14 (UART)
A8PG13I/OMultiplexed I/O & Peripheral Pin PG13 (UART)
A9PB4(NJTRST)I/OMultiplexed I/O & Peripheral Pin PB4(NJTRST) (SPI, SWD/JTAG)
A10PB3(JTDO/TRA CESWO)I/OMultiplexed I/O & Peripheral Pin PB3(JTDO/TRA CESWO) (SPI, SWD/JTAG)
B1PA13(JTMS - SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13(JTMS - SWDIO) (SWD/JTAG)
B2PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
B3VCAP_2I/OMultiplexed I/O & Peripheral Pin VCAP_2 (General)
B4PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, I2C, PWM, CAN)
B5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, PWM)
B6PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, PWM)
B7PG15I/OMultiplexed I/O & Peripheral Pin PG15 (UART)
B8PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
B9PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
B10PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
C1PA11I/OMultiplexed I/O & Peripheral Pin PA11 (PWM, CAN)
C2PI7I/OMultiplexed I/O & Peripheral Pin PI7 (General)
C3PI6I/OMultiplexed I/O & Peripheral Pin PI6 (General)
C4PI5I/OMultiplexed I/O & Peripheral Pin PI5 (General)
C5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
C6PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
C7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
C8PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
C9PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
C10VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
D1PC9I/OMultiplexed I/O & Peripheral Pin PC9 (UART, I2C, RTC/CLK)
D2PC8I/OMultiplexed I/O & Peripheral Pin PC8 (UART, PWM)
D3PA8I/OMultiplexed I/O & Peripheral Pin PA8 (I2C, RTC/CLK)
D4PI4I/OMultiplexed I/O & Peripheral Pin PI4 (General)
D5VSSGNDGround Reference Pin (VSS)
D6BOOTI/OMultiplexed I/O & Peripheral Pin BOOT (General)
D7VSSGNDGround Reference Pin (VSS)
D8PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
D9PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
D10PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
E1PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
E2PD15I/OMultiplexed I/O & Peripheral Pin PD15 (PWM)
E3PD13I/OMultiplexed I/O & Peripheral Pin PD13 (SPI, PWM)
E4PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
E5PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
E6PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART)
E7PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
E8PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
E9PC14I/OMultiplexed I/O & Peripheral Pin PC14 (General)
E10PC15I/OMultiplexed I/O & Peripheral Pin PC15 (General)
F1PD14I/OMultiplexed I/O & Peripheral Pin PD14 (PWM)
F2PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, PWM)
F3PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, I2C)
F4PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
F5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (ADC, PWM)
F6VSSGNDGround Reference Pin (VSS)
F7VSSGNDGround Reference Pin (VSS)
F8VSSGNDGround Reference Pin (VSS)
F9VSSGNDGround Reference Pin (VSS)
F10VSSGNDGround Reference Pin (VSS)
G1VDD12OTGHSPowerPower Supply Input (VDD12OTGHS — 3.3V VDD (Max 4.0V))
G2OTG_HSREXT_I/OMultiplexed I/O & Peripheral Pin OTG_HSREXT_ (USB)
G3PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, PWM)
G4PE11I/OMultiplexed I/O & Peripheral Pin PE11 (PWM)
G5PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
G6VSSGNDGround Reference Pin (VSS)
G7VSSGNDGround Reference Pin (VSS)
G8VSSGNDGround Reference Pin (VSS)
G9VSSGNDGround Reference Pin (VSS)
G10VSSGNDGround Reference Pin (VSS)
H1PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
H2PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
H3PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, PWM)
H4PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, PWM)
H5PE8I/OMultiplexed I/O & Peripheral Pin PE8 (PWM)
H6VSSGNDGround Reference Pin (VSS)
H7VSSGNDGround Reference Pin (VSS)
H8VSSGNDGround Reference Pin (VSS)
H9VSSGNDGround Reference Pin (VSS)
H10VSSGNDGround Reference Pin (VSS)
J1PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
J2PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI)
J3VCAP_1I/OMultiplexed I/O & Peripheral Pin VCAP_1 (General)
J4PE13I/OMultiplexed I/O & Peripheral Pin PE13 (PWM)
J5PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
J6VSSGNDGround Reference Pin (VSS)
J7VSSGNDGround Reference Pin (VSS)
J8VSSGNDGround Reference Pin (VSS)
J9VSSGNDGround Reference Pin (VSS)
J10VSSGNDGround Reference Pin (VSS)
K1VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
K2VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K3VSSGNDGround Reference Pin (VSS)
K4PE14I/OMultiplexed I/O & Peripheral Pin PE14 (PWM)
K5PE9I/OMultiplexed I/O & Peripheral Pin PE9 (PWM)
K6VSSGNDGround Reference Pin (VSS)
K7VSSGNDGround Reference Pin (VSS)
K8VSSGNDGround Reference Pin (VSS)
K9VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
K10VSSAGNDGround Reference Pin (VSSA)
PIN A1 VDD
Power
Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 11 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F733VEY6TR (ST · WLCSP-100(4.2x4.7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) - 2. Standard Pinout (Top View)
True package pinout (100 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) - 4. Package Dimensions (D×E×A)
WLCSP-100(4.2x4.7) · 4.20×4.70mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (100 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (11 figures · Page 1/1)
Showing 1–11 of 11 uncropped original figures for STM32F733 / STM32F732
P52 · p52_fig01EXACT PACKAGE
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Figure 16. STM32F733xx WLCSP100 ballout (with OTG PHY HS)
Figure 16. STM32F733xx WLCSP100 ballout (with OTG PHY HS)
P204 · p204_fig01EXACT PACKAGE
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Figure 81. LQFP100 outline
Figure 81. LQFP100 outline
P221 · p221_fig01EXACT PACKAGE
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Figure 97. WLCSP100 recommended footprint
Figure 97. WLCSP100 recommended footprint
P1 · p01_fig01881×620px
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — • 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
• 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
P52 · p52_fig01P52
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Datasheet Page 52 (p52_fig01)
Datasheet Page 52 (p52_fig01)
P101 · p101_fig011546×1696px
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Figure 26. STM32F732xx power supply scheme
Figure 26. STM32F732xx power supply scheme
P101 · p101_fig01P101
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Datasheet Page 101 (p101_fig01)
Datasheet Page 101 (p101_fig01)
P102 · p102_fig011546×2240px
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Figure 27. STM32F733xx power supply scheme
Figure 27. STM32F733xx power supply scheme
P158 · p158_fig011546×1229px
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Figure 46. ADC accuracy characteristics
Figure 46. ADC accuracy characteristics
P158 · p158_fig021546×604px
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Figure 47. Typical connection diagram using the ADC
Figure 47. Typical connection diagram using the ADC
P221 · p221_fig01P221
STM32F733VEY6TR (WLCSP-100(4.2x4.7)) — Datasheet Page 221 (p221_fig01)
Datasheet Page 221 (p221_fig01)

Technical Specifications & Part Details (STM32F733VEY6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F733VEY6TR (WLCSP-100(4.2x4.7)) is a 100-pin embedded microcontroller unit (mcu) featuring a 4.70 × 4.20 × 0.56 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.7 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, ADC, JTAG / SWD, IrDA, CAN, PWM, RTC/CLK, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.7 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
216 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
50 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
4.70 × 4.20 × 0.56 mm (A1=0.17 mm)
Package family: WLCSP (WLCSP-100(4.2x4.7))
Pin Count & Lead PitchN / e
100 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, ADC, JTAG / SWD, IrDA, CAN, PWM, RTC/CLK, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol100 auto-grouped pins
OK
IPC-7351B Land Pattern100 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-100(4.2x4.7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
4.70 × 4.20 mm
Height (A) & Pitch (e)IPC-7351B
A=0.56mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
100P / 100Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-100(4.2x4.7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F733VEY6TR (WLCSP-100(4.2x4.7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F733VEY6TR (WLCSP-100(4.2x4.7))?

Manufactured by ST, the STM32F733VEY6TR is housed in a WLCSP-100(4.2x4.7) package with 100 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: A1 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A2 (VSS: Ground Reference Pin (VSS)), A3 (PE1: Multiplexed I/O & Peripheral Pin PE1 (General)), A4 (PE0: Multiplexed I/O & Peripheral Pin PE0 (UART)), A5 (PB8: Multiplexed I/O & Peripheral Pin PB8 (I2C, PWM)), A6 (PB5: Multiplexed I/O & Peripheral Pin PB5 (SPI, PWM)).

What are the IPC-7351B PCB Footprint dimensions for STM32F733VEY6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F733VEY6TR (WLCSP-100(4.2x4.7)) has a nominal body envelope of 4.20 × 4.70 mm, pitch e = 0.40 mm, and 100 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F733VEY6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F733VEY6TR (ST, WLCSP-100(4.2x4.7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (100 pins) & STM32F733 / STM32F732 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A3PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
A4PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: UART.
A5PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: I2C, PWM.
A6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, SPI3_MOSI. Supported peripheral buses: SPI, PWM.
A7PG14Digital_IOSignal terminal PG14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG14. Supported peripheral buses: UART.
A8PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG13. Supported peripheral buses: UART.
A9PB4(NJTRST)Digital_IOSignal terminal PB4(NJTRST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISOSPI3MISO, SPI2_NSS. Supported peripheral buses: SPI, SWD/JTAG.
A10PB3(JTDO/TRA CESWO)Digital_IOSignal terminal PB3(JTDO/TRA CESWO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK. Supported peripheral buses: SPI, SWD/JTAG.
B1PA13(JTMS - SWDIO)Digital_IOSignal terminal PA13(JTMS - SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13(JTMS - SWDIO). Supported peripheral buses: SWD/JTAG.
B2PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
B3VCAP_2Digital_IOSignal terminal VCAP_2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP_2. Supported peripheral buses: General.
B4PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, SPI2_NSS. Supported peripheral buses: SPI, I2C, PWM, CAN.
B5PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, PWM.
B6PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: UART, PWM.
B7PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: UART.
B8PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General.
B9PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG11. Supported peripheral buses: General.
B10PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General.
C1PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: PWM, CAN.
C2PI7Digital_IOSignal terminal PI7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI7. Supported peripheral buses: General.
C3PI6Digital_IOSignal terminal PI6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI6. Supported peripheral buses: General.
C4PI5Digital_IOSignal terminal PI5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI5. Supported peripheral buses: General.
C5VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C6PDR_ONDigital_IOSignal terminal PDR_ON (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PDR_ON. Supported peripheral buses: General.
C7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C8PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
C9PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
C10VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D1PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: UART, I2C, RTC/CLK.
D2PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: UART, PWM.
D3PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: I2C, RTC/CLK.
D4PI4Digital_IOSignal terminal PI4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI4. Supported peripheral buses: General.
D5VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D6BOOTDigital_IOSignal terminal BOOT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT. Supported peripheral buses: General.
D7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D8PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
D9PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
D10PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
E1PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: PWM.
E2PD15Digital_IOSignal terminal PD15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: PWM.
E3PD13Digital_IOSignal terminal PD13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD13. Supported peripheral buses: SPI, PWM.
E4PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: PWM.
E5PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
E6PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: UART.
E7PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
E8PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
E9PC14Digital_IOSignal terminal PC14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14. Supported peripheral buses: General.
E10PC15Digital_IOSignal terminal PC15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15. Supported peripheral buses: General.
F1PD14Digital_IOSignal terminal PD14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD14. Supported peripheral buses: PWM.
F2PD12Digital_IOSignal terminal PD12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD12. Supported peripheral buses: UART, PWM.
F3PD11Digital_IOSignal terminal PD11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD11. Supported peripheral buses: UART, I2C.
F4PE15Digital_IOSignal terminal PE15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
F5PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: ADC, PWM.
F6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F8VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F9VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F10VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
G1VDD12OTGHSPower_InPrimary positive power supply input (VDD12OTGHS) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
G2OTG_HSREXT_Digital_IOSignal terminal OTG_HSREXT_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: OTG_HSREXT_. Supported peripheral buses: USB.
G3PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, PWM.
G4PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: PWM.
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