Mechanical Dimensions & Land Pattern (WLCSP-168(4.9x5.7))
Extracted from Datasheet & IPC-7351B NormalizedRecommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit WLCSP-168(4.9x5.7) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32F469AGY6TR (WLCSP-168(4.9x5.7))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32F469AGY6TR (WLCSP-168(4.9x5.7))?
Manufactured by ST, the STM32F469AGY6TR is housed in a WLCSP-168(4.9x5.7) package with 168 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: A1 (PI2: Multiplexed I/O & Peripheral Pin PI2 (PWM)), A2 (PA15(JTDI): Multiplexed I/O & Peripheral Pin PA15(JTDI) (SPI, SWD/JTAG)), A3 (PD1: Multiplexed I/O & Peripheral Pin PD1 (CAN)), A4 (VSS: Ground Reference Pin (VSS)), A5 (PD7: Multiplexed I/O & Peripheral Pin PD7 (UART)), A6 (PG12: Multiplexed I/O & Peripheral Pin PG12 (UART, SPI)).
What are the IPC-7351B PCB Footprint dimensions for STM32F469AGY6TR?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F469AGY6TR (WLCSP-168(4.9x5.7)) has a nominal body envelope of 4.90 × 5.70 mm, pitch e = 0.40 mm, and 168 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F469AGY6TR?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F469AGY6TR (ST, WLCSP-168(4.9x5.7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (168 pins) & STM32F469 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | PI2 | Digital_IO | Signal terminal PI2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI2. Supported peripheral buses: PWM. |
| A2 | PA15(JTDI) | Digital_IO | Signal terminal PA15(JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: SPI, SWD/JTAG. |
| A3 | PD1 | Digital_IO | Signal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: CAN. |
| A4 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A5 | PD7 | Digital_IO | Signal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: UART. |
| A6 | PG12 | Digital_IO | Signal terminal PG12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_MISO. Supported peripheral buses: UART, SPI. |
| A7 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| A8 | PB3(JTDO/TRA CESWO) | Digital_IO | Signal terminal PB3(JTDO/TRA CESWO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: SPI, PWM, SWD/JTAG. |
| A9 | PB7 | Digital_IO | Signal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, PWM. |
| A10 | PE0 | Digital_IO | Signal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General. |
| A11 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| A12 | PI7 | Digital_IO | Signal terminal PI7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI7. Supported peripheral buses: PWM. |
| B1 | PH13 | Digital_IO | Signal terminal PH13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH13. Supported peripheral buses: PWM. |
| B2 | PI3 | Digital_IO | Signal terminal PI3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI. |
| B3 | PC11 | Digital_IO | Signal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: UART. |
| B4 | PD4 | Digital_IO | Signal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: UART. |
| B5 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| B6 | PG11 | Digital_IO | Signal terminal PG11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG11. Supported peripheral buses: General. |
| B7 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B8 | PB5 | Digital_IO | Signal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, SPI3_MOSI. Supported peripheral buses: SPI, PWM, CAN. |
| B9 | PB8 | Digital_IO | Signal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: UART, I2C, PWM. |
| B10 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B11 | PI6 | Digital_IO | Signal terminal PI6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI6. Supported peripheral buses: PWM. |
| B12 | PE5 | Digital_IO | Signal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO_SAI1SCKA. Supported peripheral buses: SPI. |
| C1 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| C2 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| C3 | PI1 | Digital_IO | Signal terminal PI1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI. |
| C4 | PC12 | Digital_IO | Signal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI. |
| C5 | PD2 | Digital_IO | Signal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART. |
| C6 | PD5 | Digital_IO | Signal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART. |
| C7 | PG10 | Digital_IO | Signal terminal PG10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General. |
| C8 | PB4(NJTRST) | Digital_IO | Signal terminal PB4(NJTRST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISOSPI3MISO. Supported peripheral buses: SPI, SWD/JTAG. |
| C9 | PE1 | Digital_IO | Signal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: UART. |
| C10 | PI5 | Digital_IO | Signal terminal PI5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI5. Supported peripheral buses: PWM. |
| C11 | PE4 | Digital_IO | Signal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI. |
| C12 | VBAT | Power_In | Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| D1 | PA13(JTMS - SWDIO) | Digital_IO | Signal terminal PA13(JTMS - SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13(JTMS - SWDIO). Supported peripheral buses: SWD/JTAG. |
| D2 | VCAP2 | Digital_IO | Signal terminal VCAP2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP2. Supported peripheral buses: General. |
| D3 | PH14 | Digital_IO | Signal terminal PH14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: PWM. |
| D4 | PA14(JTCK - SWCLK) | Digital_IO | Signal terminal PA14(JTCK - SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14(JTCK - SWCLK). Supported peripheral buses: SWD/JTAG. |
| D5 | PC10 | Digital_IO | Signal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI. |
| D6 | PD3 | Digital_IO | Signal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI. |
| D7 | PG9 | Digital_IO | Signal terminal PG9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: UART. |
| D8 | PG15 | Digital_IO | Signal terminal PG15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: UART. |
| D9 | PDR_ON | Digital_IO | Signal terminal PDR_ON (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PDR_ON. Supported peripheral buses: General. |
| D10 | PI4 | Digital_IO | Signal terminal PI4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI4. Supported peripheral buses: General. |
| D11 | PE6 | Digital_IO | Signal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI_SAI1SDA. Supported peripheral buses: SPI. |
| D12 | PC13 | Digital_IO | Signal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK. |
| E1 | PA8 | Digital_IO | Signal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: I2C, RTC/CLK. |
| E2 | PA9 | Digital_IO | Signal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, PWM. |
| E3 | PA10 | Digital_IO | Signal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: PWM. |
| E4 | PH15 | Digital_IO | Signal terminal PH15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH15. Supported peripheral buses: PWM. |
| E5 | PI0 | Digital_IO | Signal terminal PI0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI. |
| E6 | PD0 | Digital_IO | Signal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: CAN. |
| E7 | PD6 | Digital_IO | Signal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: SPI. |
| E8 | PG13 | Digital_IO | Signal terminal PG13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_SCK. Supported peripheral buses: UART, SPI. |
| E9 | PB9 | Digital_IO | Signal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, SPI2_NSS. Supported peripheral buses: SPI, I2C, PWM, CAN. |
| E10 | PE3 | Digital_IO | Signal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General. |
| E11 | PC14OSC32 IN -_ (PC14) | Digital_IO | Signal terminal PC14OSC32 IN -_ (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14OSC32 IN -_ (PC14). Supported peripheral buses: RTC/CLK. |
| E12 | IOE12 | Digital_IO | General Purpose Digital I/O Pin IOE12 |
| F1 | VDDUSB | Power_In | Primary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| F2 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| F3 | PC6 | Digital_IO | Signal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: PWM. |
| F4 | PC8 | Digital_IO | Signal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: PWM. |











