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STM32F373R8T6TR (LQFP-64(10x10)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F373R8T6TR

STID: C2055172LQFP-64(10x10) · 64 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F373R8T6TR (LQFP-64(10x10))1VBAT2PC133PC14 N- OSC34PC15 U- OSC35PF0 OSC IN -6IO37NRST8PC09PC110PC211PC312VSSA/VREF -13VDDA14PA015PA116PA217VREF+18PA319VDD_220PA421PA522PA623PA724PC425PC526PB027PB128PB229PE830PE931VSSSD/ VREFS32VDDSD64VDD_163VSS_162PB961PB860BOOT059PB758PB657PB556PB455PB354PD253PC1252PC1151PC1050PA1549PA1448PF747PF646PA1345PA1244PA1143PA1042PA941PA840PC939PC838PC737PC636PD835PB1534PB1433VREFSD+Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364E=10.00mm · Pitch e=0.50mmD=10.00mm-9-7-5-3-11357997531-1-3-5-7-9mm
3. 3D CAD MODEL
Package Body: 10.00mm × 10.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
2PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
3PC14 N- OSC32 I (1)_I/OMultiplexed I/O & Peripheral Pin PC14 N- OSC32 I (1)_ (RTC/CLK)
4PC15 U- OSC32 O T(1)_I/OMultiplexed I/O & Peripheral Pin PC15 U- OSC32 O T(1)_ (RTC/CLK)
5PF0 OSC IN -_I/OMultiplexed I/O & Peripheral Pin PF0 OSC IN -_ (I2C, RTC/CLK)
6IO3I/OGPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)
7NRSTISystem Enable & Hardware Reset (NRST)
8PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC, PWM)
9PC1I/OMultiplexed I/O & Peripheral Pin PC1 (ADC, PWM)
10PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC, PWM)
11PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC, PWM)
12VSSA/VREF -GNDGround Reference Pin (VSSA/VREF -)
13VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
14PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
15PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, ADC, RTC/CLK)
16PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI, ADC)
17VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (DAC)
18PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, SPI, ADC)
19VDD_2PowerPower Supply Input (VDD_2 — 3.3V VDD (Max 4.0V))
20PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC)
21PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC)
22PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC)
23PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC)
24PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
25PC5I/OMultiplexed I/O & Peripheral Pin PC5 (ADC)
26PB0I/OMultiplexed I/O & Peripheral Pin PB0 (SPI, ADC, PWM)
27PB1I/OMultiplexed I/O & Peripheral Pin PB1 (I2C, ADC)
28PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, ADC)
29PE8I/OMultiplexed I/O & Peripheral Pin PE8 (I2C, ADC)
30PE9I/OMultiplexed I/O & Peripheral Pin PE9 (I2C, ADC)
31VSSSD/ VREFSD -GNDGround Reference Pin (VSSSD/ VREFSD -)
32VDDSDPowerPower Supply Input (VDDSD — 3.3V VDD (Max 4.0V))
33VREFSD+I/OMultiplexed I/O & Peripheral Pin VREFSD+ (I2C)
34PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, I2C, ADC)
35PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, I2C, ADC, RTC/CLK)
36PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART, SPI, I2C, ADC)
37PC6I/OMultiplexed I/O & Peripheral Pin PC6 (SPI, PWM)
38PC7I/OMultiplexed I/O & Peripheral Pin PC7 (SPI, PWM)
39PC8I/OMultiplexed I/O & Peripheral Pin PC8 (SPI, PWM)
40PC9I/OMultiplexed I/O & Peripheral Pin PC9 (SPI, PWM)
41PA8I/OMultiplexed I/O & Peripheral Pin PA8 (SPI, I2C, RTC/CLK)
42PA9I/OMultiplexed I/O & Peripheral Pin PA9 (SPI, I2C, PWM)
43PA10I/OMultiplexed I/O & Peripheral Pin PA10 (SPI, I2C, PWM)
44PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
45PA12I/OMultiplexed I/O & Peripheral Pin PA12 (USB, UART, SPI, PWM)
46PA13I/OMultiplexed I/O & Peripheral Pin PA13 (UART, SPI, SWD/JTAG)
47PF6I/OMultiplexed I/O & Peripheral Pin PF6 (UART, SPI, I2C)
48PF7I/OMultiplexed I/O & Peripheral Pin PF7 (I2C)
49PA14I/OMultiplexed I/O & Peripheral Pin PA14 (I2C)
50PA15I/OMultiplexed I/O & Peripheral Pin PA15 (SPI, I2C)
51PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
52PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
53PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
54PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
55PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI, SWD/JTAG)
56PB4I/OMultiplexed I/O & Peripheral Pin PB4 (UART, SPI, PWM, SWD/JTAG)
57PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, I2C)
58PB6I/OMultiplexed I/O & Peripheral Pin PB6 (I2C, PWM)
59PB7I/OMultiplexed I/O & Peripheral Pin PB7 (I2C, PWM)
60BOOT0IInput-Only Pin BOOT0 (General)
61PB8I/OMultiplexed I/O & Peripheral Pin PB8 (SPI, I2C, PWM, CAN)
62PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, I2C, CAN)
63VSS_1GNDGround Reference Pin (VSS_1)
64VDD_1PowerPower Supply Input (VDD_1 — 3.3V VDD (Max 4.0V))
PIN 1 VBAT
Power
Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))
Design note: Alt: Backuppowersupply
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 15 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F373R8T6TR (ST · LQFP-64(10x10))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F373R8T6TR (LQFP-64(10x10)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F373R8T6TR (LQFP-64(10x10)) - 2. Standard Pinout (Top View)
True package pinout (64 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F373R8T6TR (LQFP-64(10x10)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F373R8T6TR (LQFP-64(10x10)) - 4. Package Dimensions (D×E×A)
LQFP-64(10x10) · 10.00×10.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F373R8T6TR (LQFP-64(10x10)) - 5. Recommended Land Pattern
IPC-7351B Footprint (64 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F373R8T6TR (LQFP-64(10x10)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (15 figures · Page 1/2)
Showing 1–12 of 15 uncropped original figures for STM32F373
P30 · p30_fig01EXACT PACKAGE
STM32F373R8T6TR (LQFP-64(10x10)) — Figure 3. STM32F373xx LQFP64 pinout
Figure 3. STM32F373xx LQFP64 pinout
P121 · p121_fig01EXACT PACKAGE
STM32F373R8T6TR (LQFP-64(10x10)) — Figure 38. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package outline 6($7,1*3/$1( &
Figure 38. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package outline 6($7,1*3/$1( &
P123 · p123_fig01EXACT PACKAGE
STM32F373R8T6TR (LQFP-64(10x10)) — Figure 39. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package
Figure 39. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package
P123 · p123_fig02EXACT PACKAGE
STM32F373R8T6TR (LQFP-64(10x10)) — Figure 40. LQFP64 marking example (package top view)
Figure 40. LQFP64 marking example (package top view)
P1 · p01_fig01881×406px
STM32F373R8T6TR (LQFP-64(10x10)) — • Memories - 64 to 256 Kbytes of Flash memory - 32 Kbytes of SRAM with HW parity check
• Memories - 64 to 256 Kbytes of Flash memory - 32 Kbytes of SRAM with HW parity check
P1 · p01_fig02888×433px
STM32F373R8T6TR (LQFP-64(10x10)) — • 96-bit unique ID
• 96-bit unique ID
P30 · p30_fig01P30
STM32F373R8T6TR (LQFP-64(10x10)) — Datasheet Page 30 (p30_fig01)
Datasheet Page 30 (p30_fig01)
P61 · p61_fig011873×1351px
STM32F373R8T6TR (LQFP-64(10x10)) — DocID022691 Rev 7 61/137 | 114 | The parameters given in Table 28 to Table 34 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 22. | Table 28. Typical and maximum current consumpti
DocID022691 Rev 7 61/137 | 114 | The parameters given in Table 28 to Table 34 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 22. | Table 28. Typical and maximum current consumpti
P100 · p100_fig011751×902px
STM32F373R8T6TR (LQFP-64(10x10)) — Figure 27. ADC accuracy characteristics
Figure 27. ADC accuracy characteristics
P100 · p100_fig021545×602px
STM32F373R8T6TR (LQFP-64(10x10)) — Figure 28. Typical connection diagram using the ADC
Figure 28. Typical connection diagram using the ADC
P100 · p100_fig01P100
STM32F373R8T6TR (LQFP-64(10x10)) — Datasheet Page 100 (p100_fig01)
Datasheet Page 100 (p100_fig01)
P121 · p121_fig01P121
STM32F373R8T6TR (LQFP-64(10x10)) — Datasheet Page 121 (p121_fig01)
Datasheet Page 121 (p121_fig01)
Page 1 / 2 (15 extracted figures)

Technical Specifications & Part Details (STM32F373R8T6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F373R8T6TR (LQFP-64(10x10)) is a 64-pin embedded microcontroller unit (mcu) featuring a 10.00 × 10.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
72 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
26 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
10.00 × 10.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-64(10x10))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol64 auto-grouped pins
OK
IPC-7351B Land Pattern64 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-64(10x10))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.27 × 1.30 mm
Pins / Total PadsTopology
64P / 64Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-64(10x10)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F373R8T6TR (LQFP-64(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F373R8T6TR (LQFP-64(10x10))?

Manufactured by ST, the STM32F373R8T6TR is housed in a LQFP-64(10x10) package with 64 pins and a 0.50 mm lead pitch. Key pins include: 1 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))), 2 (PC13: Multiplexed I/O & Peripheral Pin PC13 (RTC/CLK)), 3 (PC14 N- OSC32 I (1)_: Multiplexed I/O & Peripheral Pin PC14 N- OSC32 I (1)_ (RTC/CLK)), 4 (PC15 U- OSC32 O T(1)_: Multiplexed I/O & Peripheral Pin PC15 U- OSC32 O T(1)_ (RTC/CLK)), 5 (PF0 OSC IN -_: Multiplexed I/O & Peripheral Pin PF0 OSC IN -_ (I2C, RTC/CLK)), 6 (IO3: GPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)).

What are the IPC-7351B PCB Footprint dimensions for STM32F373R8T6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F373R8T6TR (LQFP-64(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.50 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F373R8T6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F373R8T6TR (ST, LQFP-64(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & STM32F373 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
2PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
3PC14 N- OSC32 I (1)_Digital_IOSignal terminal PC14 N- OSC32 I (1)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14 N- OSC32 I (1)_. Supported peripheral buses: RTC/CLK.
4PC15 U- OSC32 O T(1)_Digital_IOSignal terminal PC15 U- OSC32 O T(1)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15 U- OSC32 O T(1)_. Supported peripheral buses: RTC/CLK.
5PF0 OSC IN -_Digital_IOSignal terminal PF0 OSC IN -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA. Supported peripheral buses: I2C, RTC/CLK.
6IO3Digital_IOGPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)
7NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
8PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC, PWM.
9PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: ADC, PWM.
10PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, ADC, PWM.
11PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, ADC, PWM.
12VSSA/VREF -GND0V electrical ground return terminal (VSSA/VREF -) for internal core logic, I/O drivers, and analog sub-blocks.
13VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
14PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
15PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI, ADC, RTC/CLK.
16PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI, ADC.
17VREF+AnalogSignal terminal VREF+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: DAC.
18PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, ADC.
19VDD_2Power_InPrimary positive power supply input (VDD_2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
20PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, ADC.
21PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC.
22PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, ADC.
23PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC.
24PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
25PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: ADC.
26PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
27PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: I2C, ADC.
28PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: I2C, ADC.
29PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: I2C, ADC.
30PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: I2C, ADC.
31VSSSD/ VREFSD -GND0V electrical ground return terminal (VSSSD/ VREFSD -) for internal core logic, I/O drivers, and analog sub-blocks.
32VDDSDPower_InPrimary positive power supply input (VDDSD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
33VREFSD+Digital_IOSignal terminal VREFSD+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREFSD+. Supported peripheral buses: I2C.
34PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, I2C, ADC.
35PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, I2C, ADC, RTC/CLK.
36PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, I2C, ADC.
37PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: SPI, PWM.
38PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, PWM.
39PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, PWM.
40PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, PWM.
41PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, I2C, RTC/CLK.
42PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, I2C, PWM.
43PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, I2C, PWM.
44PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS, SPI1_NSS. Supported peripheral buses: UART, SPI, PWM.
45PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: USB, UART, SPI, PWM.
46PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, SWD/JTAG.
47PF6Digital_IOSignal terminal PF6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, I2C2_SCL. Supported peripheral buses: UART, SPI, I2C.
48PF7Digital_IOSignal terminal PF7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF7. Supported peripheral buses: I2C.
49PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: I2C.
50PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: SPI, I2C.
51PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
52PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
53PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI.
54PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
55PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK. Supported peripheral buses: UART, SPI, SWD/JTAG.
56PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO. Supported peripheral buses: UART, SPI, PWM, SWD/JTAG.
57PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, SPI3_MOSI. Supported peripheral buses: SPI, I2C.
58PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: I2C, PWM.
59PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: I2C, PWM.
60BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
61PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, I2C, PWM, CAN.
62PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, I2C, CAN.
63VSS_1GND0V electrical ground return terminal (VSS_1) for internal core logic, I/O drivers, and analog sub-blocks.
64VDD_1Power_InPrimary positive power supply input (VDD_1) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
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