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STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F098RCY6TR

STID: C2054761WLCSP-64(3.4x3.6) · 64 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F098RCY6TR (WLCSP-64(3.4x3.6))A1VDDIO2A2PA15A3PC10A4PD2A5PB6A6PB8A7PA14A8PA13B1PA12B2VSSB3PA14B4PC12B5PB7B6PB9B7PC13B8VBATC1PA9C2PA10C3PA13C4PC11C5PB5C6PF11BOOT0 -C7IOC7C8PC14 - OSC32D1PC7D2PA8D3PA11D4PB3D5PB4D6PC2D7NRSTD8PF0OSC IN -_H8VDDAH7PA3H6PA4H5PC4H4NPORH3PB11H2VSSH1VDDG8VSSAG7VSSG6VDDG5PA6G4PB0G3PB10G2PB12G1PB14F8PC1F7PA0F6PA1F5PA5F4PC5F3PB1F2PB13F1PB15E8PF1OSC OUT -E7PC0E6PC3E5PA2E4PA7E3PC9E2PC8E1PC6Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1A2B2C2D2E2F2G2H2A3B3C3D3E3F3G3H3A4B4C4D4E4F4G4H4A5B5C5D5E5F5G5H5A6B6C6D6E6F6G6H6A7B7C7D7E7F7G7H7A8B8C8D8E8F8G8H8E=3.40mm · Pitch e=0.40mmD=3.60mm-3-2-1012343210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 3.40mm × 3.60mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
A2PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI, PWM)
A3PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART)
A4PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
A5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (I2C)
A6PB8I/OMultiplexed I/O & Peripheral Pin PB8 (I2C, CAN)
A7PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
A8PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
B1PA12I/OMultiplexed I/O & Peripheral Pin PA12 (I2C, CAN)
B2VSSGNDGround Reference Pin (VSS)
B3PA14I/OMultiplexed I/O & Peripheral Pin PA14 (UART)
B4PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART)
B5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C)
B6PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, I2C, CAN)
B7PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
B8VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
C1PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART)
C2PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART)
C3PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
C4PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART)
C5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C, PWM)
C6PF11BOOT0 -I/OMultiplexed I/O & Peripheral Pin PF11BOOT0 - (General)
C7IOC7I/OGeneral Purpose Digital I/O Pin IOC7
C8PC14 - OSC32_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
D1PC7I/OMultiplexed I/O & Peripheral Pin PC7 (PWM)
D2PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, RTC/CLK)
D3PA11I/OMultiplexed I/O & Peripheral Pin PA11 (I2C, PWM, CAN)
D4PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI)
D5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (UART, SPI)
D6PC2I/OMultiplexed I/O & Peripheral Pin PC2 (UART, SPI, ADC)
D7NRSTISystem Enable & Hardware Reset (NRST)
D8PF0OSC IN -_ (PF0)I/OMultiplexed I/O & Peripheral Pin PF0OSC IN -_ (PF0) (RTC/CLK)
E1PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
E2PC8I/OMultiplexed I/O & Peripheral Pin PC8 (PWM)
E3PC9I/OMultiplexed I/O & Peripheral Pin PC9 (PWM)
E4PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
E5PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC)
E6PC3I/OMultiplexed I/O & Peripheral Pin PC3 (UART, SPI, ADC)
E7PC0I/OMultiplexed I/O & Peripheral Pin PC0 (UART, ADC)
E8PF1OSC OUT -_ (PF1)I/OMultiplexed I/O & Peripheral Pin PF1OSC OUT -_ (PF1) (I2C, RTC/CLK)
F1PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, PWM, RTC/CLK)
F2PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, I2C, PWM)
F3PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
F4PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
F5PA5I/OMultiplexed I/O & Peripheral Pin PA5 (UART, SPI, ADC, DAC, PWM)
F6PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
F7PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
F8PC1I/OMultiplexed I/O & Peripheral Pin PC1 (UART, ADC)
G1PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, I2C, PWM)
G2PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI)
G3PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C)
G4PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, ADC, PWM)
G5PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, PWM)
G6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G7VSSGNDGround Reference Pin (VSS)
G8VSSAGNDGround Reference Pin (VSSA)
H1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H2VSSGNDGround Reference Pin (VSS)
H3PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, I2C)
H4NPORI/OMultiplexed I/O & Peripheral Pin NPOR (General)
H5PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
H6PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
H7PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC)
H8VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
PIN A1 VDDIO2
Power
Power Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
Design note: Alt: Digitalpowersupply
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 15 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F098RCY6TR (ST · WLCSP-64(3.4x3.6))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) - 2. Standard Pinout (Top View)
True package pinout (64 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) - 4. Package Dimensions (D×E×A)
WLCSP-64(3.4x3.6) · 3.40×3.60mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) - 5. Recommended Land Pattern
IPC-7351B Footprint (64 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (15 figures · Page 1/2)
Showing 1–12 of 15 uncropped original figures for STM32F098
P32 · p32_fig01EXACT PACKAGE
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 7. WLCSP64 package pinout
Figure 7. WLCSP64 package pinout
P109 · p109_fig01EXACT PACKAGE
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 42. WLCSP64 package outline
Figure 42. WLCSP64 package outline
P110 · p110_fig01EXACT PACKAGE
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 43. Recommended footprint for WLCSP64 package
Figure 43. Recommended footprint for WLCSP64 package
P32 · p32_fig021549×1013px
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 8. LQFP48 package pinout 3$ 3$ 3% 3% 3% 3% 3% 3)%227 3% 3% 966 9''    
Figure 8. LQFP48 package pinout 3$ 3$ 3% 3% 3% 3% 3% 3)%227 3% 3% 966 9''    
P32 · p32_fig01P32
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Datasheet Page 32 (p32_fig01)
Datasheet Page 32 (p32_fig01)
P51 · p51_fig011546×1745px
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 13. Power supply scheme
Figure 13. Power supply scheme
P51 · p51_fig01P51
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Datasheet Page 51 (p51_fig01)
Datasheet Page 51 (p51_fig01)
P69 · p69_fig011546×718px
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 17. Typical application with an 8 MHz crystal
Figure 17. Typical application with an 8 MHz crystal
P88 · p88_fig011751×902px
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 26. ADC accuracy characteristics
Figure 26. ADC accuracy characteristics
P88 · p88_fig021546×667px
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 27. Typical connection diagram using the ADC
Figure 27. Typical connection diagram using the ADC
P101 · p101_fig011546×1050px
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 34. Recommended footprint for UFBGA100 package
Figure 34. Recommended footprint for UFBGA100 package
P104 · p104_fig011546×1067px
STM32F098RCY6TR (WLCSP-64(3.4x3.6)) — Figure 37. Recommended footprint for LQFP100 package
Figure 37. Recommended footprint for LQFP100 package
Page 1 / 2 (15 extracted figures)

Technical Specifications & Part Details (STM32F098RCY6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F098RCY6TR (WLCSP-64(3.4x3.6)) is a 64-pin embedded microcontroller unit (mcu) featuring a 3.60 × 3.40 × 0.56 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.65 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.65 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
48 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
32 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
3.60 × 3.40 × 0.56 mm (A1=0.17 mm)
Package family: WLCSP (WLCSP-64(3.4x3.6))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PF11BOOT0 -): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol64 auto-grouped pins
OK
IPC-7351B Land Pattern64 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-64(3.4x3.6))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
3.60 × 3.40 mm
Height (A) & Pitch (e)IPC-7351B
A=0.56mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
64P / 64Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-64(3.4x3.6)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F098RCY6TR (WLCSP-64(3.4x3.6))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F098RCY6TR (WLCSP-64(3.4x3.6))?

Manufactured by ST, the STM32F098RCY6TR is housed in a WLCSP-64(3.4x3.6) package with 64 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.65 V to 3.6 V. Key pins include: A1 (VDDIO2: Power Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))), A2 (PA15: Multiplexed I/O & Peripheral Pin PA15 (UART, SPI, PWM)), A3 (PC10: Multiplexed I/O & Peripheral Pin PC10 (UART)), A4 (PD2: Multiplexed I/O & Peripheral Pin PD2 (UART)), A5 (PB6: Multiplexed I/O & Peripheral Pin PB6 (I2C)), A6 (PB8: Multiplexed I/O & Peripheral Pin PB8 (I2C, CAN)).

What are the IPC-7351B PCB Footprint dimensions for STM32F098RCY6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F098RCY6TR (WLCSP-64(3.4x3.6)) has a nominal body envelope of 3.40 × 3.60 mm, pitch e = 0.40 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F098RCY6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F098RCY6TR (ST, WLCSP-64(3.4x3.6)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & STM32F098 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A2PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSSI2S1WS. Supported peripheral buses: UART, SPI, PWM.
A3PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: UART.
A4PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
A5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: I2C.
A6PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCLCEC. Supported peripheral buses: I2C, CAN.
A7PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
A8PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
B1PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA. Supported peripheral buses: I2C, CAN.
B2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B3PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: UART.
B4PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: UART.
B5PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, I2C.
B6PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSSI2S2WS, I2C1_SDAIROUT. Supported peripheral buses: SPI, I2C, CAN.
B7PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
B8VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C1PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART.
C2PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART.
C3PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
C4PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: UART.
C5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSII2S1SD, I2C1_SMBA. Supported peripheral buses: UART, SPI, I2C, PWM.
C6PF11BOOT0 -Digital_IOSignal terminal PF11BOOT0 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF11BOOT0 -. Supported peripheral buses: General.
C7IOC7Digital_IOGeneral Purpose Digital I/O Pin IOC7
C8PC14 - OSC32_IN (PC14)Digital_IOSignal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK.
D1PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: PWM.
D2PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: UART, RTC/CLK.
D3PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SCL. Supported peripheral buses: I2C, PWM, CAN.
D4PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCKI2S1CK. Supported peripheral buses: UART, SPI.
D5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISOI2S1MCK. Supported peripheral buses: UART, SPI.
D6PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MISOI2S2MCK. Supported peripheral buses: UART, SPI, ADC.
D7NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
D8PF0OSC IN -_ (PF0)Digital_IOSignal terminal PF0OSC IN -_ (PF0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF0OSC IN -_ (PF0). Supported peripheral buses: RTC/CLK.
E1PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: PWM.
E2PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: PWM.
E3PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: PWM.
E4PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSII2S1SD. Supported peripheral buses: SPI, ADC, PWM.
E5PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC.
E6PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MOSII2S2SD. Supported peripheral buses: UART, SPI, ADC.
E7PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: UART, ADC.
E8PF1OSC OUT -_ (PF1)Digital_IOSignal terminal PF1OSC OUT -_ (PF1) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: I2C, RTC/CLK.
F1PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSII2S2SD. Supported peripheral buses: SPI, PWM, RTC/CLK.
F2PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKI2S2CK, I2C2_SCL. Supported peripheral buses: UART, SPI, I2C, PWM.
F3PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM.
F4PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC.
F5PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCKI2S1CK. Supported peripheral buses: UART, SPI, ADC, DAC, PWM.
F6PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, PWM.
F7PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
F8PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: UART, ADC.
G1PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOI2S2MCK, I2C2_SDA. Supported peripheral buses: UART, SPI, I2C, PWM.
G2PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSSI2S2WS. Supported peripheral buses: UART, SPI.
G3PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKI2S2CK, I2C2_SCL. Supported peripheral buses: UART, SPI, I2C.
G4PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: UART, ADC, PWM.
G5PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MISOI2S1MCK. Supported peripheral buses: UART, SPI, ADC, PWM.
G6VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
G7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
G8VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
H1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
H2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
H3PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA. Supported peripheral buses: UART, I2C.
H4NPORDigital_IOSignal terminal NPOR (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: NPOR. Supported peripheral buses: General.
H5PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
H6PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSSI2S1WS. Supported peripheral buses: UART, SPI, ADC, DAC.
H7PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC.
H8VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
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