UFQFPN-32(5x5) · 33P
Synchronized Pinout (Symbol / 2D / 3D) (49/49)
Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D| Pin | Symbol | Type | Function (EN) |
|---|---|---|---|
| A1 | VDD_USB | Power | Power Supply Input (VDD_USB — 3.3V VDD (Max 4.0V)) |
| A2 | PA15 | I/O | Multiplexed I/O & Peripheral Pin PA15 (UART, SPI, PWM) |
| A3 | PB3 | I/O | Multiplexed I/O & Peripheral Pin PB3 (UART, SPI, PWM) |
| A4 | PB5 | I/O | Multiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C) |
| A5 | BOOT0 | I | Input-Only Pin BOOT0 (General) |
| A6 | PB9 | I/O | Multiplexed I/O & Peripheral Pin PB9 (SPI, I2C) |
| A7 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| B1 | PA12 | I/O | Multiplexed I/O & Peripheral Pin PA12 (USB, UART, SPI) |
| B2 | PA14 | I/O | Multiplexed I/O & Peripheral Pin PA14 (UART, SWD/JTAG) |
| B3 | PB4 | I/O | Multiplexed I/O & Peripheral Pin PB4 (UART, SPI, I2C, PWM) |
| B4 | PB6 | I/O | Multiplexed I/O & Peripheral Pin PB6 (UART, I2C) |
| B5 | PB8 | I/O | Multiplexed I/O & Peripheral Pin PB8 (I2C) |
| B6 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| B7 | PC13 | I/O | Multiplexed I/O & Peripheral Pin PC13 (RTC/CLK) |
| C1 | PA10 | I/O | Multiplexed I/O & Peripheral Pin PA10 (UART, I2C) |
| C2 | PA13 | I/O | Multiplexed I/O & Peripheral Pin PA13 (USB, SWD/JTAG) |
| C3 | PB7 | I/O | Multiplexed I/O & Peripheral Pin PB7 (UART, I2C) |
| C4 | PC1 | I/O | Multiplexed I/O & Peripheral Pin PC1 (I2C, ADC) |
| C5 | PC0 | I/O | Multiplexed I/O & Peripheral Pin PC0 (I2C, ADC) |
| C6 | PC14 - OSC32_IN (PC14) | I/O | Multiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK) |
| C7 | IOC7 | I/O | General Purpose Digital I/O Pin IOC7 |
| D1 | PA8 | I/O | Multiplexed I/O & Peripheral Pin PA8 (USB, UART, I2C, RTC/CLK) |
| D2 | PA11 | I/O | Multiplexed I/O & Peripheral Pin PA11 (USB, UART, SPI) |
| D3 | PB1 | I/O | Multiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM) |
| D4 | VSS | GND | Ground Reference Pin (VSS) |
| D5 | NRST | I | System Enable & Hardware Reset (NRST) |
| D6 | PH0OSC IN -_ (PH0) | I/O | Multiplexed I/O & Peripheral Pin PH0OSC IN -_ (PH0) (USB, RTC/CLK) |
| D7 | PH1 - OSC_OUT (PH1) | I/O | Multiplexed I/O & Peripheral Pin PH1 - OSC_OUT (PH1) (RTC/CLK) |
| E1 | PB15 | I/O | Multiplexed I/O & Peripheral Pin PB15 (SPI, RTC/CLK) |
| E2 | PA9 | I/O | Multiplexed I/O & Peripheral Pin PA9 (UART, I2C, RTC/CLK) |
| E3 | PB2 | I/O | Multiplexed I/O & Peripheral Pin PB2 (I2C) |
| E4 | PA1 | I/O | Multiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM) |
| E5 | PA0 | I/O | Multiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK) |
| E6 | VREF+ | Analog | Multiplexed I/O & Peripheral Pin VREF+ (General) |
| E7 | PC2 | I/O | Multiplexed I/O & Peripheral Pin PC2 (SPI, ADC) |
| F1 | PB14 | I/O | Multiplexed I/O & Peripheral Pin PB14 (UART, SPI, I2C, RTC/CLK) |
| F2 | PB13 | I/O | Multiplexed I/O & Peripheral Pin PB13 (UART, SPI, I2C, RTC/CLK) |
| F3 | PB11 | I/O | Multiplexed I/O & Peripheral Pin PB11 (I2C, PWM) |
| F4 | PA7 | I/O | Multiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM) |
| F5 | PA4 | I/O | Multiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC) |
| F6 | PA2 | I/O | Multiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM) |
| F7 | VDDA | Power | Power Supply Input (VDDA — 3.3V VDD (Max 4.0V)) |
| G1 | PB12 | I/O | Multiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C) |
| G2 | VDD | Power | Power Supply Input (VDD — 3.3V VDD (Max 4.0V)) |
| G3 | PB10 | I/O | Multiplexed I/O & Peripheral Pin PB10 (SPI, I2C, PWM) |
| G4 | PB0 | I/O | Multiplexed I/O & Peripheral Pin PB0 (ADC, PWM) |
| G5 | PA6 | I/O | Multiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, PWM) |
| G6 | PA5 | I/O | Multiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM) |
| G7 | PA3 | I/O | Multiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM) |
PIN A1 VDD_USB
PowerPower Supply Input (VDD_USB — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VDD_USB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner
Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 42 Extracted Figures)
Read the original datasheet PDF directly or click any drawing to view fullscreen1. Realistic 3D PackageREPRESENTATIVE
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
True package pinout (49 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
WLCSP-49(3.3x3.3) · 3.30×3.30mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
IPC-7351B Footprint (49 Pads)Expand ›
6. Application SchematicSCHEMATIC
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (42 figures · Page 1/4)
Showing 1–12 of 42 uncropped original figures for STM32L072
P1 · p01_fig01EXACT PACKAGE
P41 · p41_fig01EXACT PACKAGE
P138 · p138_fig01EXACT PACKAGE
P139 · p139_fig01EXACT PACKAGE
P140 · p140_fig01EXACT PACKAGE
P1 · p01_fig02874×395px
P37 · p37_fig011546×1379px
P41 · p41_fig021546×978px
P41 · p41_fig01P41
P61 · p61_fig011751×1623px
P61 · p61_fig021875×770px
P61 · p61_fig01P61
Page 1 / 4 (42 extracted figures)
Technical Specifications & Part Details (STM32L072CBY6TR)
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)Detailed Overview:STM32L072CBY6TR (WLCSP-49(3.3x3.3)) is a 49-pin embedded microcontroller unit (mcu) featuring a 3.30 × 3.30 × 0.56 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.65 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, IrDA, PWM, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.65 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
32 kHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
34 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
3.30 × 3.30 × 0.56 mm (A1=0.17 mm)
Package family: WLCSP (WLCSP-49(3.3x3.3))
Pin Count & Lead PitchN / e
49 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, IrDA, PWM, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.
5-Point Standards Verification
Automated compliance checks prior to exportIEEE-315 Symbol49 auto-grouped pins
IPC-7351B Land Pattern49 pads · Pitch 0.40mm
IPC-7525 60% Solder PasteReflow 1:1 Standard
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
Hardware Verification & Community Engineering Reviews
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet5.00 PCB Verified
IPC-7351B
Select package variant or sibling MPN sharing this datasheetFamily Variants & Same Datasheet Chips — STM32L072 (17)
UFQFPN-32(5x5) · 33P
UFQFPN-32(5x5) · 33P
UFQFPN-32(5x5) · 33P
LQFP-48(7x7) · 48P
LQFP-48(7x7) · 48P
UFQFPN-48(7x7) · 49P
UFQFPN-48(7x7) · 49P
WLCSP-49 · 49P
WLCSP-49 · 49P
WLCSP-49(3.3x3.3) · 49P
LQFP-64(10x10) · 64P
LQFP-64(10x10) · 64P
UFBGA-64 · 64P
UFBGA-64(5x5) · 64P
UFBGA-100 · 100P
UFBGA-100 · 100P
Mechanical Dimensions & Land Pattern (WLCSP-49(3.3x3.3))
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
3.30 × 3.30 mm
Height (A) & Pitch (e)IPC-7351B
A=0.56mm · e=0.40mm
Pad Size (W × L)Level B
0.21 × 0.21 mm
Pins / Total PadsTopology
49P / 49Pad (BGA_GRID)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit WLCSP-49(3.3x3.3) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32L072CBY6TR (WLCSP-49(3.3x3.3))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32L072CBY6TR (WLCSP-49(3.3x3.3))?
Manufactured by ST, the STM32L072CBY6TR is housed in a WLCSP-49(3.3x3.3) package with 49 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.65 V to 3.6 V. Key pins include: A1 (VDD_USB: Power Supply Input (VDD_USB — 3.3V VDD (Max 4.0V))), A2 (PA15: Multiplexed I/O & Peripheral Pin PA15 (UART, SPI, PWM)), A3 (PB3: Multiplexed I/O & Peripheral Pin PB3 (UART, SPI, PWM)), A4 (PB5: Multiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C)), A5 (BOOT0: Input-Only Pin BOOT0 (General)), A6 (PB9: Multiplexed I/O & Peripheral Pin PB9 (SPI, I2C)).
What are the IPC-7351B PCB Footprint dimensions for STM32L072CBY6TR?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32L072CBY6TR (WLCSP-49(3.3x3.3)) has a nominal body envelope of 3.30 × 3.30 mm, pitch e = 0.40 mm, and 49 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32L072CBY6TR?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32L072CBY6TR (ST, WLCSP-49(3.3x3.3)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (49 pins) & STM32L072 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | VDD_USB | Power_In | Primary positive power supply input (VDD_USB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| A2 | PA15 | Digital_IO | Signal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, PWM. |
| A3 | PB3 | Digital_IO | Signal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, PWM. |
| A4 | PB5 | Digital_IO | Signal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, I2C1_SMBA. Supported peripheral buses: UART, SPI, I2C. |
| A5 | BOOT0 | Digital_IO | Signal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General. |
| A6 | PB9 | Digital_IO | Signal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, SPI2_NSS. Supported peripheral buses: SPI, I2C. |
| A7 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| B1 | PA12 | Digital_IO | Signal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, USB_DP. Supported peripheral buses: USB, UART, SPI. |
| B2 | PA14 | Digital_IO | Signal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: UART, SWD/JTAG. |
| B3 | PB4 | Digital_IO | Signal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, I2C3_SDA. Supported peripheral buses: UART, SPI, I2C, PWM. |
| B4 | PB6 | Digital_IO | Signal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C. |
| B5 | PB8 | Digital_IO | Signal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: I2C. |
| B6 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| B7 | PC13 | Digital_IO | Signal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK. |
| C1 | PA10 | Digital_IO | Signal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: UART, I2C. |
| C2 | PA13 | Digital_IO | Signal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: USB, SWD/JTAG. |
| C3 | PB7 | Digital_IO | Signal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: UART, I2C. |
| C4 | PC1 | Digital_IO | Signal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SDA. Supported peripheral buses: I2C, ADC. |
| C5 | PC0 | Digital_IO | Signal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL. Supported peripheral buses: I2C, ADC. |
| C6 | PC14 - OSC32_IN (PC14) | Digital_IO | Signal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK. |
| C7 | IOC7 | Digital_IO | General Purpose Digital I/O Pin IOC7 |
| D1 | PA8 | Digital_IO | Signal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL. Supported peripheral buses: USB, UART, I2C, RTC/CLK. |
| D2 | PA11 | Digital_IO | Signal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, USB_DM. Supported peripheral buses: USB, UART, SPI. |
| D3 | PB1 | Digital_IO | Signal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM. |
| D4 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| D5 | NRST | Digital_IO | Active-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals. |
| D6 | PH0OSC IN -_ (PH0) | Digital_IO | Signal terminal PH0OSC IN -_ (PH0) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH0OSC IN -_ (PH0). Supported peripheral buses: USB, RTC/CLK. |
| D7 | PH1 - OSC_OUT (PH1) | Digital_IO | Signal terminal PH1 - OSC_OUT (PH1) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH1 - OSC_OUT (PH1). Supported peripheral buses: RTC/CLK. |
| E1 | PB15 | Digital_IO | Signal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, RTC/CLK. |
| E2 | PA9 | Digital_IO | Signal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL, I2C3_SMBA. Supported peripheral buses: UART, I2C, RTC/CLK. |
| E3 | PB2 | Digital_IO | Signal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: I2C. |
| E4 | PA1 | Digital_IO | Signal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, PWM. |
| E5 | PA0 | Digital_IO | Signal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK. |
| E6 | VREF+ | Analog | Signal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General. |
| E7 | PC2 | Digital_IO | Signal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, ADC. |
| F1 | PB14 | Digital_IO | Signal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO, I2C2_SDA. Supported peripheral buses: UART, SPI, I2C, RTC/CLK. |
| F2 | PB13 | Digital_IO | Signal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK, I2C2_SCL. Supported peripheral buses: UART, SPI, I2C, RTC/CLK. |
| F3 | PB11 | Digital_IO | Signal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA. Supported peripheral buses: I2C, PWM. |
| F4 | PA7 | Digital_IO | Signal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM. |
| F5 | PA4 | Digital_IO | Signal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, ADC, DAC. |
| F6 | PA2 | Digital_IO | Signal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, PWM. |
| F7 | VDDA | Power_In | Primary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| G1 | PB12 | Digital_IO | Signal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS, I2C2_SMBA. Supported peripheral buses: UART, SPI, I2C. |
| G2 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| G3 | PB10 | Digital_IO | Signal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK, I2C2_SCL. Supported peripheral buses: SPI, I2C, PWM. |
| G4 | PB0 | Digital_IO | Signal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: ADC, PWM. |
| G5 | PA6 | Digital_IO | Signal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC, PWM. |
| G6 | PA5 | Digital_IO | Signal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC, DAC, PWM. |
| G7 | PA3 | Digital_IO | Signal terminal PA3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC, PWM. |