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STM32F042T6Y6TR (WLCSP-36) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F042T6Y6TR

STWLCSP-36 · 36 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F042T6Y6TR (WLCSP-36)A1PA12A2PA15A3PB4A4PB7A5VDDA6PC13B1PA13B2PA14B3PB3B4PB8BOOT0 -B5PF0OSC IN -_B6PC14 - OSC32C1PA10C2PA11C3PA4C4PB6C5PF1OSC OUT -C6IOC6F6PA0F5PA3F4PA7F3PB0F2PB1F1VSSE6PB5E5VDDAE4PA2E3PA6E2PA8E1VDDIO2D6VSSAD5NRSTD4PA1D3PA5D2PB2D1PA9Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.827.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9mm
2. 2D FOOTPRINT
F6F5F4F3F2F1E6E5E4E3E2E1D6D5D4D3D2D1C6C5C4C3C2C1B6B5B4B3B2B1A6A5A4A3A2A1E=2.60mm · Pitch e=0.40mmD=2.70mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 2.60mm × 2.70mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (36/36)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PA12I/OMultiplexed I/O & Peripheral Pin PA12 (USB, I2C, CAN)
A2PA15I/OMultiplexed I/O & Peripheral Pin PA15 (USB, UART, SPI, PWM)
A3PB4I/OMultiplexed I/O & Peripheral Pin PB4 (SPI, PWM)
A4PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C)
A5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A6PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
B1PA13I/OMultiplexed I/O & Peripheral Pin PA13 (USB)
B2PA14I/OMultiplexed I/O & Peripheral Pin PA14 (UART)
B3PB3I/OMultiplexed I/O & Peripheral Pin PB3 (SPI, PWM)
B4PB8BOOT0 -I/OMultiplexed I/O & Peripheral Pin PB8BOOT0 - (I2C, CAN)
B5PF0OSC IN -_ (PF0)I/OMultiplexed I/O & Peripheral Pin PF0OSC IN -_ (PF0) (I2C, RTC/CLK)
B6PC14 - OSC32_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
C1PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, I2C, PWM)
C2PA11I/OMultiplexed I/O & Peripheral Pin PA11 (USB, UART, I2C, PWM, CAN)
C3PA4I/OMultiplexed I/O & Peripheral Pin PA4 (USB, UART, SPI, ADC)
C4PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C)
C5PF1OSC OUT -_ (PF1)I/OMultiplexed I/O & Peripheral Pin PF1OSC OUT -_ (PF1) (I2C, RTC/CLK)
C6IOC6I/OGeneral Purpose Digital I/O Pin IOC6
D1PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, I2C, PWM)
D2PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
D3PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, PWM)
D4PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
D5NRSTISystem Enable & Hardware Reset (NRST)
D6VSSAGNDGround Reference Pin (VSSA)
E1VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
E2PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, PWM, RTC/CLK)
E3PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC, PWM)
E4PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
E5VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
E6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, I2C, PWM)
F1VSSGNDGround Reference Pin (VSS)
F2PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
F3PB0I/OMultiplexed I/O & Peripheral Pin PB0 (ADC, PWM)
F4PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
F5PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
F6PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
PIN A1 PA12
I/O
Multiplexed I/O & Peripheral Pin PA12 (USB, I2C, CAN)
Design note: Alt: CAN_TXUSART1RTS ,_ , TIM1_ETR , TSC_G4IO4_ , EVENTOUT , I2C1_SDA | Add: USB_DP
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F042T6Y6TR (ST · WLCSP-36)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F042T6Y6TR (WLCSP-36) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F042T6Y6TR (WLCSP-36) - 2. Standard Pinout (Top View)
True package pinout (36 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F042T6Y6TR (WLCSP-36) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F042T6Y6TR (WLCSP-36) - 4. Package Dimensions (D×E×A)
WLCSP-36 · 2.60×2.70mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F042T6Y6TR (WLCSP-36) - 5. Recommended Land Pattern
IPC-7351B Footprint (36 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F042T6Y6TR (WLCSP-36) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for STM32F042
P1 · p01_fig01EXACT PACKAGE
STM32F042T6Y6TR (WLCSP-36) — ARM®-based 32-bit MCU, up to 32 KB Flash, crystal-less USB FS 2.0, CAN, 9 timers, ADC and comm. interfaces, 2.0 - 3.6 V | Datasheet - production data | LQFP48 7x7 mm UFQFPN48 7x7 mm WLCSP36 UFQFPN32 5x5 mm UFQFPN28 4x4 mm | TSSOP20 LQFP32 7
ARM®-based 32-bit MCU, up to 32 KB Flash, crystal-less USB FS 2.0, CAN, 9 timers, ADC and comm. interfaces, 2.0 - 3.6 V | Datasheet - production data | LQFP48 7x7 mm UFQFPN48 7x7 mm WLCSP36 UFQFPN32 5x5 mm UFQFPN28 4x4 mm | TSSOP20 LQFP32 7
P29 · p29_fig01EXACT PACKAGE
STM32F042T6Y6TR (WLCSP-36) — Figure 5. WLCSP36 package pinout
Figure 5. WLCSP36 package pinout
P96 · p96_fig01EXACT PACKAGE
STM32F042T6Y6TR (WLCSP-36) — Figure 39. WLCSP36 package outline H ) *
Figure 39. WLCSP36 package outline H ) *
P97 · p97_fig01EXACT PACKAGE
STM32F042T6Y6TR (WLCSP-36) — Figure 40. Recommended pad footprint for WLCSP36 package
Figure 40. Recommended pad footprint for WLCSP36 package
P29 · p29_fig021546×799px
STM32F042T6Y6TR (WLCSP-36) — Figure 6. LQFP32 package pinout
Figure 6. LQFP32 package pinout
P43 · p43_fig011546×1755px
STM32F042T6Y6TR (WLCSP-36) — Figure 13. Power supply scheme
Figure 13. Power supply scheme
P63 · p63_fig011546×718px
STM32F042T6Y6TR (WLCSP-36) — Figure 17. Typical application with an 8 MHz crystal
Figure 17. Typical application with an 8 MHz crystal
P81 · p81_fig011751×902px
STM32F042T6Y6TR (WLCSP-36) — Figure 26. ADC accuracy characteristics
Figure 26. ADC accuracy characteristics
P81 · p81_fig021546×667px
STM32F042T6Y6TR (WLCSP-36) — Figure 27. Typical connection diagram using the ADC
Figure 27. Typical connection diagram using the ADC
P91 · p91_fig011873×1196px
STM32F042T6Y6TR (WLCSP-36) — Figure 34. Recommended footprint for LQFP48 package
Figure 34. Recommended footprint for LQFP48 package
P114 · p114_fig011548×2185px
STM32F042T6Y6TR (WLCSP-36) — 114/117 DocID025832 Rev 5
114/117 DocID025832 Rev 5
P116 · p116_fig011548×1617px
STM32F042T6Y6TR (WLCSP-36) — Figure 29: SPI timing diagram - slave mode and CPHA = 1 enhanced and corrected Section 8: Ordering information: - The name of the section changed from the previous “Part
Figure 29: SPI timing diagram - slave mode and CPHA = 1 enhanced and corrected Section 8: Ordering information: - The name of the section changed from the previous “Part
Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (STM32F042T6Y6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F042T6Y6TR (WLCSP-36) is a 36-pin embedded microcontroller unit (mcu) featuring a 2.70 × 2.60 × 0.55 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 2 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
2 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
48 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
17 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
2.70 × 2.60 × 0.55 mm (A1=0.18 mm)
Package family: WLCSP (WLCSP-36)
Pin Count & Lead PitchN / e
36 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PB8BOOT0 -): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol36 auto-grouped pins
OK
IPC-7351B Land Pattern36 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-36)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
2.70 × 2.60 mm
Height (A) & Pitch (e)IPC-7351B
A=0.55mm · e=0.40mm
Pad Size (W × L)Level B
0.19 × 0.19 mm
Pins / Total PadsTopology
36P / 36Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-36
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F042T6Y6TR (WLCSP-36)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F042T6Y6TR (WLCSP-36)?

Manufactured by ST, the STM32F042T6Y6TR is housed in a WLCSP-36 package with 36 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 2 V to 3.6 V. Key pins include: A1 (PA12: Multiplexed I/O & Peripheral Pin PA12 (USB, I2C, CAN)), A2 (PA15: Multiplexed I/O & Peripheral Pin PA15 (USB, UART, SPI, PWM)), A3 (PB4: Multiplexed I/O & Peripheral Pin PB4 (SPI, PWM)), A4 (PB7: Multiplexed I/O & Peripheral Pin PB7 (UART, I2C)), A5 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A6 (PC13: Multiplexed I/O & Peripheral Pin PC13 (RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for STM32F042T6Y6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F042T6Y6TR (WLCSP-36) has a nominal body envelope of 2.60 × 2.70 mm, pitch e = 0.40 mm, and 36 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F042T6Y6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F042T6Y6TR (ST, WLCSP-36) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (36 pins) & STM32F042 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, USB_DP. Supported peripheral buses: USB, I2C, CAN.
A2PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSSI2S1WS. Supported peripheral buses: USB, UART, SPI, PWM.
A3PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISOI2S1MCK. Supported peripheral buses: SPI, PWM.
A4PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: UART, I2C.
A5VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A6PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
B1PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: USB.
B2PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: UART.
B3PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCKI2S1CK. Supported peripheral buses: SPI, PWM.
B4PB8BOOT0 -Digital_IOSignal terminal PB8BOOT0 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCLCEC. Supported peripheral buses: I2C, CAN.
B5PF0OSC IN -_ (PF0)Digital_IOSignal terminal PF0OSC IN -_ (PF0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: I2C, RTC/CLK.
B6PC14 - OSC32_IN (PC14)Digital_IOSignal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK.
C1PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: UART, I2C, PWM.
C2PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL, USB_DM. Supported peripheral buses: USB, UART, I2C, PWM, CAN.
C3PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSSI2S1WS. Supported peripheral buses: USB, UART, SPI, ADC.
C4PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C.
C5PF1OSC OUT -_ (PF1)Digital_IOSignal terminal PF1OSC OUT -_ (PF1) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: I2C, RTC/CLK.
C6IOC6Digital_IOGeneral Purpose Digital I/O Pin IOC6
D1PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C, PWM.
D2PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
D3PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCKI2S1CK. Supported peripheral buses: SPI, ADC, PWM.
D4PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, PWM.
D5NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
D6VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
E1VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E2PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: UART, PWM, RTC/CLK.
E3PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MISOI2S1MCK. Supported peripheral buses: SPI, ADC, PWM.
E4PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, PWM.
E5VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSII2S1SD, I2C1_SMBA. Supported peripheral buses: SPI, I2C, PWM.
F1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F2PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: ADC, PWM.
F3PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: ADC, PWM.
F4PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSII2S1SD. Supported peripheral buses: SPI, ADC, PWM.
F5PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC, PWM.
F6PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
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