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RP2040 (LQFN-56(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

RP2040

Raspberry PiID: C2040LQFN-56(7x7) · 57 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (1)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · RP2040 (LQFN-56(7x7))1IOVDD2GPIO03GPIO14GPIO25GPIO36GPIO47GPIO58GPIO69GPIO710IOVDD11GPIO812GPIO913GPIO1014GPIO1115GPIO1216GPIO1317GPIO1418GPIO1519TESTEN20XIN21XOUT22IOVDD23DVDD24SWCLK25SWD26RUN27GPIO1628GPIO1729GPIO1857GND56QSPI_SS55QSPI_SD154QSPI_SD253QSPI_SD052QSPI_SCLK51QSPI_SD350DVDD49IOVDD48USB_VDD47USB_DP46USB_DM45VREG_VOUT44VREG_IN43ADC_AVDD42IOVDD41GPIO29_ADC340GPIO28_ADC239GPIO27_ADC138GPIO26_ADC037GPIO2536GPIO2435GPIO2334GPIO2233IOVDD32GPIO2131GPIO2030GPIO19Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.243.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657E=7.00mm · Pitch e=0.40mmD=7.00mm-6-5-4-3-2-101234566543210-1-2-3-4-5-6mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (57/57)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1IOVDDPowerPower Supply Input (IOVDD — 3.3V IOVDD (Max 3.63V))
2GPIO0I/OMultiplexed I/O & Peripheral Pin GPIO0 (UART, SPI, I2C, PWM, PIO)
3GPIO1I/OMultiplexed I/O & Peripheral Pin GPIO1 (UART, SPI, I2C, PWM, PIO)
4GPIO2I/OMultiplexed I/O & Peripheral Pin GPIO2 (UART, SPI, I2C, PWM, PIO)
5GPIO3I/OMultiplexed I/O & Peripheral Pin GPIO3 (UART, SPI, I2C, PWM, PIO)
6GPIO4I/OMultiplexed I/O & Peripheral Pin GPIO4 (UART, SPI, I2C, PWM, PIO)
7GPIO5I/OMultiplexed I/O & Peripheral Pin GPIO5 (UART, SPI, I2C, PWM, PIO)
8GPIO6I/OMultiplexed I/O & Peripheral Pin GPIO6 (UART, SPI, I2C, PWM, PIO)
9GPIO7I/OMultiplexed I/O & Peripheral Pin GPIO7 (UART, SPI, I2C, PWM, PIO)
10IOVDDPowerPower Supply Input (IOVDD — 3.3V IOVDD (Max 3.63V))
11GPIO8I/OMultiplexed I/O & Peripheral Pin GPIO8 (UART, SPI, I2C, PWM, PIO)
12GPIO9I/OMultiplexed I/O & Peripheral Pin GPIO9 (UART, SPI, I2C, PWM, PIO)
13GPIO10I/OMultiplexed I/O & Peripheral Pin GPIO10 (UART, SPI, I2C, PWM, PIO)
14GPIO11I/OMultiplexed I/O & Peripheral Pin GPIO11 (UART, SPI, I2C, PWM, PIO)
15GPIO12I/OMultiplexed I/O & Peripheral Pin GPIO12 (UART, SPI, I2C, PWM, PIO)
16GPIO13I/OMultiplexed I/O & Peripheral Pin GPIO13 (UART, SPI, I2C, PWM, PIO)
17GPIO14I/OMultiplexed I/O & Peripheral Pin GPIO14 (UART, SPI, I2C, PWM, PIO)
18GPIO15I/OMultiplexed I/O & Peripheral Pin GPIO15 (UART, SPI, I2C, PWM, PIO)
19TESTENIInput-Only Pin TESTEN (General)
20XINI/OMultiplexed I/O & Peripheral Pin XIN (RTC/CLK)
21XOUTI/OMultiplexed I/O & Peripheral Pin XOUT (RTC/CLK)
22IOVDDPowerPower Supply Input (IOVDD — 3.3V IOVDD (Max 3.63V))
23DVDDPowerPower Supply Input (DVDD — 1.1V Core DVDD)
24SWCLKI/OMultiplexed I/O & Peripheral Pin SWCLK (SWD/JTAG)
25SWDI/OMultiplexed I/O & Peripheral Pin SWD (General)
26RUNISystem Enable & Hardware Reset (RUN)
27GPIO16I/OMultiplexed I/O & Peripheral Pin GPIO16 (UART, SPI, I2C, PWM, PIO)
28GPIO17I/OMultiplexed I/O & Peripheral Pin GPIO17 (UART, SPI, I2C, PWM, PIO)
29GPIO18I/OMultiplexed I/O & Peripheral Pin GPIO18 (UART, SPI, I2C, PWM, PIO)
30GPIO19I/OMultiplexed I/O & Peripheral Pin GPIO19 (UART, SPI, I2C, PWM, PIO)
31GPIO20I/OMultiplexed I/O & Peripheral Pin GPIO20 (UART, SPI, I2C, PWM, RTC/CLK, PIO)
32GPIO21I/OMultiplexed I/O & Peripheral Pin GPIO21 (UART, SPI, I2C, PWM, RTC/CLK, PIO)
33IOVDDPowerPower Supply Input (IOVDD — 3.3V IOVDD (Max 3.63V))
34GPIO22I/OMultiplexed I/O & Peripheral Pin GPIO22 (UART, SPI, I2C, PWM, RTC/CLK, PIO)
35GPIO23I/OMultiplexed I/O & Peripheral Pin GPIO23 (UART, SPI, I2C, PWM, RTC/CLK, PIO)
36GPIO24I/OMultiplexed I/O & Peripheral Pin GPIO24 (UART, SPI, I2C, PWM, RTC/CLK, PIO)
37GPIO25I/OMultiplexed I/O & Peripheral Pin GPIO25 (UART, SPI, I2C, PWM, RTC/CLK, PIO)
38GPIO26_ADC0I/OMultiplexed I/O & Peripheral Pin GPIO26_ADC0 (ADC)
39GPIO27_ADC1I/OMultiplexed I/O & Peripheral Pin GPIO27_ADC1 (ADC)
40GPIO28_ADC2I/OMultiplexed I/O & Peripheral Pin GPIO28_ADC2 (ADC)
41GPIO29_ADC3I/OMultiplexed I/O & Peripheral Pin GPIO29_ADC3 (ADC)
42IOVDDPowerPower Supply Input (IOVDD — 3.3V IOVDD (Max 3.63V))
43ADC_AVDDPowerPower Supply Input (ADC_AVDD — 3.3V IOVDD (Max 3.63V))
44VREG_INPowerPower Supply Input (VREG_IN — 3.3V IOVDD (Max 3.63V))
45VREG_VOUTPowerRegulated Power Output (VREG_VOUT — 3.3V IOVDD (Max 3.63V))
46USB_DMI/OMultiplexed I/O & Peripheral Pin USB_DM (USB)
47USB_DPI/OMultiplexed I/O & Peripheral Pin USB_DP (USB)
48USB_VDDPowerPower Supply Input (USB_VDD — 3.3V IOVDD (Max 3.63V))
49IOVDDPowerPower Supply Input (IOVDD — 3.3V IOVDD (Max 3.63V))
50DVDDPowerPower Supply Input (DVDD — 1.1V Core DVDD)
51QSPI_SD3I/OMultiplexed I/O & Peripheral Pin QSPI_SD3 (SPI)
52QSPI_SCLKI/OMultiplexed I/O & Peripheral Pin QSPI_SCLK (SPI, I2C)
53QSPI_SD0I/OMultiplexed I/O & Peripheral Pin QSPI_SD0 (SPI)
54QSPI_SD2I/OMultiplexed I/O & Peripheral Pin QSPI_SD2 (SPI)
55QSPI_SD1I/OMultiplexed I/O & Peripheral Pin QSPI_SD1 (SPI)
56QSPI_SSI/OMultiplexed I/O & Peripheral Pin QSPI_SS (SPI)
57GNDGNDExposed Thermal & Ground Pad (GND)
PIN 1 IOVDD
Power
Power Supply Input (IOVDD — 3.3V IOVDD (Max 3.63V))
Design note: Primary positive power supply input (IOVDD) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 29 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: RP2040 (Raspberry Pi · LQFN-56(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
RP2040 (LQFN-56(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
RP2040 (LQFN-56(7x7)) - 2. Standard Pinout (Top View)
True package pinout (57 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
RP2040 (LQFN-56(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
RP2040 (LQFN-56(7x7)) - 4. Package Dimensions (D×E×A)
LQFN-56(7x7) · 7.00×7.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
RP2040 (LQFN-56(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (57 Pads)Expand ›
6. Application SchematicSCHEMATIC
RP2040 (LQFN-56(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (29 figures · Page 1/3)
Showing 1–12 of 29 uncropped original figures for RP2040
P13 · p13_fig01EXACT PACKAGE
RP2040 (LQFN-56(7x7)) — Figure 3. RP2040 Pinout for QFN-56 7x7mm (reduced ePad size)
Figure 3. RP2040 Pinout for QFN-56 7x7mm (reduced ePad size)
P627 · p627_fig01EXACT PACKAGE
RP2040 (LQFN-56(7x7)) — Figure 164. Top down view (left, top) and side view (right, top), along with bottom view (left, bottom) of the RP2040 QFN-56
Figure 164. Top down view (left, top) and side view (right, top), along with bottom view (left, bottom) of the RP2040 QFN-56
P628 · p628_fig01EXACT PACKAGE
RP2040 (LQFN-56(7x7)) — Figure 165. Recommended PCB Footprint for the RP2040 QFN-56 package
Figure 165. Recommended PCB Footprint for the RP2040 QFN-56 package
P629 · p629_fig01EXACT PACKAGE
RP2040 (LQFN-56(7x7)) — Figure 166. RP2040 QFN-56 package pinout
Figure 166. RP2040 QFN-56 package pinout
P1 · p01_fig011271×665px
RP2040 (LQFN-56(7x7)) — RP2040 Datasheet A microcontroller by Raspberry P1
RP2040 Datasheet A microcontroller by Raspberry P1
P12 · p12_fig012491×1826px
RP2040 (LQFN-56(7x7)) — Figure 2. A system overview of the RP2040 chip
Figure 2. A system overview of the RP2040 chip
P12 · p12_fig01P12
RP2040 (LQFN-56(7x7)) — Datasheet Page 12 (p12_fig01)
Datasheet Page 12 (p12_fig01)
P13 · p13_fig01P13
RP2040 (LQFN-56(7x7)) — Datasheet Page 13 (p13_fig01)
Datasheet Page 13 (p13_fig01)
P14 · p14_fig01P14
RP2040 (LQFN-56(7x7)) — Datasheet Page 14 (p14_fig01)
Datasheet Page 14 (p14_fig01)
P15 · p15_fig012491×1053px
RP2040 (LQFN-56(7x7)) — Table 3. GPIO bank 0
Table 3. GPIO bank 0
P179 · p179_fig01P179
RP2040 (LQFN-56(7x7)) — Datasheet Page 179 (p179_fig01)
Datasheet Page 179 (p179_fig01)
P181 · p181_fig011784×1573px
RP2040 (LQFN-56(7x7)) — Figure 16. powering the chip from a single 3.3V supply (simplified diagram omitting decoupling components)
Figure 16. powering the chip from a single 3.3V supply (simplified diagram omitting decoupling components)
Page 1 / 3 (29 extracted figures)

Technical Specifications & Part Details (RP2040)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:RP2040 (LQFN-56(7x7)) is a 56-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 0.90 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated ADC, PIO, RTC/CLK, SWD/JTAG, USB, I2C, PWM, SPI, UART interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
Dual Cortex-M0+ 133 MHz (XOSC 12 MHz)
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.90 mm (A1=0.00 mm)
Package family: QFN (LQFN-56(7x7))
Pin Count & Lead PitchN / e
56 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
ADC, PIO, RTC/CLK, SWD/JTAG, USB, I2C, PWM, SPI, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol57 auto-grouped pins
OK
IPC-7351B Land Pattern57 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteEPAD 3.20×3.20mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.01 PCB Verified

Mechanical Dimensions & Land Pattern (LQFN-56(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.90mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.88 mm
Pins / Total PadsTopology
57P / 57Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
C1..C6
BOM
6× 100nF 16V X7R
0402
Decoupling caps for 6× IOVDD pins (Pins 1, 10, 22, 33, 42, 49) — place < 1.5mm along QFN-56 perimeter.
C7, C8
BOM
2× 1µF 6.3V X5R
0402 / 0603
Internal regulator caps for VREG_IN (Pin 44) & VREG_VOUT 1.1V (Pin 45) — required for 1.1V core stability.
C9, C10
BOM
2× 100nF 16V X7R
0402
Internal regulator caps for VREG_IN (Pin 44) & VREG_VOUT 1.1V (Pin 45) — required for 1.1V core stability.
R1, R2
BOM
2× 27Ω ±1%
0402
Series termination resistors on USB_DM / USB_DP (Pins 46, 47) — MUST place < 2mm from pins.
RP2350A (QFN-60)
Raspberry Pi
LQFN-56(7x7) AlternativePackage change (Cortex-M33 / RISC-V upgrade) — requires QFN-60 footprint redesign.

Technical Frequently Asked Questions (FAQ) — RP2040 (LQFN-56(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of RP2040 (LQFN-56(7x7))?

Manufactured by Raspberry Pi, the RP2040 is housed in a LQFN-56(7x7) package with 57 pins and a 0.40 mm lead pitch. Key pins include: 1 (IOVDD: Power Supply Input (IOVDD — 3.3V IOVDD (Max 3.63V))), 2 (GPIO0: Multiplexed I/O & Peripheral Pin GPIO0 (UART, SPI, I2C, PWM, PIO)), 3 (GPIO1: Multiplexed I/O & Peripheral Pin GPIO1 (UART, SPI, I2C, PWM, PIO)), 4 (GPIO2: Multiplexed I/O & Peripheral Pin GPIO2 (UART, SPI, I2C, PWM, PIO)), 5 (GPIO3: Multiplexed I/O & Peripheral Pin GPIO3 (UART, SPI, I2C, PWM, PIO)), 6 (GPIO4: Multiplexed I/O & Peripheral Pin GPIO4 (UART, SPI, I2C, PWM, PIO)).

What are the IPC-7351B PCB Footprint dimensions for RP2040?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), RP2040 (LQFN-56(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.40 mm, and 57 copper pads plus a central exposed thermal pad (EPAD) of 3.20 × 3.20 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for RP2040?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for RP2040 (Raspberry Pi, LQFN-56(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (57 pins) & RP2040 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1IOVDDPower_InPrimary positive power supply input (IOVDD) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
2GPIO0Digital_IOSignal terminal GPIO0 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_RX, UART0_TX, I2C0_SDA, PWM0_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
3GPIO1Digital_IOSignal terminal GPIO1 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_CSn, UART0_RX, I2C0_SCL, PWM0_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
4GPIO2Digital_IOSignal terminal GPIO2 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_SCK, UART0_CTS, I2C1_SDA, PWM1_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
5GPIO3Digital_IOSignal terminal GPIO3 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_TX, UART0_RTS, I2C1_SCL, PWM1_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
6GPIO4Digital_IOSignal terminal GPIO4 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_RX, UART1_TX, I2C0_SDA, PWM2_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
7GPIO5Digital_IOSignal terminal GPIO5 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_CSn, UART1_RX, I2C0_SCL, PWM2_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
8GPIO6Digital_IOSignal terminal GPIO6 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_SCK, UART1_CTS, I2C1_SDA, PWM3_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
9GPIO7Digital_IOSignal terminal GPIO7 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_TX, UART1_RTS, I2C1_SCL, PWM3_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
10IOVDDPower_InPrimary positive power supply input (IOVDD) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
11GPIO8Digital_IOSignal terminal GPIO8 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_RX, UART1_TX, I2C0_SDA, PWM4_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
12GPIO9Digital_IOSignal terminal GPIO9 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_CSn, UART1_RX, I2C0_SCL, PWM4_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
13GPIO10Digital_IOSignal terminal GPIO10 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_SCK, UART1_CTS, I2C1_SDA, PWM5_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
14GPIO11Digital_IOSignal terminal GPIO11 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_TX, UART1_RTS, I2C1_SCL, PWM5_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
15GPIO12Digital_IOSignal terminal GPIO12 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_RX, UART0_TX, I2C0_SDA, PWM6_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
16GPIO13Digital_IOSignal terminal GPIO13 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_CSn, UART0_RX, I2C0_SCL, PWM6_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
17GPIO14Digital_IOSignal terminal GPIO14 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_SCK, UART0_CTS, I2C1_SDA, PWM7_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
18GPIO15Digital_IOSignal terminal GPIO15 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_TX, UART0_RTS, I2C1_SCL, PWM7_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
19TESTENDigital_IOSignal terminal TESTEN (I, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: TESTEN. Supported peripheral buses: General.
20XINDigital_IOSignal terminal XIN (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: XIN. Supported peripheral buses: RTC/CLK.
21XOUTDigital_IOSignal terminal XOUT (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: XOUT. Supported peripheral buses: RTC/CLK.
22IOVDDPower_InPrimary positive power supply input (IOVDD) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
23DVDDPower_InPrimary positive power supply input (DVDD) operating in the 1.1V Core DVDD domain (Max rating: 1.21V).
24SWCLKDigital_IOSignal terminal SWCLK (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SWCLK. Supported peripheral buses: SWD/JTAG.
25SWDDigital_IOSignal terminal SWD (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SWD. Supported peripheral buses: General.
26RUNDigital_IOActive-low hardware reset terminal (RUN): pulling this pin Low resets the processor core and peripherals.
27GPIO16Digital_IOSignal terminal GPIO16 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_RX, UART0_TX, I2C0_SDA, PWM0_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
28GPIO17Digital_IOSignal terminal GPIO17 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_CSn, UART0_RX, I2C0_SCL, PWM0_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
29GPIO18Digital_IOSignal terminal GPIO18 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_SCK, UART0_CTS, I2C1_SDA, PWM1_A, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
30GPIO19Digital_IOSignal terminal GPIO19 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_TX, UART0_RTS, I2C1_SCL, PWM1_B, PIO0, PIO1. Supported peripheral buses: UART, SPI, I2C, PWM, PIO.
31GPIO20Digital_IOSignal terminal GPIO20 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_RX, UART1_TX, I2C0_SDA, PWM2_A, CLOCK_GPIN0, PIO0. Supported peripheral buses: UART, SPI, I2C, PWM, RTC/CLK, PIO.
32GPIO21Digital_IOSignal terminal GPIO21 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_CSn, UART1_RX, I2C0_SCL, PWM2_B, CLOCK_GPOUT0, PIO0. Supported peripheral buses: UART, SPI, I2C, PWM, RTC/CLK, PIO.
33IOVDDPower_InPrimary positive power supply input (IOVDD) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
34GPIO22Digital_IOSignal terminal GPIO22 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_SCK, UART1_CTS, I2C1_SDA, PWM3_A, CLOCK_GPIN1, PIO0. Supported peripheral buses: UART, SPI, I2C, PWM, RTC/CLK, PIO.
35GPIO23Digital_IOSignal terminal GPIO23 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI0_TX, UART1_RTS, I2C1_SCL, PWM3_B, CLOCK_GPOUT1, PIO0. Supported peripheral buses: UART, SPI, I2C, PWM, RTC/CLK, PIO.
36GPIO24Digital_IOSignal terminal GPIO24 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_RX, UART1_TX, I2C0_SDA, PWM4_A, CLOCK_GPOUT2, PIO0. Supported peripheral buses: UART, SPI, I2C, PWM, RTC/CLK, PIO.
37GPIO25Digital_IOSignal terminal GPIO25 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: SPI1_CSn, UART1_RX, I2C0_SCL, PWM4_B, CLOCK_GPOUT3, PIO0. Supported peripheral buses: UART, SPI, I2C, PWM, RTC/CLK, PIO.
38GPIO26_ADC0Digital_IOSignal terminal GPIO26_ADC0 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: GPIO26_ADC0. Supported peripheral buses: ADC.
39GPIO27_ADC1Digital_IOSignal terminal GPIO27_ADC1 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: GPIO27_ADC1. Supported peripheral buses: ADC.
40GPIO28_ADC2Digital_IOSignal terminal GPIO28_ADC2 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: GPIO28_ADC2. Supported peripheral buses: ADC.
41GPIO29_ADC3Digital_IOSignal terminal GPIO29_ADC3 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: GPIO29_ADC3. Supported peripheral buses: ADC.
42IOVDDPower_InPrimary positive power supply input (IOVDD) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
43ADC_AVDDPower_InPrimary positive power supply input (ADC_AVDD) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
44VREG_INPower_InPrimary positive power supply input (VREG_IN) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
45VREG_VOUTPower_OutRegulated power output rail (VREG_VOUT) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
46USB_DMDigital_IOSignal terminal USB_DM (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: USB_DM. Supported peripheral buses: USB.
47USB_DPDigital_IOSignal terminal USB_DP (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: USB_DP. Supported peripheral buses: USB.
48USB_VDDPower_InPrimary positive power supply input (USB_VDD) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
49IOVDDPower_InPrimary positive power supply input (IOVDD) operating in the 3.3V IOVDD (Max 3.63V) domain (Max rating: 3.63V).
50DVDDPower_InPrimary positive power supply input (DVDD) operating in the 1.1V Core DVDD domain (Max rating: 1.21V).
51QSPI_SD3Digital_IOSignal terminal QSPI_SD3 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: QSPI_SD3. Supported peripheral buses: SPI.
52QSPI_SCLKDigital_IOSignal terminal QSPI_SCLK (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: QSPI_SCLK. Supported peripheral buses: SPI, I2C.
53QSPI_SD0Digital_IOSignal terminal QSPI_SD0 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: QSPI_SD0. Supported peripheral buses: SPI.
54QSPI_SD2Digital_IOSignal terminal QSPI_SD2 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: QSPI_SD2. Supported peripheral buses: SPI.
55QSPI_SD1Digital_IOSignal terminal QSPI_SD1 (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: QSPI_SD1. Supported peripheral buses: SPI.
56QSPI_SSDigital_IOSignal terminal QSPI_SS (I/O, 3.3V IOVDD (Max 3.63V) domain). Multiplexed alternate functions: QSPI_SS. Supported peripheral buses: SPI.
57GNDGNDBottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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