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DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — Symbol, Footprint IPC-7351B & 3D STEP Model

DSPIC33CK128MC503T-I/M5

MICROCHIPID: C20291223UQFN-36(5x5) · 37 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5))1Internal2Internal3MCLR#4AN12/RP48/RC5IO26Internal7Internal8DACOUT/AN3/C9OA3OUT/AN4/I10AVDD11Internal12Internal13Internal14VDD15VSS16IO1817OSCI/CLKI/AN18OSCO/CLKO/AN19IO2037PortPinRB536PortPinRB435PortPinRB334PortPinRB233PortPinRB132PortPinRB031VSS30RP53/RC529RP52/RC428IO3327IO4726TDO/AN2/RP3925PGC3/RP38/RB24PGD3/RP37/RB23VDD22VSS21PGC2/OA2IN+/20IO9Grid Pitch = 2.54mm (IEEE-315)-20.3-15.2-10.2-5.105.110.215.220.330.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829303132333435363737373737E=5.00mm · Pitch e=0.40mmD=5.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 5.00mm × 5.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (37/37)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1InternalI/OMultiplexed I/O & Peripheral Pin Internal (General)
2InternalI/OMultiplexed I/O & Peripheral Pin Internal (General)
3MCLR#I/OMultiplexed I/O & Peripheral Pin MCLR# (General)
4AN12/RP48/RC0I/OMultiplexed I/O & Peripheral Pin AN12/RP48/RC0 (General)
5IO2I/OGPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1
6InternalI/OMultiplexed I/O & Peripheral Pin Internal (General)
7InternalI/OMultiplexed I/O & Peripheral Pin Internal (General)
8DACOUT/AN3/CMP1C/RA3I/OMultiplexed I/O & Peripheral Pin DACOUT/AN3/CMP1C/RA3 (DAC)
9OA3OUT/AN4/IBIAS3/RA4I/OMultiplexed I/O & Peripheral Pin OA3OUT/AN4/IBIAS3/RA4 (General)
10AVDDPowerPower Supply Input (AVDD — 3V to 3.6V)
11InternalI/OMultiplexed I/O & Peripheral Pin Internal (PWM)
12InternalI/OMultiplexed I/O & Peripheral Pin Internal (PWM)
13InternalI/OMultiplexed I/O & Peripheral Pin Internal (PWM)
14VDDPowerPower Supply Input (VDD — 3V to 3.6V)
15VSSGNDGround Reference Pin (VSS)
16IO18I/OGPIO18 / RTC_GPIO18 / U1RXD / ADC2_CH7 / CLK_OUT3
17OSCI/CLKI/AN5/RP32/RB0I/OMultiplexed I/O & Peripheral Pin OSCI/CLKI/AN5/RP32/RB0 (RTC/CLK)
18OSCO/CLKO/AN6/RP33/RB1I/OMultiplexed I/O & Peripheral Pin OSCO/CLKO/AN6/RP33/RB1 (RTC/CLK)
19IO20I/OGPIO20 / RTC_GPIO20 / USB_D+ / U1CTS / ADC2_CH9
20IO9I/OGPIO9 / RTC_GPIO9 / TOUCH9 / ADC1_CH8 / FSPIHD
21PGC2/OA2IN+/RP36/RB4I/OMultiplexed I/O & Peripheral Pin PGC2/OA2IN+/RP36/RB4 (General)
22VSSGNDGround Reference Pin (VSS)
23VDDPowerPower Supply Input (VDD — 3V to 3.6V)
24PGD3/RP37/RB5I/OMultiplexed I/O & Peripheral Pin PGD3/RP37/RB5 (General)
25PGC3/RP38/RB6I/OMultiplexed I/O & Peripheral Pin PGC3/RP38/RB6 (General)
26TDO/AN2/RP39/RB7I/OMultiplexed I/O & Peripheral Pin TDO/AN2/RP39/RB7 (General)
27IO47I/OGPIO47 / SPICLK_P_DIFF / SUBSPICLK_P_DIFF
28IO33I/OGPIO33 / FSPIHD / SUBSPIHD / SPIIO4
29RP52/RC4I/OMultiplexed I/O & Peripheral Pin RP52/RC4 (General)
30RP53/RC5I/OMultiplexed I/O & Peripheral Pin RP53/RC5 (General)
31VSSGNDGround Reference Pin (VSS)
32PortPinRB0I/OMultiplexed I/O & Peripheral Pin PortPinRB0 (General)
33PortPinRB1I/OMultiplexed I/O & Peripheral Pin PortPinRB1 (General)
34PortPinRB2I/OMultiplexed I/O & Peripheral Pin PortPinRB2 (General)
35PortPinRB3I/OMultiplexed I/O & Peripheral Pin PortPinRB3 (General)
36PortPinRB4I/OMultiplexed I/O & Peripheral Pin PortPinRB4 (General)
37PortPinRB5I/OMultiplexed I/O & Peripheral Pin PortPinRB5 (General)
PIN 1 Internal
I/O
Multiplexed I/O & Peripheral Pin Internal (General)
Design note: Comparator1
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 11 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: DSPIC33CK128MC503T-I/M5 (MICROCHIP · UQFN-36(5x5))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) - 2. Standard Pinout (Top View)
True package pinout (37 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) - 4. Package Dimensions (D×E×A)
UQFN-36(5x5) · 5.00×5.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) - 5. Recommended Land Pattern
IPC-7351B Footprint (41 Pads)Expand ›
6. Application SchematicSCHEMATIC
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (11 figures · Page 1/1)
Showing 1–11 of 11 uncropped original figures for DSPIC33CK128
P1 · p01_fig011756×286px
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — 16-Bit Digital Signal Controllers with High-Speed PWM and
16-Bit Digital Signal Controllers with High-Speed PWM and
P35 · p35_fig011692×883px
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — Figure 2-3. Suggested Placement of the Oscillator Circuit
Figure 2-3. Suggested Placement of the Oscillator Circuit
P35 · p35_fig02513×650px
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — (tied to ground)
(tied to ground)
P35 · p35_fig03580×850px
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — Bottom Layer
Bottom Layer
P108 · p108_fig011295×728px
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — Figure 5-1. Addressing for Table Registers
Figure 5-1. Addressing for Table Registers
P918 · p918_fig011787×2008px
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — Table 32-3. Thermal Operating Conditions | Rating Symbol Min. Max. Unit | Industrial Temperature Devices | Operating Junction Temperature Range TJ -40 +125 °C | Operating Ambient Temperature Range TA -40 +85 °C | Extended Temperature Device
Table 32-3. Thermal Operating Conditions | Rating Symbol Min. Max. Unit | Industrial Temperature Devices | Operating Junction Temperature Range TJ -40 +125 °C | Operating Ambient Temperature Range TA -40 +85 °C | Extended Temperature Device
P918 · p918_fig01P918
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — Datasheet Page 918 (p918_fig01)
Datasheet Page 918 (p918_fig01)
P947 · p947_fig011968×2302px
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — dsPIC33CK256MC506 Family High-Temperature Electrical Characteristics
dsPIC33CK256MC506 Family High-Temperature Electrical Characteristics
P960 · p960_fig011147×971px
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — RECOMMENDED LAND PATTERN
RECOMMENDED LAND PATTERN
P966 · p966_fig011187×1316px
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — Contact Pad Length (X36 Contact Pad Width (X36)
Contact Pad Length (X36 Contact Pad Width (X36)
P966 · p966_fig01P966
DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) — Datasheet Page 966 (p966_fig01)
Datasheet Page 966 (p966_fig01)

Technical Specifications & Part Details (DSPIC33CK128MC503T-I/M5)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) is a 36-pin standard electronic & interconnect component featuring a 5.00 × 5.00 × 0.60 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 3V to 3.6V supply operation across -40°C to +125°C with integrated SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to +125°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
8 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
5.00 × 5.00 × 0.60 mm (A1=0.03 mm)
Package family: QFN (UQFN-36(5x5))
Pin Count & Lead PitchN / e
36 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol37 auto-grouped pins
OK
IPC-7351B Land Pattern41 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteEPAD 3.70×3.70mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UQFN-36(5x5))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
5.00 × 5.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.60mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.80 mm
Pins / Total PadsTopology
37P / 41Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UQFN-36(5x5)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5))?

Manufactured by MICROCHIP, the DSPIC33CK128MC503T-I/M5 is housed in a UQFN-36(5x5) package with 37 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 3V to 3.6V. Key pins include: 1 (Internal: Multiplexed I/O & Peripheral Pin Internal (General)), 2 (Internal: Multiplexed I/O & Peripheral Pin Internal (General)), 3 (MCLR#: Multiplexed I/O & Peripheral Pin MCLR# (General)), 4 (AN12/RP48/RC0: Multiplexed I/O & Peripheral Pin AN12/RP48/RC0 (General)), 5 (IO2: GPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1), 6 (Internal: Multiplexed I/O & Peripheral Pin Internal (General)).

What are the IPC-7351B PCB Footprint dimensions for DSPIC33CK128MC503T-I/M5?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), DSPIC33CK128MC503T-I/M5 (UQFN-36(5x5)) has a nominal body envelope of 5.00 × 5.00 mm, pitch e = 0.40 mm, and 41 copper pads plus a central exposed thermal pad (EPAD) of 3.70 × 3.70 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for DSPIC33CK128MC503T-I/M5?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for DSPIC33CK128MC503T-I/M5 (MICROCHIP, UQFN-36(5x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (37 pins) & DSPIC33CK128 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1InternalDigital_IOSignal terminal Internal (I/O, 3V to 3.6V domain). Multiplexed alternate functions: Internal. Supported peripheral buses: General.
2InternalDigital_IOSignal terminal Internal (I/O, 3V to 3.6V domain). Multiplexed alternate functions: Internal. Supported peripheral buses: General.
3MCLR#Digital_IOSignal terminal MCLR# (I/O, 3V to 3.6V domain). Multiplexed alternate functions: MCLR#. Supported peripheral buses: General.
4AN12/RP48/RC0Digital_IOSignal terminal AN12/RP48/RC0 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: AN12/RP48/RC0. Supported peripheral buses: General.
5IO2Digital_IOGPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1
6InternalDigital_IOSignal terminal Internal (I/O, 3V to 3.6V domain). Multiplexed alternate functions: Internal. Supported peripheral buses: General.
7InternalDigital_IOSignal terminal Internal (I/O, 3V to 3.6V domain). Multiplexed alternate functions: Internal. Supported peripheral buses: General.
8DACOUT/AN3/CMP1C/RA3AnalogSignal terminal DACOUT/AN3/CMP1C/RA3 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: DACOUT/AN3/CMP1C/RA3. Supported peripheral buses: DAC.
9OA3OUT/AN4/IBIAS3/RA4Digital_IOSignal terminal OA3OUT/AN4/IBIAS3/RA4 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: OA3OUT/AN4/IBIAS3/RA4. Supported peripheral buses: General.
10AVDDPower_InPrimary positive power supply input (AVDD) operating in the 3V to 3.6V domain (Max rating: 3.6V).
11InternalDigital_IOSignal terminal Internal (I/O, 3V to 3.6V domain). Multiplexed alternate functions: Internal. Supported peripheral buses: PWM.
12InternalDigital_IOSignal terminal Internal (I/O, 3V to 3.6V domain). Multiplexed alternate functions: Internal. Supported peripheral buses: PWM.
13InternalDigital_IOSignal terminal Internal (I/O, 3V to 3.6V domain). Multiplexed alternate functions: Internal. Supported peripheral buses: PWM.
14VDDPower_InPrimary positive power supply input (VDD) operating in the 3V to 3.6V domain (Max rating: 3.6V).
15VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
16IO18Digital_IOGPIO18 / RTC_GPIO18 / U1RXD / ADC2_CH7 / CLK_OUT3
17OSCI/CLKI/AN5/RP32/RB0Digital_IOSignal terminal OSCI/CLKI/AN5/RP32/RB0 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: OSCI/CLKI/AN5/RP32/RB0. Supported peripheral buses: RTC/CLK.
18OSCO/CLKO/AN6/RP33/RB1Digital_IOSignal terminal OSCO/CLKO/AN6/RP33/RB1 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: OSCO/CLKO/AN6/RP33/RB1. Supported peripheral buses: RTC/CLK.
19IO20Digital_IOGPIO20 / RTC_GPIO20 / USB_D+ / U1CTS / ADC2_CH9
20IO9Digital_IOGPIO9 / RTC_GPIO9 / TOUCH9 / ADC1_CH8 / FSPIHD
21PGC2/OA2IN+/RP36/RB4Digital_IOSignal terminal PGC2/OA2IN+/RP36/RB4 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PGC2/OA2IN+/RP36/RB4. Supported peripheral buses: General.
22VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
23VDDPower_InPrimary positive power supply input (VDD) operating in the 3V to 3.6V domain (Max rating: 3.6V).
24PGD3/RP37/RB5Digital_IOSignal terminal PGD3/RP37/RB5 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PGD3/RP37/RB5. Supported peripheral buses: General.
25PGC3/RP38/RB6Digital_IOSignal terminal PGC3/RP38/RB6 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PGC3/RP38/RB6. Supported peripheral buses: General.
26TDO/AN2/RP39/RB7Digital_IOSignal terminal TDO/AN2/RP39/RB7 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: TDO/AN2/RP39/RB7. Supported peripheral buses: General.
27IO47Digital_IOGPIO47 / SPICLK_P_DIFF / SUBSPICLK_P_DIFF
28IO33Digital_IOGPIO33 / FSPIHD / SUBSPIHD / SPIIO4
29RP52/RC4Digital_IOSignal terminal RP52/RC4 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RP52/RC4. Supported peripheral buses: General.
30RP53/RC5Digital_IOSignal terminal RP53/RC5 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RP53/RC5. Supported peripheral buses: General.
31VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
32PortPinRB0Digital_IOSignal terminal PortPinRB0 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PortPinRB0. Supported peripheral buses: General.
33PortPinRB1Digital_IOSignal terminal PortPinRB1 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PortPinRB1. Supported peripheral buses: General.
34PortPinRB2Digital_IOSignal terminal PortPinRB2 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PortPinRB2. Supported peripheral buses: General.
35PortPinRB3Digital_IOSignal terminal PortPinRB3 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PortPinRB3. Supported peripheral buses: General.
36PortPinRB4Digital_IOSignal terminal PortPinRB4 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PortPinRB4. Supported peripheral buses: General.
37PortPinRB5Digital_IOSignal terminal PortPinRB5 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PortPinRB5. Supported peripheral buses: General.
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