| Pin | Symbol | Type | Function (EN) |
|---|---|---|---|
| 1 | A0 | I/O | Multiplexed I/O & Peripheral Pin A0 (General) |
| 2 | A1 | I/O | Multiplexed I/O & Peripheral Pin A1 (General) |
| 3 | A2 | I/O | Multiplexed I/O & Peripheral Pin A2 (General) |
| 4 | GND | GND | Ground Reference Pin (GND) |
| 5 | SDA | I/O | Multiplexed I/O & Peripheral Pin SDA (I2C) |
| 6 | SCL | I/O | Multiplexed I/O & Peripheral Pin SCL (I2C) |
| 7 | WP | I/O | Multiplexed I/O & Peripheral Pin WP (General) |
| 8 | VCC | Power | Power Supply Input (VCC — 4.5V to 5.5V) |
AT24C04 / AT24C16N (SOIC-8)
| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit DIP-8 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Manufactured by MICROCHIP, the AT24C04-10PC-2.7 is housed in a DIP-8 package with 8 pins and a 2.54 mm lead pitch, supporting a VCC supply range of 4.5V to 5.5V. Key pins include: 1 (A0: Multiplexed I/O & Peripheral Pin A0 (General)), 2 (A1: Multiplexed I/O & Peripheral Pin A1 (General)), 3 (A2: Multiplexed I/O & Peripheral Pin A2 (General)), 4 (GND: Ground Reference Pin (GND)), 5 (SDA: Multiplexed I/O & Peripheral Pin SDA (I2C)), 6 (SCL: Multiplexed I/O & Peripheral Pin SCL (I2C)).
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), AT24C04-10PC-2.7 (DIP-8) has a nominal body envelope of 6.35 × 9.62 mm, pitch e = 2.54 mm, and 8 copper pads.
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for AT24C04-10PC-2.7 (MICROCHIP, DIP-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | A0 | Digital_IO | Signal terminal A0 (I/O, 4.5V to 5.5V domain). Multiplexed alternate functions: A0. Supported peripheral buses: General. |
| 2 | A1 | Digital_IO | Signal terminal A1 (I/O, 4.5V to 5.5V domain). Multiplexed alternate functions: A1. Supported peripheral buses: General. |
| 3 | A2 | Digital_IO | Signal terminal A2 (I/O, 4.5V to 5.5V domain). Multiplexed alternate functions: A2. Supported peripheral buses: General. |
| 4 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 5 | SDA | Digital_IO | Signal terminal SDA (I/O, 4.5V to 5.5V domain). Multiplexed alternate functions: SDA. Supported peripheral buses: I2C. |
| 6 | SCL | Digital_IO | Signal terminal SCL (I/O, 4.5V to 5.5V domain). Multiplexed alternate functions: SCL. Supported peripheral buses: I2C. |
| 7 | WP | Digital_IO | Signal terminal WP (I/O, 4.5V to 5.5V domain). Multiplexed alternate functions: WP. Supported peripheral buses: General. |
| 8 | VCC | Power_In | Primary positive power supply input (VCC) operating in the 4.5V to 5.5V domain (Max rating: 5.5V). |