ATSAMC20J18A-AUT (TQFP-64(10x10)) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of ATSAMC20J18A-AUT (TQFP-64(10x10))?

Manufactured by MICROCHIP, the ATSAMC20J18A-AUT is housed in a TQFP-64(10x10) package with 64 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.7V – 5.5V. Key pins include: 1 (64pins: Multiplexed I/O & Peripheral Pin 64pins (General)), 2 (PA01: Multiplexed I/O & Peripheral Pin PA01 (General)), 3 (PA02: Multiplexed I/O & Peripheral Pin PA02 (General)), 4 (PA03: Multiplexed I/O & Peripheral Pin PA03 (General)), 5 (PB04: Multiplexed I/O & Peripheral Pin PB04 (General)), 6 (PB05: Multiplexed I/O & Peripheral Pin PB05 (General)).

Q: What are the IPC-7351B PCB Footprint dimensions for ATSAMC20J18A-AUT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATSAMC20J18A-AUT (TQFP-64(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.50 mm, and 64 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATSAMC20J18A-AUT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATSAMC20J18A-AUT (MICROCHIP, TQFP-64(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 10.00mm × 10.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	64pins	I/O	Multiplexed I/O & Peripheral Pin 64pins (General)
2	PA01	I/O	Multiplexed I/O & Peripheral Pin PA01 (General)
3	PA02	I/O	Multiplexed I/O & Peripheral Pin PA02 (General)
4	PA03	I/O	Multiplexed I/O & Peripheral Pin PA03 (General)
5	PB04	I/O	Multiplexed I/O & Peripheral Pin PB04 (General)
6	PB05	I/O	Multiplexed I/O & Peripheral Pin PB05 (General)
7	GNDANA	GND	Ground Reference Pin (GNDANA)
8	VDDANA	Power	Power Supply Input (VDDANA — 2.7V – 5.5V)
9	PB06	I/O	Multiplexed I/O & Peripheral Pin PB06 (General)
10	PB07	I/O	Multiplexed I/O & Peripheral Pin PB07 (General)
11	PB08	I/O	Multiplexed I/O & Peripheral Pin PB08 (General)
12	PB09	I/O	Multiplexed I/O & Peripheral Pin PB09 (General)
13	PA04	I/O	Multiplexed I/O & Peripheral Pin PA04 (General)
14	PA05	I/O	Multiplexed I/O & Peripheral Pin PA05 (General)
15	PA06	I/O	Multiplexed I/O & Peripheral Pin PA06 (General)
16	PA07	I/O	Multiplexed I/O & Peripheral Pin PA07 (General)
17	PA08	I/O	Multiplexed I/O & Peripheral Pin PA08 (General)
18	PA09	I/O	Multiplexed I/O & Peripheral Pin PA09 (General)
19	PA10	I/O	Multiplexed I/O & Peripheral Pin PA10 (General)
20	PA11	I/O	Multiplexed I/O & Peripheral Pin PA11 (General)
21	VDDIO	Power	Power Supply Input (VDDIO — 2.7V – 5.5V)
22	GND	GND	Ground Reference Pin (GND)
23	PB10	I/O	Multiplexed I/O & Peripheral Pin PB10 (General)
24	PB11	I/O	Multiplexed I/O & Peripheral Pin PB11 (General)
25	PB12	I/O	Multiplexed I/O & Peripheral Pin PB12 (General)
26	PB13	I/O	Multiplexed I/O & Peripheral Pin PB13 (General)
27	PB14	I/O	Multiplexed I/O & Peripheral Pin PB14 (General)
28	PB15	I/O	Multiplexed I/O & Peripheral Pin PB15 (General)
29	PA12	I/O	Multiplexed I/O & Peripheral Pin PA12 (General)
30	PA13	I/O	Multiplexed I/O & Peripheral Pin PA13 (General)
31	PA14	I/O	Multiplexed I/O & Peripheral Pin PA14 (General)
32	PA15	I/O	Multiplexed I/O & Peripheral Pin PA15 (General)
33	GND	GND	Ground Reference Pin (GND)
34	VDDIO	Power	Power Supply Input (VDDIO — 2.7V – 5.5V)
35	PA16	I/O	Multiplexed I/O & Peripheral Pin PA16 (General)
36	PA17	I/O	Multiplexed I/O & Peripheral Pin PA17 (General)
37	PA18	I/O	Multiplexed I/O & Peripheral Pin PA18 (General)
38	PA19	I/O	Multiplexed I/O & Peripheral Pin PA19 (General)
39	PB16	I/O	Multiplexed I/O & Peripheral Pin PB16 (General)
40	PB17	I/O	Multiplexed I/O & Peripheral Pin PB17 (General)
41	PA20	I/O	Multiplexed I/O & Peripheral Pin PA20 (General)
42	PA21	I/O	Multiplexed I/O & Peripheral Pin PA21 (General)
43	PA22	I/O	Multiplexed I/O & Peripheral Pin PA22 (General)
44	PA23	I/O	Multiplexed I/O & Peripheral Pin PA23 (General)
45	PA24	I/O	Multiplexed I/O & Peripheral Pin PA24 (General)
46	PA25	I/O	Multiplexed I/O & Peripheral Pin PA25 (General)
47	GND	GND	Ground Reference Pin (GND)
48	VDDIO	Power	Power Supply Input (VDDIO — 2.7V – 5.5V)
49	PB22	I/O	Multiplexed I/O & Peripheral Pin PB22 (General)
50	PB23	I/O	Multiplexed I/O & Peripheral Pin PB23 (General)
51	PA27	I/O	Multiplexed I/O & Peripheral Pin PA27 (General)
52	RESETN	I	System Enable & Hardware Reset (RESETN)
53	PA28	I/O	Multiplexed I/O & Peripheral Pin PA28 (General)
54	GND	GND	Ground Reference Pin (GND)
55	VDDCORE	Power	Power Supply Input (VDDCORE — 2.7V – 5.5V)
56	VDDIN	Power	Power Supply Input (VDDIN — 2.7V – 5.5V)
57	PA30	I/O	Multiplexed I/O & Peripheral Pin PA30 (General)
58	PA31	I/O	Multiplexed I/O & Peripheral Pin PA31 (General)
59	PB30	I/O	Multiplexed I/O & Peripheral Pin PB30 (General)
60	PB31	I/O	Multiplexed I/O & Peripheral Pin PB31 (General)
61	PB00	I/O	Multiplexed I/O & Peripheral Pin PB00 (General)
62	PB01	I/O	Multiplexed I/O & Peripheral Pin PB01 (General)
63	PB02	I/O	Multiplexed I/O & Peripheral Pin PB02 (General)
64	PB03	I/O	Multiplexed I/O & Peripheral Pin PB03 (General)

PIN 1 64pins

I/O

Multiplexed I/O & Peripheral Pin 64pins (General)

Design note: Signal terminal 64pins (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: 64pins. Supported peripheral buses: General.

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 4 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

ATSAMC20J18A-AUT (TQFP-64(10x10)) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

ATSAMC20J18A-AUT (TQFP-64(10x10)) - 2. Standard Pinout (Top View)

True package pinout (64 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

ATSAMC20J18A-AUT (TQFP-64(10x10)) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

ATSAMC20J18A-AUT (TQFP-64(10x10)) - 4. Package Dimensions (D×E×A)

TQFP-64(10x10) · 10.00×10.00mm · Pitch 0.50mmExpand ›

5. Recommended Land PatternLAND PATTERN

ATSAMC20J18A-AUT (TQFP-64(10x10)) - 5. Recommended Land Pattern

IPC-7351B Footprint (64 Pads)Expand ›

6. Application SchematicSCHEMATIC

ATSAMC20J18A-AUT (TQFP-64(10x10)) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (4 figures · Page 1/1)

Showing 1–4 of 4 uncropped original figures for ATSAMC20J18A

P15 · p15_fig01744×743px

DIGITAL PIN ANALOG PIN OSCILLATOR GROUND INPUT SUPPLY

P22 · p22_fig011930×1479px

Related Links SERCOM I2C Pins on page 23

P22 · p22_fig021777×501px

7.2.1. Oscillator Pinout

P22 · p22_fig02P22

Datasheet Page 22 (p22_fig02)

Technical Specifications & Part Details (ATSAMC20J18A-AUT)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:ATSAMC20J18A-AUT (TQFP-64(10x10)) is a 64-pin standard electronic & interconnect component featuring a 10.00 × 10.00 × 1.20 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 2.7V – 5.5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, SPI, I2C, ADC, PWM, JTAG / SWD interfaces.

Operating Supply VoltageV_CC / V_DD

2.7V – 5.5V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C ~ +85°C (Industrial Grade)

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

48MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

10.00 × 10.00 × 1.20 mm (A1=0.10 mm)

Package family: TQFP (TQFP-64(10x10))

Pin Count & Lead PitchN / e

64 Pins | Pitch e = 0.50 mm (19.7 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

UART, SPI, I2C, ADC, PWM, JTAG / SWD

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol64 auto-grouped pins

IPC-7351B Land Pattern64 pads · Pitch 0.50mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TQFP-64(10x10))

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

10.00 × 10.00 mm

Height (A) & Pitch (e)IPC-7351B

A=1.20mm · e=0.50mm

Pad Size (W × L)Level B

0.30 × 1.25 mm

Pins / Total PadsTopology

64P / 64Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit TQFP-64(10x10)	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — ATSAMC20J18A-AUT (TQFP-64(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ATSAMC20J18A-AUT (TQFP-64(10x10))?

Manufactured by MICROCHIP, the ATSAMC20J18A-AUT is housed in a TQFP-64(10x10) package with 64 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.7V – 5.5V. Key pins include: 1 (64pins: Multiplexed I/O & Peripheral Pin 64pins (General)), 2 (PA01: Multiplexed I/O & Peripheral Pin PA01 (General)), 3 (PA02: Multiplexed I/O & Peripheral Pin PA02 (General)), 4 (PA03: Multiplexed I/O & Peripheral Pin PA03 (General)), 5 (PB04: Multiplexed I/O & Peripheral Pin PB04 (General)), 6 (PB05: Multiplexed I/O & Peripheral Pin PB05 (General)).

What are the IPC-7351B PCB Footprint dimensions for ATSAMC20J18A-AUT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATSAMC20J18A-AUT (TQFP-64(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.50 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATSAMC20J18A-AUT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATSAMC20J18A-AUT (MICROCHIP, TQFP-64(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & ATSAMC20J18A Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	64pins	Digital_IO	Signal terminal 64pins (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: 64pins. Supported peripheral buses: General.
2	PA01	Digital_IO	Signal terminal PA01 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA01. Supported peripheral buses: General.
3	PA02	Digital_IO	Signal terminal PA02 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA02. Supported peripheral buses: General.
4	PA03	Digital_IO	Signal terminal PA03 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA03. Supported peripheral buses: General.
5	PB04	Digital_IO	Signal terminal PB04 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB04. Supported peripheral buses: General.
6	PB05	Digital_IO	Signal terminal PB05 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB05. Supported peripheral buses: General.
7	GNDANA	GND	0V electrical ground return terminal (GNDANA) for internal core logic, I/O drivers, and analog sub-blocks.
8	VDDANA	Power_In	Primary positive power supply input (VDDANA) operating in the 2.7V – 5.5V domain (Max rating: 5.5V).
9	PB06	Digital_IO	Signal terminal PB06 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB06. Supported peripheral buses: General.
10	PB07	Digital_IO	Signal terminal PB07 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB07. Supported peripheral buses: General.
11	PB08	Digital_IO	Signal terminal PB08 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB08. Supported peripheral buses: General.
12	PB09	Digital_IO	Signal terminal PB09 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB09. Supported peripheral buses: General.
13	PA04	Digital_IO	Signal terminal PA04 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA04. Supported peripheral buses: General.
14	PA05	Digital_IO	Signal terminal PA05 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA05. Supported peripheral buses: General.
15	PA06	Digital_IO	Signal terminal PA06 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA06. Supported peripheral buses: General.
16	PA07	Digital_IO	Signal terminal PA07 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA07. Supported peripheral buses: General.
17	PA08	Digital_IO	Signal terminal PA08 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA08. Supported peripheral buses: General.
18	PA09	Digital_IO	Signal terminal PA09 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA09. Supported peripheral buses: General.
19	PA10	Digital_IO	Signal terminal PA10 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
20	PA11	Digital_IO	Signal terminal PA11 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
21	VDDIO	Power_In	Primary positive power supply input (VDDIO) operating in the 2.7V – 5.5V domain (Max rating: 5.5V).
22	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
23	PB10	Digital_IO	Signal terminal PB10 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
24	PB11	Digital_IO	Signal terminal PB11 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
25	PB12	Digital_IO	Signal terminal PB12 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
26	PB13	Digital_IO	Signal terminal PB13 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
27	PB14	Digital_IO	Signal terminal PB14 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
28	PB15	Digital_IO	Signal terminal PB15 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
29	PA12	Digital_IO	Signal terminal PA12 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
30	PA13	Digital_IO	Signal terminal PA13 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
31	PA14	Digital_IO	Signal terminal PA14 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
32	PA15	Digital_IO	Signal terminal PA15 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
33	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
34	VDDIO	Power_In	Primary positive power supply input (VDDIO) operating in the 2.7V – 5.5V domain (Max rating: 5.5V).
35	PA16	Digital_IO	Signal terminal PA16 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA16. Supported peripheral buses: General.
36	PA17	Digital_IO	Signal terminal PA17 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA17. Supported peripheral buses: General.
37	PA18	Digital_IO	Signal terminal PA18 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA18. Supported peripheral buses: General.
38	PA19	Digital_IO	Signal terminal PA19 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA19. Supported peripheral buses: General.
39	PB16	Digital_IO	Signal terminal PB16 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB16. Supported peripheral buses: General.
40	PB17	Digital_IO	Signal terminal PB17 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB17. Supported peripheral buses: General.
41	PA20	Digital_IO	Signal terminal PA20 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA20. Supported peripheral buses: General.
42	PA21	Digital_IO	Signal terminal PA21 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA21. Supported peripheral buses: General.
43	PA22	Digital_IO	Signal terminal PA22 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA22. Supported peripheral buses: General.
44	PA23	Digital_IO	Signal terminal PA23 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA23. Supported peripheral buses: General.
45	PA24	Digital_IO	Signal terminal PA24 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA24. Supported peripheral buses: General.
46	PA25	Digital_IO	Signal terminal PA25 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA25. Supported peripheral buses: General.
47	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
48	VDDIO	Power_In	Primary positive power supply input (VDDIO) operating in the 2.7V – 5.5V domain (Max rating: 5.5V).
49	PB22	Digital_IO	Signal terminal PB22 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB22. Supported peripheral buses: General.
50	PB23	Digital_IO	Signal terminal PB23 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB23. Supported peripheral buses: General.
51	PA27	Digital_IO	Signal terminal PA27 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA27. Supported peripheral buses: General.
52	RESETN	Digital_IO	Active-low hardware reset terminal (RESETN): pulling this pin Low resets the processor core and peripherals.
53	PA28	Digital_IO	Signal terminal PA28 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA28. Supported peripheral buses: General.
54	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
55	VDDCORE	Power_In	Primary positive power supply input (VDDCORE) operating in the 2.7V – 5.5V domain (Max rating: 5.5V).
56	VDDIN	Power_In	Primary positive power supply input (VDDIN) operating in the 2.7V – 5.5V domain (Max rating: 5.5V).
57	PA30	Digital_IO	Signal terminal PA30 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA30. Supported peripheral buses: General.
58	PA31	Digital_IO	Signal terminal PA31 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PA31. Supported peripheral buses: General.
59	PB30	Digital_IO	Signal terminal PB30 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB30. Supported peripheral buses: General.
60	PB31	Digital_IO	Signal terminal PB31 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB31. Supported peripheral buses: General.
61	PB00	Digital_IO	Signal terminal PB00 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB00. Supported peripheral buses: General.
62	PB01	Digital_IO	Signal terminal PB01 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB01. Supported peripheral buses: General.
63	PB02	Digital_IO	Signal terminal PB02 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB02. Supported peripheral buses: General.
64	PB03	Digital_IO	Signal terminal PB03 (I/O, 2.7V – 5.5V domain). Multiplexed alternate functions: PB03. Supported peripheral buses: General.

4D Studio: ATSAMC20J18A-AUT Permalink: /part/C190295 MICROCHIP TQFP-64(10x10)All Packages All Manufacturers