MCP4802-E/MS (MSOP-8) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of MCP4802-E/MS (MSOP-8)?

Manufactured by MICROCHIP, the MCP4802-E/MS is housed in a MSOP-8 package with 8 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 2.7V to 5.5V. Key pins include: 1 (VDD: Power Supply Input (VDD — 2.7V to 5.5V)), 2 (CS: Multiplexed I/O & Peripheral Pin CS (General)), 3 (SCK: Multiplexed I/O & Peripheral Pin SCK (SPI)), 4 (SDI: Multiplexed I/O & Peripheral Pin SDI (General)), 5 (LDAC: Multiplexed I/O & Peripheral Pin LDAC (General)), 6 (V OUTB: Multiplexed I/O & Peripheral Pin V OUTB (DAC)).

Q: What are the IPC-7351B PCB Footprint dimensions for MCP4802-E/MS?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MCP4802-E/MS (MSOP-8) has a nominal body envelope of 3.00 × 3.00 mm, pitch e = 0.65 mm, and 8 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MCP4802-E/MS?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MCP4802-E/MS (MICROCHIP, MSOP-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 3.00mm × 3.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (8/8)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	VDD	Power	Power Supply Input (VDD — 2.7V to 5.5V)
2	CS	I/O	Multiplexed I/O & Peripheral Pin CS (General)
3	SCK	I/O	Multiplexed I/O & Peripheral Pin SCK (SPI)
4	SDI	I/O	Multiplexed I/O & Peripheral Pin SDI (General)
5	LDAC	Analog	Multiplexed I/O & Peripheral Pin LDAC (General)
6	V OUTB	I/O	Multiplexed I/O & Peripheral Pin V OUTB (DAC)
7	VSS	GND	Ground Reference Pin (VSS)
8	V OUTA	I/O	Multiplexed I/O & Peripheral Pin V OUTA (DAC)

PIN 1 VDD

Power

Power Supply Input (VDD — 2.7V to 5.5V)

Design note: SupplyVoltageInput(27Vto55V) . .

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

MCP4802-E/MS (MSOP-8) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

MCP4802-E/MS (MSOP-8) - 2. Standard Pinout (Top View)

True package pinout (8 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

MCP4802-E/MS (MSOP-8) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

MCP4802-E/MS (MSOP-8) - 4. Package Dimensions (D×E×A)

MSOP-8 · 3.00×3.00mm · Pitch 0.65mmExpand ›

5. Recommended Land PatternLAND PATTERN

MCP4802-E/MS (MSOP-8) - 5. Recommended Land Pattern

IPC-7351B Footprint (8 Pads)Expand ›

6. Application SchematicSCHEMATIC

MCP4802-E/MS (MSOP-8) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)

Showing 1–9 of 9 uncropped original figures for MCP4802 / MCP4812

P1 · p01_fig01EXACT PACKAGE

 2010-2015 Microchip Technology Inc. DS20002249B-page 1

P2 · p02_fig011380×1490px

MCP4802-E/MS (MSOP-8) — MCP4802/4812/4822 | Block Diagram | Op Amps | VDD | VSS | CS SDI SCK | Interface Logic | Input Register A Register B | Input | DACA Register Register | DACB | String DACB String DACA | Output | Power-on Reset | VOUTA VOUTB | LDAC | Output G

P25 · p25_fig01867×1016px

FIGURE 6-1: Typical Connection Diagram. 6.4 Layout Considerations

P27 · p27_fig011780×1716px

MCP4802-E/MS (MSOP-8) — EXAMPLE 6-2: SINGLE-SUPPLY “WINDOW” DAC | DAC | VDD | SPI | 3-wire | VTRIP R1 | R2 0.1 µF | Comparator R3 | VCC- | VCC+ VCC+ | VCC- | VOUT | R23 | R2R3 R2 R3 + ------------------ = | V23 | VCC+R2   VCC-R3   + R2 R3 + -------------------

EXAMPLE 6-2: SINGLE-SUPPLY “WINDOW” DAC | DAC | VDD | SPI | 3-wire | VTRIP R1 | R2 0.1 µF | Comparator R3 | VCC- | VCC+ VCC+ | VCC- | VOUT | R23 | R2R3 R2 R3 + ------------------ = | V23 | VCC+R2   VCC-R3   + R2 R3 + -------------------

P27 · p27_fig01P27

Datasheet Page 27 (p27_fig01)

P28 · p28_fig011664×1196px

If R1 = 20 k and R2 = 10 k, the gain will be 0.5.

P28 · p28_fig02868×520px

R4 R3 R4 +   ----------------------- 2.05V 0.5 4.096V    + 1.5 4.096V  ------------------------------------------------------- 2 3-- = =

P35 · p35_fig011777×2564px

MCP4802/4812/4822

P43 · p43_fig01All Packages in PDF

 2010-2015 Microchip Technology Inc. DS20002249B-page 43

Technical Specifications & Part Details (MCP4802-E/MS)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:MCP4802-E/MS (MSOP-8) is a 8-pin standard electronic & interconnect component featuring a 3.00 × 3.00 × 1.10 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 2.7V to 5.5V supply operation across -40°C to +125°C with integrated SPI, DAC interfaces.

Operating Supply VoltageV_CC / V_DD

2.7V to 5.5V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C to +125°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

20 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

3.00 × 3.00 × 1.10 mm (A1=0.08 mm)

Package family: TSSOP (MSOP-8)

Pin Count & Lead PitchN / e

8 Pins | Pitch e = 0.65 mm (25.6 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

SPI, DAC

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol8 auto-grouped pins

IPC-7351B Land Pattern8 pads · Pitch 0.65mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

IPC-7351B

Family Variants & Same Datasheet Chips — MCP4802 / MCP4812 (2)

Select package variant or sibling MPN sharing this datasheet

MSOP-8 · 8P

MCP4802-E/MS

MICROCHIP·MSOP-8

IPC-7351B

8P3.0×3.0×1.10mmP=0.65mm

MCP4802 / MCP4812 (MSOP-8)

SOIC-8-150mil · 8P

MCP4812T-E/SN

MICROCHIP·SOIC-8-150mil

IPC-7351B

8P4.9×3.9×1.75mmP=1.27mm

MCP4802 / MCP4812 (SOIC-8-150mil)

Mechanical Dimensions & Land Pattern (MSOP-8)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

3.00 × 3.00 mm

Height (A) & Pitch (e)IPC-7351B

A=1.10mm · e=0.65mm

Pad Size (W × L)Level B

0.40 × 1.25 mm

Pins / Total PadsTopology

8P / 8Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit MSOP-8	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — MCP4802-E/MS (MSOP-8)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of MCP4802-E/MS (MSOP-8)?

Manufactured by MICROCHIP, the MCP4802-E/MS is housed in a MSOP-8 package with 8 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 2.7V to 5.5V. Key pins include: 1 (VDD: Power Supply Input (VDD — 2.7V to 5.5V)), 2 (CS: Multiplexed I/O & Peripheral Pin CS (General)), 3 (SCK: Multiplexed I/O & Peripheral Pin SCK (SPI)), 4 (SDI: Multiplexed I/O & Peripheral Pin SDI (General)), 5 (LDAC: Multiplexed I/O & Peripheral Pin LDAC (General)), 6 (V OUTB: Multiplexed I/O & Peripheral Pin V OUTB (DAC)).

What are the IPC-7351B PCB Footprint dimensions for MCP4802-E/MS?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MCP4802-E/MS (MSOP-8) has a nominal body envelope of 3.00 × 3.00 mm, pitch e = 0.65 mm, and 8 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MCP4802-E/MS?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MCP4802-E/MS (MICROCHIP, MSOP-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (8 pins) & MCP4802 / MCP4812 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	VDD	Power_In	Primary positive power supply input (VDD) operating in the 2.7V to 5.5V domain (Max rating: 5.5V).
2	CS	Digital_IO	Signal terminal CS (I/O, 2.7V to 5.5V domain). Multiplexed alternate functions: CS. Supported peripheral buses: General.
3	SCK	Digital_IO	Signal terminal SCK (I/O, 2.7V to 5.5V domain). Multiplexed alternate functions: SCK. Supported peripheral buses: SPI.
4	SDI	Digital_IO	Signal terminal SDI (I/O, 2.7V to 5.5V domain). Multiplexed alternate functions: SDI. Supported peripheral buses: General.
5	LDAC	Analog	Signal terminal LDAC (Analog, 2.7V to 5.5V domain). Multiplexed alternate functions: LDAC. Supported peripheral buses: General.
6	V OUTB	Digital_IO	Signal terminal V OUTB (I/O, 2.7V to 5.5V domain). Multiplexed alternate functions: V OUTB. Supported peripheral buses: DAC.
7	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
8	V OUTA	Digital_IO	Signal terminal V OUTA (I/O, 2.7V to 5.5V domain). Multiplexed alternate functions: V OUTA. Supported peripheral buses: DAC.

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