ATMEGA325-16AU (TQFP-64(14x14)) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of ATMEGA325-16AU (TQFP-64(14x14))?

Manufactured by MICROCHIP, the ATMEGA325-16AU is housed in a TQFP-64(14x14) package with 64 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.8V to 5.5V. Key pins include: 1 (DIEOV: Multiplexed I/O & Peripheral Pin DIEOV (General)), 2 ((RXD/PCINT0)PE0: Multiplexed I/O & Peripheral Pin (RXD/PCINT0)PE0 (UART)), 3 ((TXD/PCINT1)PE1: Multiplexed I/O & Peripheral Pin (TXD/PCINT1)PE1 (UART)), 4 ((XCK/AIN0/PCINT2)PE2: Multiplexed I/O & Peripheral Pin (XCK/AIN0/PCINT2)PE2 (ADC)), 5 ((AIN1/PCINT3)PE3: Multiplexed I/O & Peripheral Pin (AIN1/PCINT3)PE3 (ADC)), 6 ((USCK/SCL/PCINT4)PE4: Multiplexed I/O & Peripheral Pin (USCK/SCL/PCINT4)PE4 (I2C)).

Q: What are the IPC-7351B PCB Footprint dimensions for ATMEGA325-16AU?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATMEGA325-16AU (TQFP-64(14x14)) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.80 mm, and 64 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATMEGA325-16AU?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATMEGA325-16AU (MICROCHIP, TQFP-64(14x14)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 14.00mm × 14.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	DIEOV	I/O	Multiplexed I/O & Peripheral Pin DIEOV (General)
2	(RXD/PCINT0)PE0	I/O	Multiplexed I/O & Peripheral Pin (RXD/PCINT0)PE0 (UART)
3	(TXD/PCINT1)PE1	I/O	Multiplexed I/O & Peripheral Pin (TXD/PCINT1)PE1 (UART)
4	(XCK/AIN0/PCINT2)PE2	I/O	Multiplexed I/O & Peripheral Pin (XCK/AIN0/PCINT2)PE2 (ADC)
5	(AIN1/PCINT3)PE3	I/O	Multiplexed I/O & Peripheral Pin (AIN1/PCINT3)PE3 (ADC)
6	(USCK/SCL/PCINT4)PE4	I/O	Multiplexed I/O & Peripheral Pin (USCK/SCL/PCINT4)PE4 (I2C)
7	(DI/SDA/PCINT5)PE5	I/O	Multiplexed I/O & Peripheral Pin (DI/SDA/PCINT5)PE5 (I2C)
8	(DO/PCINT6)PE6	I/O	Multiplexed I/O & Peripheral Pin (DO/PCINT6)PE6 (General)
9	(CLKO/PCINT7)PE7	I/O	Multiplexed I/O & Peripheral Pin (CLKO/PCINT7)PE7 (General)
10	(SS/PCINT8#)PB0	I/O	Multiplexed I/O & Peripheral Pin (SS/PCINT8#)PB0 (General)
11	(SCK/PCINT9)PB1	I/O	Multiplexed I/O & Peripheral Pin (SCK/PCINT9)PB1 (SPI)
12	(MOSI/PCINT10)PB2	I/O	Multiplexed I/O & Peripheral Pin (MOSI/PCINT10)PB2 (SPI)
13	(MISO/PCINT11)PB3	I/O	Multiplexed I/O & Peripheral Pin (MISO/PCINT11)PB3 (SPI)
14	(OC0A/PCINT12)PB4	I/O	Multiplexed I/O & Peripheral Pin (OC0A/PCINT12)PB4 (PWM)
15	(OC1A/PCINT13)PB5	I/O	Multiplexed I/O & Peripheral Pin (OC1A/PCINT13)PB5 (PWM)
16	(OC1B/PCINT14)PB6	I/O	Multiplexed I/O & Peripheral Pin (OC1B/PCINT14)PB6 (PWM)
17	(OC2A/PCINT15)PB7	I/O	Multiplexed I/O & Peripheral Pin (OC2A/PCINT15)PB7 (PWM)
18	(T1)PG3	I/O	Multiplexed I/O & Peripheral Pin (T1)PG3 (General)
19	(T0)PG4	I/O	Multiplexed I/O & Peripheral Pin (T0)PG4 (General)
20	RESET#/PG5	I	System Enable & Hardware Reset (RESET#/PG5)
21	VCC	Power	Power Supply Input (VCC — 1.8V ~ 5.5V VCC)
22	GND	GND	Ground Reference Pin (GND)
23	XTAL2(TOSC2)	I/O	Multiplexed I/O & Peripheral Pin XTAL2(TOSC2) (RTC/CLK)
24	XTAL1(TOSC1)	I/O	Multiplexed I/O & Peripheral Pin XTAL1(TOSC1) (RTC/CLK)
25	(ICP1)PD0	I/O	Multiplexed I/O & Peripheral Pin (ICP1)PD0 (General)
26	(INT0)PD1	I/O	Multiplexed I/O & Peripheral Pin (INT0)PD1 (General)
27	PD2	I/O	Multiplexed I/O & Peripheral Pin PD2 (General)
28	PD3	I/O	Multiplexed I/O & Peripheral Pin PD3 (General)
29	PD4	I/O	Multiplexed I/O & Peripheral Pin PD4 (General)
30	PD5	I/O	Multiplexed I/O & Peripheral Pin PD5 (General)
31	PD6	I/O	Multiplexed I/O & Peripheral Pin PD6 (General)
32	PD7	I/O	Multiplexed I/O & Peripheral Pin PD7 (General)
33	PG0	I/O	Multiplexed I/O & Peripheral Pin PG0 (General)
34	PG1	I/O	Multiplexed I/O & Peripheral Pin PG1 (General)
35	PC0	I/O	Multiplexed I/O & Peripheral Pin PC0 (General)
36	PC1	I/O	Multiplexed I/O & Peripheral Pin PC1 (General)
37	PC2	I/O	Multiplexed I/O & Peripheral Pin PC2 (General)
38	PC3	I/O	Multiplexed I/O & Peripheral Pin PC3 (General)
39	PC4	I/O	Multiplexed I/O & Peripheral Pin PC4 (General)
40	PC5	I/O	Multiplexed I/O & Peripheral Pin PC5 (General)
41	PC6	I/O	Multiplexed I/O & Peripheral Pin PC6 (General)
42	PC7	I/O	Multiplexed I/O & Peripheral Pin PC7 (General)
43	PG2	I/O	Multiplexed I/O & Peripheral Pin PG2 (General)
44	PA7	I/O	Multiplexed I/O & Peripheral Pin PA7 (General)
45	PA6	I/O	Multiplexed I/O & Peripheral Pin PA6 (General)
46	PA5	I/O	Multiplexed I/O & Peripheral Pin PA5 (General)
47	PA4	I/O	Multiplexed I/O & Peripheral Pin PA4 (General)
48	PA3	I/O	Multiplexed I/O & Peripheral Pin PA3 (General)
49	PA2	I/O	Multiplexed I/O & Peripheral Pin PA2 (General)
50	PA1	I/O	Multiplexed I/O & Peripheral Pin PA1 (General)
51	PA0	I/O	Multiplexed I/O & Peripheral Pin PA0 (General)
52	VCC	Power	Power Supply Input (VCC — 1.8V ~ 5.5V VCC)
53	GND	GND	Ground Reference Pin (GND)
54	PF7(ADC7/TDI)	I/O	Multiplexed I/O & Peripheral Pin PF7(ADC7/TDI) (ADC)
55	PF6(ADC6/TDO)	I/O	Multiplexed I/O & Peripheral Pin PF6(ADC6/TDO) (ADC)
56	PF5(ADC5/TMS)	I/O	Multiplexed I/O & Peripheral Pin PF5(ADC5/TMS) (ADC)
57	PF4(ADC4/TCK)	I/O	Multiplexed I/O & Peripheral Pin PF4(ADC4/TCK) (ADC)
58	PF3(ADC3)	I/O	Multiplexed I/O & Peripheral Pin PF3(ADC3) (ADC)
59	PF2(ADC2)	I/O	Multiplexed I/O & Peripheral Pin PF2(ADC2) (ADC)
60	PF1(ADC1)	I/O	Multiplexed I/O & Peripheral Pin PF1(ADC1) (ADC)
61	PF0(ADC0)	I/O	Multiplexed I/O & Peripheral Pin PF0(ADC0) (ADC)
62	AREF	I/O	Multiplexed I/O & Peripheral Pin AREF (ADC)
63	GND	GND	Ground Reference Pin (GND)
64	VCC	Power	Power Supply Input (VCC — 1.8V ~ 5.5V VCC)

PIN 1 DIEOV

I/O

Multiplexed I/O & Peripheral Pin DIEOV (General)

Design note: Signal terminal DIEOV (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: DIEOV. Supported peripheral buses: General.

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 10 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

ATMEGA325-16AU (TQFP-64(14x14)) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

ATMEGA325-16AU (TQFP-64(14x14)) - 2. Standard Pinout (Top View)

True package pinout (64 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

ATMEGA325-16AU (TQFP-64(14x14)) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

ATMEGA325-16AU (TQFP-64(14x14)) - 4. Package Dimensions (D×E×A)

TQFP-64(14x14) · 14.00×14.00mm · Pitch 0.80mmExpand ›

5. Recommended Land PatternLAND PATTERN

ATMEGA325-16AU (TQFP-64(14x14)) - 5. Recommended Land Pattern

IPC-7351B Footprint (64 Pads)Expand ›

6. Application SchematicSCHEMATIC

ATMEGA325-16AU (TQFP-64(14x14)) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (10 figures · Page 1/1)

Showing 1–10 of 10 uncropped original figures for ATMEGA325

P347 · p347_fig01EXACT PACKAGE

ATmega325/3250/645/6450

P1 · p01_fig01392×173px

8-bit Atmel Microcontroller with In-System Programmable Flash

P1 · p01_fig01P1

Datasheet Page 1 (p01_fig01)

P2 · p02_fig012020×2007px

Figure 1-1. Pinout ATmega3250/6450

P2 · p02_fig01P2

Datasheet Page 2 (p02_fig01)

P313 · p313_fig011895×924px

Figure 29-13. Power-save Supply Current vs. VCC (Watchdog Timer Disabled)

P313 · p313_fig021420×843px

Figure 29-14. Standby Supply Current vs. VCC (Low Power Crystal Oscillator)

P347 · p347_fig01P347

Datasheet Page 347 (p347_fig01)

P348 · p348_fig012128×2384px

348

P349 · p349_fig01All Packages in PDF

349

Technical Specifications & Part Details (ATMEGA325-16AU)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Embedded Microcontroller Unit (MCU)

Detailed Overview:ATMEGA325-16AU (TQFP-64(14x14)) is a 64-pin embedded microcontroller unit (mcu) featuring a 14.00 × 14.00 × 1.20 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.8V to 5.5V supply operation across -40°C to 85°C with integrated UART, SPI, I2C, ADC, PWM, JTAG / SWD, RTC/CLK interfaces.

Operating Supply VoltageV_CC / V_DD

1.8V to 5.5V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C to 85°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

16MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

64 5V-tolerant (FT) pins detected

Package Envelope (D × E × A)D × E × A

14.00 × 14.00 × 1.20 mm (A1=0.10 mm)

Package family: TQFP (TQFP-64(14x14))

Pin Count & Lead PitchN / e

64 Pins | Pitch e = 0.80 mm (31.5 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

UART, SPI, I2C, ADC, PWM, JTAG / SWD, RTC/CLK

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol64 auto-grouped pins

IPC-7351B Land Pattern64 pads · Pitch 0.80mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TQFP-64(14x14))

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

14.00 × 14.00 mm

Height (A) & Pitch (e)IPC-7351B

A=1.20mm · e=0.80mm

Pad Size (W × L)Level B

0.45 × 1.68 mm

Pins / Total PadsTopology

64P / 64Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit TQFP-64(14x14)	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — ATMEGA325-16AU (TQFP-64(14x14))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ATMEGA325-16AU (TQFP-64(14x14))?

Manufactured by MICROCHIP, the ATMEGA325-16AU is housed in a TQFP-64(14x14) package with 64 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.8V to 5.5V. Key pins include: 1 (DIEOV: Multiplexed I/O & Peripheral Pin DIEOV (General)), 2 ((RXD/PCINT0)PE0: Multiplexed I/O & Peripheral Pin (RXD/PCINT0)PE0 (UART)), 3 ((TXD/PCINT1)PE1: Multiplexed I/O & Peripheral Pin (TXD/PCINT1)PE1 (UART)), 4 ((XCK/AIN0/PCINT2)PE2: Multiplexed I/O & Peripheral Pin (XCK/AIN0/PCINT2)PE2 (ADC)), 5 ((AIN1/PCINT3)PE3: Multiplexed I/O & Peripheral Pin (AIN1/PCINT3)PE3 (ADC)), 6 ((USCK/SCL/PCINT4)PE4: Multiplexed I/O & Peripheral Pin (USCK/SCL/PCINT4)PE4 (I2C)).

What are the IPC-7351B PCB Footprint dimensions for ATMEGA325-16AU?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATMEGA325-16AU (TQFP-64(14x14)) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.80 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATMEGA325-16AU?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATMEGA325-16AU (MICROCHIP, TQFP-64(14x14)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & ATMEGA325 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	DIEOV	Digital_IO	Signal terminal DIEOV (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: DIEOV. Supported peripheral buses: General.
2	(RXD/PCINT0)PE0	Digital_IO	Signal terminal (RXD/PCINT0)PE0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (RXD/PCINT0)PE0. Supported peripheral buses: UART.
3	(TXD/PCINT1)PE1	Digital_IO	Signal terminal (TXD/PCINT1)PE1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (TXD/PCINT1)PE1. Supported peripheral buses: UART.
4	(XCK/AIN0/PCINT2)PE2	Analog	Signal terminal (XCK/AIN0/PCINT2)PE2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (XCK/AIN0/PCINT2)PE2. Supported peripheral buses: ADC.
5	(AIN1/PCINT3)PE3	Analog	Signal terminal (AIN1/PCINT3)PE3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (AIN1/PCINT3)PE3. Supported peripheral buses: ADC.
6	(USCK/SCL/PCINT4)PE4	Digital_IO	Signal terminal (USCK/SCL/PCINT4)PE4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (USCK/SCL/PCINT4)PE4. Supported peripheral buses: I2C.
7	(DI/SDA/PCINT5)PE5	Digital_IO	Signal terminal (DI/SDA/PCINT5)PE5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (DI/SDA/PCINT5)PE5. Supported peripheral buses: I2C.
8	(DO/PCINT6)PE6	Digital_IO	Signal terminal (DO/PCINT6)PE6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (DO/PCINT6)PE6. Supported peripheral buses: General.
9	(CLKO/PCINT7)PE7	Digital_IO	Signal terminal (CLKO/PCINT7)PE7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (CLKO/PCINT7)PE7. Supported peripheral buses: General.
10	(SS/PCINT8#)PB0	Digital_IO	Signal terminal (SS/PCINT8#)PB0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (SS/PCINT8#)PB0. Supported peripheral buses: General.
11	(SCK/PCINT9)PB1	Digital_IO	Signal terminal (SCK/PCINT9)PB1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (SCK/PCINT9)PB1. Supported peripheral buses: SPI.
12	(MOSI/PCINT10)PB2	Digital_IO	Signal terminal (MOSI/PCINT10)PB2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (MOSI/PCINT10)PB2. Supported peripheral buses: SPI.
13	(MISO/PCINT11)PB3	Digital_IO	Signal terminal (MISO/PCINT11)PB3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (MISO/PCINT11)PB3. Supported peripheral buses: SPI.
14	(OC0A/PCINT12)PB4	Digital_IO	Signal terminal (OC0A/PCINT12)PB4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (OC0A/PCINT12)PB4. Supported peripheral buses: PWM.
15	(OC1A/PCINT13)PB5	Digital_IO	Signal terminal (OC1A/PCINT13)PB5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (OC1A/PCINT13)PB5. Supported peripheral buses: PWM.
16	(OC1B/PCINT14)PB6	Digital_IO	Signal terminal (OC1B/PCINT14)PB6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (OC1B/PCINT14)PB6. Supported peripheral buses: PWM.
17	(OC2A/PCINT15)PB7	Digital_IO	Signal terminal (OC2A/PCINT15)PB7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (OC2A/PCINT15)PB7. Supported peripheral buses: PWM.
18	(T1)PG3	Digital_IO	Signal terminal (T1)PG3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (T1)PG3. Supported peripheral buses: General.
19	(T0)PG4	Digital_IO	Signal terminal (T0)PG4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (T0)PG4. Supported peripheral buses: General.
20	RESET#/PG5	Digital_IO	Active-low hardware reset terminal (RESET#/PG5): pulling this pin Low resets the processor core and peripherals.
21	VCC	Power_In	Primary positive power supply input (VCC) operating in the 1.8V ~ 5.5V VCC domain (Max rating: 6.0V).
22	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
23	XTAL2(TOSC2)	Digital_IO	Signal terminal XTAL2(TOSC2) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: XTAL2(TOSC2). Supported peripheral buses: RTC/CLK.
24	XTAL1(TOSC1)	Digital_IO	Signal terminal XTAL1(TOSC1) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: XTAL1(TOSC1). Supported peripheral buses: RTC/CLK.
25	(ICP1)PD0	Digital_IO	Signal terminal (ICP1)PD0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (ICP1)PD0. Supported peripheral buses: General.
26	(INT0)PD1	Digital_IO	Signal terminal (INT0)PD1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: (INT0)PD1. Supported peripheral buses: General.
27	PD2	Digital_IO	Signal terminal PD2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
28	PD3	Digital_IO	Signal terminal PD3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
29	PD4	Digital_IO	Signal terminal PD4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
30	PD5	Digital_IO	Signal terminal PD5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
31	PD6	Digital_IO	Signal terminal PD6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
32	PD7	Digital_IO	Signal terminal PD7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
33	PG0	Digital_IO	Signal terminal PG0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG0. Supported peripheral buses: General.
34	PG1	Digital_IO	Signal terminal PG1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG1. Supported peripheral buses: General.
35	PC0	Digital_IO	Signal terminal PC0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC0. Supported peripheral buses: General.
36	PC1	Digital_IO	Signal terminal PC1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General.
37	PC2	Digital_IO	Signal terminal PC2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General.
38	PC3	Digital_IO	Signal terminal PC3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC3. Supported peripheral buses: General.
39	PC4	Digital_IO	Signal terminal PC4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC4. Supported peripheral buses: General.
40	PC5	Digital_IO	Signal terminal PC5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC5. Supported peripheral buses: General.
41	PC6	Digital_IO	Signal terminal PC6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
42	PC7	Digital_IO	Signal terminal PC7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
43	PG2	Digital_IO	Signal terminal PG2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG2. Supported peripheral buses: General.
44	PA7	Digital_IO	Signal terminal PA7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
45	PA6	Digital_IO	Signal terminal PA6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
46	PA5	Digital_IO	Signal terminal PA5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
47	PA4	Digital_IO	Signal terminal PA4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
48	PA3	Digital_IO	Signal terminal PA3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
49	PA2	Digital_IO	Signal terminal PA2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
50	PA1	Digital_IO	Signal terminal PA1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
51	PA0	Digital_IO	Signal terminal PA0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
52	VCC	Power_In	Primary positive power supply input (VCC) operating in the 1.8V ~ 5.5V VCC domain (Max rating: 6.0V).
53	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
54	PF7(ADC7/TDI)	Analog	Signal terminal PF7(ADC7/TDI) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF7(ADC7/TDI). Supported peripheral buses: ADC.
55	PF6(ADC6/TDO)	Analog	Signal terminal PF6(ADC6/TDO) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF6(ADC6/TDO). Supported peripheral buses: ADC.
56	PF5(ADC5/TMS)	Analog	Signal terminal PF5(ADC5/TMS) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF5(ADC5/TMS). Supported peripheral buses: ADC.
57	PF4(ADC4/TCK)	Analog	Signal terminal PF4(ADC4/TCK) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF4(ADC4/TCK). Supported peripheral buses: ADC.
58	PF3(ADC3)	Analog	Signal terminal PF3(ADC3) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF3(ADC3). Supported peripheral buses: ADC.
59	PF2(ADC2)	Analog	Signal terminal PF2(ADC2) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF2(ADC2). Supported peripheral buses: ADC.
60	PF1(ADC1)	Analog	Signal terminal PF1(ADC1) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF1(ADC1). Supported peripheral buses: ADC.
61	PF0(ADC0)	Analog	Signal terminal PF0(ADC0) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF0(ADC0). Supported peripheral buses: ADC.
62	AREF	Digital_IO	Signal terminal AREF (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: AREF. Supported peripheral buses: ADC.
63	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
64	VCC	Power_In	Primary positive power supply input (VCC) operating in the 1.8V ~ 5.5V VCC domain (Max rating: 6.0V).

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