ChipDocs.org
⌘K
2284 PARTSUpload PDF
STM32MP153AAB3 (LFBGA-354) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32MP153AAB3

STID: C1555510LFBGA-354 · 354 Pins · Pitch 0.80mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32MP153AAB3 (LFBGA-354)A1VSSA2PG15A3PD0A4PD1A5PE3A6PG6A7PB3A8PB15A9PC7A10PC9A11PC11A12VDD_UnusedA13DNUA14DNUA15DNUA16VDD1V2_Unus A17DDR_DQ0A18DDR_DQ1A19VSSB1PE1B2VSSB3PE6B4PD7B5PB7B6VSSB7PE5B8PA8B9PB4B10PD2B11PE4B12VDDA1V8_Un uB13DNUB14DNUB15DNUB16VDD1V2_Unus B17DDR_DQ3B18DDR_DQ7B19DDR_DQS0NC1PE11C2PE13C3VSSC4PE0C5PD10C6PD3C7PA15C8PA9C9PB14C10PC12C11PC8C12VSSC13VSSC14VSSC15VSSC16VSSC17VSSC18DDR_DQM0C19DDR_DQS0PD1VSSD2PE12D3PE14D4VSSD5VSSD6PD4D7PD5D8VSSD9PB9D10PC6D11PC10D12NJTRSTD13JTDID14JTDO - TRACED15JTMS SWDIO -D16JTCKSWCLK -D17DDR_DQ5D18DDR_DQ2D19DDR_DQ6E1PE15E2VSSE3PD6E4VSSE5VSSE6VSSE7VDDCOREE8VSSE9VDDCOREE10VSSE11VDDCOREE12VSSE13VDDCOREE14VSSE15VDDQ_DDRE16VSSE17DDR_A7E18DDR_DQ4F1PG12F2PD8F3PD14F4VDDCOREF5VSSF6VDDCOREF7VSSF8VDDCOREF9VSSF10VDDCOREF11VSSF12VDDCOREF13VSS_PLL2F14VDDQ_DDRF15VSSF17DDR_A13F18DDR_ZQF19DDR_A3G1PD15G2VSSG3PD9G4VSSG5VDDCOREG6VSSG7VDDCOREG8VSSG9VDDCOREG10VSSG11VDDCOREG12VSSG13VDD_PLL2G14VSSG15VDDQ_DDRG16DDR_ RESETNG17DDR_A9G18DDR_A2G19DDR_BA0H1PC14 - OSC32H2PC15 - OSC32H3VBATH4VDDCOREH5VSSH6VDDCOREH7VSSH8VDDCOREH9VSSH10VDDCOREH11VSSH12VDDCOREH13VSSH14VDDQ_DDRH15VSSH17DDR_A5H18DDR_A0H19DDR_ODTJ1NRSTJ2NRST_COREJ3VSSJ4VSS_PLLJ5VDD_PLLJ6VSSJ7VDDCOREJ8VSSJ9VDDCOREJ10VSSJ11VDDCOREJ12VSSJ13VDDCOREJ14VSSJ15VDDQ_DDRJ16DDR_BA2J17DDR_WENJ18DDR_CSNJ19DDR_DTO1K1BOOT0K2VSSK3PC13K4BOOT1K5VSSK6VDDK7VSSK8VDDCOREK9VSSW19VSSW18DDR_DQ12W17DDR_DQ15W16DDR_VREFW15VDD3V3_ USBFW14USB_DM1W13USB_DP2W12VDD3V3_ USBHW11VDDA1V1_ REGW10PG7W9PF9W8PF7W7PE9W6PB8W5PB10W4PC4W3PB0W2PA2W1VSSV19DDR_DQ11V18DDR_DQ14V17PA11V16USB_RREFV15VSS_USBHSV14USB_DP1V13USB_DM2V12VSS_USBHSV11VDDA1V8_ REGV10PE10V9PF6V8PD11V7PG10V6PG11V5PB12V4PC5V3PB1V2PC1V1PB11U19DDR_DQS1PU18DDR_DQM1U17VSSU16PA12U15OTG_VBUSU14VSS_USBHSU13VSS_USBHSU12PD13U11PD12U10PF8U9PF10U8VSSU7PG8U6VSSU5PF11U4PA1U3VSSU2PG13U1PG14T19DDR_DQS1NT18DDR_DQ13T17DDR_DQ9T16PA10T15BYPASS_ REG1T14PG9T13PB2T12PB6T11PE8T10PE7T9PB13T8PB5T7PC0T6PA7T5PA6T4VSST3PC3T2PC2T1PE2R18DDR_DQ10R17DDR_A8R16VSSR15VDDQ_DDRR14VSSR13VDDCORER12VSSR11VDDR10VSSR9VDDR8VSSR7VDDR6VSSR5VSSAR4PA4R3PA0R2VSSR1PA14P19DDR_CKEP18DDR_DQ8P17DDR_A4P15VSSP14VDDQ_DDRP13VSSP12VDDCOREP11VSSP10VDDP9VSSP8VDDP7VSSP6VDDP5VSSAP4PA5P3PA3P2PA13P1PWR_LPN19DDR_ATON18DDR_A14N17DDR_BA1N16DDR_A6N15VDDQ_DDRN14VSSN13VDDCOREN12VSSN11VDDCOREN10VSSN9VDDN8VSSN7VDDN6VSSN5VDDN4VSSAN3VREF+N2PDR_ONN1PDR_ON_ COREM19DDR_A10M18DDR_A11M17DDR_A1M15VSSM14VDDQ_DDRM13VSSM12VDDCOREM11VSSM10VDDCOREM9VSSM8VDDM7VSSM6VDDM5VSSM4VDDAM3VREF -M2PH1 - OSC_OUM1PH0 OSC IN -L19DDR_CLKPL18DDR_RASNL17DDR_A12L16DDR_A15L15VDDQ_DDRL14VSSL13VDDCOREL12VSSL11VDDCOREL10VSSL9VDDCOREL8VSSL7VDDL6VSSL5VDDL4VSS_ANAL3VDD_ANAL2BOOT2L1PWR_ONK19DDR_CLKNK18DDR_DTO0K17DDR_CASNK15VSSK14VDDQ_DDRK13VSSK12VDDCOREK11VSSK10VDDCOREGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8231.1226.1221.0215.9210.8205.7200.7195.6190.5185.4180.3175.3170.2165.1160.0154.9149.9144.8139.7134.6129.5124.5119.4114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3-119.4-124.5-129.5-134.6-139.7-144.8-149.9-154.9-160.0-165.1-170.2-175.3-180.3-185.4-190.5-195.6-200.7-205.7-210.8-215.9-221.0-226.1-231.1mm
2. 2D FOOTPRINT
W19W18W17W16W15W14W13W12W11W10W9W8W7W6W5W4W3W2W1V19V18V17V16V15V14V13V12V11V10V9V8V7V6V5V4V3V2V1U19U18U17U16U15U14U13U12U11U10U9U8U7U6U5U4U3U2U1T19T18T17T16T15T14T13T12T11T10T9T8T7T6T5T4T3T2T1R18R17R16R15R14R13R12R11R10R9R8R7R6R5R4R3R2R1P19P18P17P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1N19N18N17N16N15N14N13N12N11N10N9N8N7N6N5N4N3N2N1M19M18M17M15M14M13M12M11M10M9M8M7M6M5M4M3M2M1L19L18L17L16L15L14L13L12L11L10L9L8L7L6L5L4L3L2L1K19K18K17K15K14K13K12K11K10K9K8K7K6K5K4K3K2K1J19J18J17J16J15J14J13J12J11J10J9J8J7J6J5J4J3J2J1H19H18H17H15H14H13H12H11H10H9H8H7H6H5H4H3H2H1G19G18G17G16G15G14G13G12G11G10G9G8G7G6G5G4G3G2G1F19F18F17F15F14F13F12F11F10F9F8F7F6F5F4F3F2F1E18E17E16E15E14E13E12E11E10E9E8E7E6E5E4E3E2E1D19D18D17D16D15D14D13D12D11D10D9D8D7D6D5D4D3D2D1C19C18C17C16C15C14C13C12C11C10C9C8C7C6C5C4C3C2C1B19B18B17B16B15B14B13B12B11B10B9B8B7B6B5B4B3B2B1A19A18A17A16A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1E=16.00mm · Pitch e=0.80mmD=16.00mm-12-10-8-6-4-2024681012121086420-2-4-6-8-10-12mm
3. 3D CAD MODEL
Package Body: 16.00mm × 16.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (354/354)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VSSGNDGround Reference Pin (VSS)
A2PG15I/OMultiplexed I/O & Peripheral Pin PG15 (UART, SPI, I2C)
A3PD0I/OMultiplexed I/O & Peripheral Pin PD0 (UART, I2C)
A4PD1I/OMultiplexed I/O & Peripheral Pin PD1 (UART, I2C)
A5PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
A6PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
A7PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI)
A8PB15I/OMultiplexed I/O & Peripheral Pin PB15 (UART, SPI, RTC/CLK)
A9PC7I/OMultiplexed I/O & Peripheral Pin PC7 (UART)
A10PC9I/OMultiplexed I/O & Peripheral Pin PC9 (PWM)
A11PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
A12VDD_UnusedPowerPower Supply Input (VDD_Unused — 3.3V VDD (Max 4.0V))
A13DNUI/OMultiplexed I/O & Peripheral Pin DNU (General)
A14DNUI/OMultiplexed I/O & Peripheral Pin DNU (General)
A15DNUI/OMultiplexed I/O & Peripheral Pin DNU (General)
A16VDD1V2_Unus edPowerPower Supply Input (VDD1V2_Unus ed — 3.3V VDD (Max 4.0V))
A17DDR_DQ0I/OMultiplexed I/O & Peripheral Pin DDR_DQ0 (General)
A18DDR_DQ1I/OMultiplexed I/O & Peripheral Pin DDR_DQ1 (General)
A19VSSGNDGround Reference Pin (VSS)
B1PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
B2VSSGNDGround Reference Pin (VSS)
B3PE6I/OMultiplexed I/O & Peripheral Pin PE6 (SPI)
B4PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART, I2C)
B5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C)
B6VSSGNDGround Reference Pin (VSS)
B7PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI)
B8PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI, I2C, RTC/CLK)
B9PB4I/OMultiplexed I/O & Peripheral Pin PB4 (SPI, PWM)
B10PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
B11PE4I/OMultiplexed I/O & Peripheral Pin PE4 (SPI)
B12VDDA1V8_Un usedPowerPower Supply Input (VDDA1V8_Un used — 3.3V VDD (Max 4.0V))
B13DNUI/OMultiplexed I/O & Peripheral Pin DNU (General)
B14DNUI/OMultiplexed I/O & Peripheral Pin DNU (General)
B15DNUI/OMultiplexed I/O & Peripheral Pin DNU (General)
B16VDD1V2_Unus edPowerPower Supply Input (VDD1V2_Unus ed — 3.3V VDD (Max 4.0V))
B17DDR_DQ3I/OMultiplexed I/O & Peripheral Pin DDR_DQ3 (General)
B18DDR_DQ7I/OMultiplexed I/O & Peripheral Pin DDR_DQ7 (General)
B19DDR_DQS0NI/OMultiplexed I/O & Peripheral Pin DDR_DQS0N (General)
C1PE11I/OMultiplexed I/O & Peripheral Pin PE11 (SPI, PWM)
C2PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
C3VSSGNDGround Reference Pin (VSS)
C4PE0I/OMultiplexed I/O & Peripheral Pin PE0 (SPI)
C5PD10I/OMultiplexed I/O & Peripheral Pin PD10 (SPI, RTC/CLK)
C6PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
C7PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI)
C8PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, SPI, PWM)
C9PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
C10PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI, RTC/CLK)
C11PC8I/OMultiplexed I/O & Peripheral Pin PC8 (UART, PWM)
C12VSSGNDGround Reference Pin (VSS)
C13VSSGNDGround Reference Pin (VSS)
C14VSSGNDGround Reference Pin (VSS)
C15VSSGNDGround Reference Pin (VSS)
C16VSSGNDGround Reference Pin (VSS)
C17VSSGNDGround Reference Pin (VSS)
C18DDR_DQM0I/OMultiplexed I/O & Peripheral Pin DDR_DQM0 (General)
C19DDR_DQS0PI/OMultiplexed I/O & Peripheral Pin DDR_DQS0P (General)
D1VSSGNDGround Reference Pin (VSS)
D2PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, PWM)
D3PE14I/OMultiplexed I/O & Peripheral Pin PE14 (UART, PWM)
D4VSSGNDGround Reference Pin (VSS)
D5VSSGNDGround Reference Pin (VSS)
D6PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART)
D7PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
D8VSSGNDGround Reference Pin (VSS)
D9PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI)
D10PC6I/OMultiplexed I/O & Peripheral Pin PC6 (UART)
D11PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
D12NJTRSTI/OMultiplexed I/O & Peripheral Pin NJTRST (SWD/JTAG)
D13JTDII/OMultiplexed I/O & Peripheral Pin JTDI (SWD/JTAG)
D14JTDO - TRACESWOI/OMultiplexed I/O & Peripheral Pin JTDO - TRACESWO (SWD/JTAG)
D15JTMS SWDIO -I/OMultiplexed I/O & Peripheral Pin JTMS SWDIO - (SWD/JTAG)
D16JTCKSWCLK -I/OMultiplexed I/O & Peripheral Pin JTCKSWCLK - (SWD/JTAG)
D17DDR_DQ5I/OMultiplexed I/O & Peripheral Pin DDR_DQ5 (General)
D18DDR_DQ2I/OMultiplexed I/O & Peripheral Pin DDR_DQ2 (General)
D19DDR_DQ6I/OMultiplexed I/O & Peripheral Pin DDR_DQ6 (General)
E1PE15I/OMultiplexed I/O & Peripheral Pin PE15 (UART, SPI)
E2VSSGNDGround Reference Pin (VSS)
E3PD6I/OMultiplexed I/O & Peripheral Pin PD6 (SPI)
E4VSSGNDGround Reference Pin (VSS)
E5VSSGNDGround Reference Pin (VSS)
E6VSSGNDGround Reference Pin (VSS)
E7VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
E8VSSGNDGround Reference Pin (VSS)
E9VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
E10VSSGNDGround Reference Pin (VSS)
E11VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
E12VSSGNDGround Reference Pin (VSS)
E13VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
E14VSSGNDGround Reference Pin (VSS)
E15VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
E16VSSGNDGround Reference Pin (VSS)
E17DDR_A7I/OMultiplexed I/O & Peripheral Pin DDR_A7 (General)
E18DDR_DQ4I/OMultiplexed I/O & Peripheral Pin DDR_DQ4 (General)
F1PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART, SPI)
F2PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
F3PD14I/OMultiplexed I/O & Peripheral Pin PD14 (UART)
F4VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
F5VSSGNDGround Reference Pin (VSS)
F6VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
F7VSSGNDGround Reference Pin (VSS)
F8VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
F9VSSGNDGround Reference Pin (VSS)
F10VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
F11VSSGNDGround Reference Pin (VSS)
F12VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
F13VSS_PLL2GNDGround Reference Pin (VSS_PLL2)
F14VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
F15VSSGNDGround Reference Pin (VSS)
F17DDR_A13I/OMultiplexed I/O & Peripheral Pin DDR_A13 (General)
F18DDR_ZQI/OMultiplexed I/O & Peripheral Pin DDR_ZQ (General)
F19DDR_A3I/OMultiplexed I/O & Peripheral Pin DDR_A3 (General)
G1PD15I/OMultiplexed I/O & Peripheral Pin PD15 (UART)
G2VSSGNDGround Reference Pin (VSS)
G3PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
G4VSSGNDGround Reference Pin (VSS)
G5VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
G6VSSGNDGround Reference Pin (VSS)
G7VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
G8VSSGNDGround Reference Pin (VSS)
G9VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
G10VSSGNDGround Reference Pin (VSS)
G11VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
G12VSSGNDGround Reference Pin (VSS)
G13VDD_PLL2PowerPower Supply Input (VDD_PLL2 — 3.3V VDD (Max 4.0V))
G14VSSGNDGround Reference Pin (VSS)
G15VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
G16DDR_ RESETNISystem Enable & Hardware Reset (DDR_ RESETN)
G17DDR_A9I/OMultiplexed I/O & Peripheral Pin DDR_A9 (General)
G18DDR_A2I/OMultiplexed I/O & Peripheral Pin DDR_A2 (General)
G19DDR_BA0I/OMultiplexed I/O & Peripheral Pin DDR_BA0 (General)
H1PC14 - OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (RTC/CLK)
H2PC15 - OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15 - OSC32_OUT (RTC/CLK)
H3VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
H4VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
H5VSSGNDGround Reference Pin (VSS)
H6VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
H7VSSGNDGround Reference Pin (VSS)
H8VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
H9VSSGNDGround Reference Pin (VSS)
H10VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
H11VSSGNDGround Reference Pin (VSS)
H12VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
H13VSSGNDGround Reference Pin (VSS)
H14VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
H15VSSGNDGround Reference Pin (VSS)
H17DDR_A5I/OMultiplexed I/O & Peripheral Pin DDR_A5 (General)
H18DDR_A0I/OMultiplexed I/O & Peripheral Pin DDR_A0 (General)
H19DDR_ODTI/OMultiplexed I/O & Peripheral Pin DDR_ODT (General)
J1NRSTISystem Enable & Hardware Reset (NRST)
J2NRST_COREI/OMultiplexed I/O & Peripheral Pin NRST_CORE (General)
J3VSSGNDGround Reference Pin (VSS)
J4VSS_PLLGNDGround Reference Pin (VSS_PLL)
J5VDD_PLLPowerPower Supply Input (VDD_PLL — 3.3V VDD (Max 4.0V))
J6VSSGNDGround Reference Pin (VSS)
J7VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
J8VSSGNDGround Reference Pin (VSS)
J9VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
J10VSSGNDGround Reference Pin (VSS)
J11VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
J12VSSGNDGround Reference Pin (VSS)
J13VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
J14VSSGNDGround Reference Pin (VSS)
J15VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
J16DDR_BA2I/OMultiplexed I/O & Peripheral Pin DDR_BA2 (General)
J17DDR_WENI/OMultiplexed I/O & Peripheral Pin DDR_WEN (General)
J18DDR_CSNI/OMultiplexed I/O & Peripheral Pin DDR_CSN (SPI)
J19DDR_DTO1I/OMultiplexed I/O & Peripheral Pin DDR_DTO1 (General)
K1BOOT0IInput-Only Pin BOOT0 (General)
K2VSSGNDGround Reference Pin (VSS)
K3PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
K4BOOT1I/OMultiplexed I/O & Peripheral Pin BOOT1 (General)
K5VSSGNDGround Reference Pin (VSS)
K6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K7VSSGNDGround Reference Pin (VSS)
K8VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
K9VSSGNDGround Reference Pin (VSS)
K10VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
K11VSSGNDGround Reference Pin (VSS)
K12VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
K13VSSGNDGround Reference Pin (VSS)
K14VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
K15VSSGNDGround Reference Pin (VSS)
K17DDR_CASNI/OMultiplexed I/O & Peripheral Pin DDR_CASN (General)
K18DDR_DTO0I/OMultiplexed I/O & Peripheral Pin DDR_DTO0 (General)
K19DDR_CLKNI/OMultiplexed I/O & Peripheral Pin DDR_CLKN (General)
L1PWR_ONI/OMultiplexed I/O & Peripheral Pin PWR_ON (General)
L2BOOT2I/OMultiplexed I/O & Peripheral Pin BOOT2 (General)
L3VDD_ANAPowerPower Supply Input (VDD_ANA — 3.3V VDD (Max 4.0V))
L4VSS_ANAGNDGround Reference Pin (VSS_ANA)
L5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
L6VSSGNDGround Reference Pin (VSS)
L7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
L8VSSGNDGround Reference Pin (VSS)
L9VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
L10VSSGNDGround Reference Pin (VSS)
L11VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
L12VSSGNDGround Reference Pin (VSS)
L13VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
L14VSSGNDGround Reference Pin (VSS)
L15VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
L16DDR_A15I/OMultiplexed I/O & Peripheral Pin DDR_A15 (General)
L17DDR_A12I/OMultiplexed I/O & Peripheral Pin DDR_A12 (General)
L18DDR_RASNI/OMultiplexed I/O & Peripheral Pin DDR_RASN (General)
L19DDR_CLKPI/OMultiplexed I/O & Peripheral Pin DDR_CLKP (General)
M1PH0 OSC IN -_I/OMultiplexed I/O & Peripheral Pin PH0 OSC IN -_ (RTC/CLK)
M2PH1 - OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1 - OSC_OUT (RTC/CLK)
M3VREF -AnalogMultiplexed I/O & Peripheral Pin VREF - (General)
M4VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
M5VSSGNDGround Reference Pin (VSS)
M6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M7VSSGNDGround Reference Pin (VSS)
M8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
M9VSSGNDGround Reference Pin (VSS)
M10VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
M11VSSGNDGround Reference Pin (VSS)
M12VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
M13VSSGNDGround Reference Pin (VSS)
M14VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
M15VSSGNDGround Reference Pin (VSS)
M17DDR_A1I/OMultiplexed I/O & Peripheral Pin DDR_A1 (General)
M18DDR_A11I/OMultiplexed I/O & Peripheral Pin DDR_A11 (General)
M19DDR_A10I/OMultiplexed I/O & Peripheral Pin DDR_A10 (General)
N1PDR_ON_ COREI/OMultiplexed I/O & Peripheral Pin PDR_ON_ CORE (General)
N2PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
N3VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
N4VSSAGNDGround Reference Pin (VSSA)
N5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N6VSSGNDGround Reference Pin (VSS)
N7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N8VSSGNDGround Reference Pin (VSS)
N9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N10VSSGNDGround Reference Pin (VSS)
N11VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
N12VSSGNDGround Reference Pin (VSS)
N13VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
N14VSSGNDGround Reference Pin (VSS)
N15VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
N16DDR_A6I/OMultiplexed I/O & Peripheral Pin DDR_A6 (General)
N17DDR_BA1I/OMultiplexed I/O & Peripheral Pin DDR_BA1 (General)
N18DDR_A14I/OMultiplexed I/O & Peripheral Pin DDR_A14 (General)
N19DDR_ATOI/OMultiplexed I/O & Peripheral Pin DDR_ATO (General)
P1PWR_LPI/OMultiplexed I/O & Peripheral Pin PWR_LP (General)
P2PA13I/OMultiplexed I/O & Peripheral Pin PA13 (UART, RTC/CLK)
P3PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
P4PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
P5VSSAGNDGround Reference Pin (VSSA)
P6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
P7VSSGNDGround Reference Pin (VSS)
P8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
P9VSSGNDGround Reference Pin (VSS)
P10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
P11VSSGNDGround Reference Pin (VSS)
P12VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
P13VSSGNDGround Reference Pin (VSS)
P14VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
P15VSSGNDGround Reference Pin (VSS)
P17DDR_A4I/OMultiplexed I/O & Peripheral Pin DDR_A4 (General)
P18DDR_DQ8I/OMultiplexed I/O & Peripheral Pin DDR_DQ8 (General)
P19DDR_CKEI/OMultiplexed I/O & Peripheral Pin DDR_CKE (General)
R1PA14I/OMultiplexed I/O & Peripheral Pin PA14 (RTC/CLK)
R2VSSGNDGround Reference Pin (VSS)
R3PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, SPI, ADC, PWM)
R4PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
R5VSSAGNDGround Reference Pin (VSSA)
R6VSSGNDGround Reference Pin (VSS)
R7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
R8VSSGNDGround Reference Pin (VSS)
R9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
R10VSSGNDGround Reference Pin (VSS)
R11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
R12VSSGNDGround Reference Pin (VSS)
R13VDDCOREPowerPower Supply Input (VDDCORE — 3.3V VDD (Max 4.0V))
R14VSSGNDGround Reference Pin (VSS)
R15VDDQ_DDRPowerPower Supply Input (VDDQ_DDR — 3.3V VDD (Max 4.0V))
R16VSSGNDGround Reference Pin (VSS)
R17DDR_A8I/OMultiplexed I/O & Peripheral Pin DDR_A8 (General)
R18DDR_DQ10I/OMultiplexed I/O & Peripheral Pin DDR_DQ10 (General)
T1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (UART, I2C)
T2PC2I/OMultiplexed I/O & Peripheral Pin PC2 (UART, SPI, ADC)
T3PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC)
T4VSSGNDGround Reference Pin (VSS)
T5PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC)
T6PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, I2C, ADC, PWM)
T7PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC)
T8PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C, PWM)
T9PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
T10PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
T11PE8I/OMultiplexed I/O & Peripheral Pin PE8 (UART, PWM)
T12PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C)
T13PB2I/OMultiplexed I/O & Peripheral Pin PB2 (UART, SPI, I2C, RTC/CLK)
T14PG9I/OMultiplexed I/O & Peripheral Pin PG9 (UART)
T15BYPASS_ REG1V8I/OMultiplexed I/O & Peripheral Pin BYPASS_ REG1V8 (General)
T16PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, SPI)
T17DDR_DQ9I/OMultiplexed I/O & Peripheral Pin DDR_DQ9 (General)
T18DDR_DQ13I/OMultiplexed I/O & Peripheral Pin DDR_DQ13 (General)
T19DDR_DQS1NI/OMultiplexed I/O & Peripheral Pin DDR_DQS1N (General)
U1PG14I/OMultiplexed I/O & Peripheral Pin PG14 (UART, SPI)
U2PG13I/OMultiplexed I/O & Peripheral Pin PG13 (UART, SPI)
U3VSSGNDGround Reference Pin (VSS)
U4PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
U5PF11I/OMultiplexed I/O & Peripheral Pin PF11 (SPI, ADC)
U6VSSGNDGround Reference Pin (VSS)
U7PG8I/OMultiplexed I/O & Peripheral Pin PG8 (UART, SPI)
U8VSSGNDGround Reference Pin (VSS)
U9PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
U10PF8I/OMultiplexed I/O & Peripheral Pin PF8 (UART, SPI)
U11PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, I2C)
U12PD13I/OMultiplexed I/O & Peripheral Pin PD13 (SPI, I2C)
U13VSS_USBHSGNDGround Reference Pin (VSS_USBHS)
U14VSS_USBHSGNDGround Reference Pin (VSS_USBHS)
U15OTG_VBUSPowerPower Supply Input (OTG_VBUS — 3.3V VDD (5V-Tolerant FT))
U16PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, I2C)
U17VSSGNDGround Reference Pin (VSS)
U18DDR_DQM1I/OMultiplexed I/O & Peripheral Pin DDR_DQM1 (General)
U19DDR_DQS1PI/OMultiplexed I/O & Peripheral Pin DDR_DQS1P (General)
V1PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, I2C, PWM)
V2PC1I/OMultiplexed I/O & Peripheral Pin PC1 (SPI, ADC)
V3PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
V4PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
V5PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C)
V6PG11I/OMultiplexed I/O & Peripheral Pin PG11 (UART)
V7PG10I/OMultiplexed I/O & Peripheral Pin PG10 (UART)
V8PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, SPI, I2C)
V9PF6I/OMultiplexed I/O & Peripheral Pin PF6 (SPI)
V10PE10I/OMultiplexed I/O & Peripheral Pin PE10 (UART, PWM)
V11VDDA1V8_ REGPowerPower Supply Input (VDDA1V8_ REG — 3.3V VDD (Max 4.0V))
V12VSS_USBHSGNDGround Reference Pin (VSS_USBHS)
V13USB_DM2I/OMultiplexed I/O & Peripheral Pin USB_DM2 (USB)
V14USB_DP1I/OMultiplexed I/O & Peripheral Pin USB_DP1 (USB)
V15VSS_USBHSGNDGround Reference Pin (VSS_USBHS)
V16USB_RREFI/OMultiplexed I/O & Peripheral Pin USB_RREF (USB)
V17PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, I2C, PWM)
V18DDR_DQ14I/OMultiplexed I/O & Peripheral Pin DDR_DQ14 (General)
V19DDR_DQ11I/OMultiplexed I/O & Peripheral Pin DDR_DQ11 (General)
W1VSSGNDGround Reference Pin (VSS)
W2PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
W3PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, ADC, PWM)
W4PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
W5PB10I/OMultiplexed I/O & Peripheral Pin PB10 (SPI, I2C, PWM)
W6PB8I/OMultiplexed I/O & Peripheral Pin PB8 (UART)
W7PE9I/OMultiplexed I/O & Peripheral Pin PE9 (UART, PWM)
W8PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
W9PF9I/OMultiplexed I/O & Peripheral Pin PF9 (UART, SPI)
W10PG7I/OMultiplexed I/O & Peripheral Pin PG7 (UART)
W11VDDA1V1_ REGPowerPower Supply Input (VDDA1V1_ REG — 3.3V VDD (Max 4.0V))
W12VDD3V3_ USBHSPowerPower Supply Input (VDD3V3_ USBHS — 3.3V VDD (Max 4.0V))
W13USB_DP2I/OMultiplexed I/O & Peripheral Pin USB_DP2 (USB)
W14USB_DM1I/OMultiplexed I/O & Peripheral Pin USB_DM1 (USB)
W15VDD3V3_ USBFSPowerPower Supply Input (VDD3V3_ USBFS — 3.3V VDD (Max 4.0V))
W16DDR_VREFAnalogMultiplexed I/O & Peripheral Pin DDR_VREF (General)
W17DDR_DQ15I/OMultiplexed I/O & Peripheral Pin DDR_DQ15 (General)
W18DDR_DQ12I/OMultiplexed I/O & Peripheral Pin DDR_DQ12 (General)
W19VSSGNDGround Reference Pin (VSS)
PIN A1 VSS
GND
Ground Reference Pin (VSS)
Design note: 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 20 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32MP153AAB3 (ST · LFBGA-354)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32MP153AAB3 (LFBGA-354) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32MP153AAB3 (LFBGA-354) - 2. Standard Pinout (Top View)
True package pinout (354 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32MP153AAB3 (LFBGA-354) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32MP153AAB3 (LFBGA-354) - 4. Package Dimensions (D×E×A)
LFBGA-354 · 16.00×16.00mm · Pitch 0.80mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32MP153AAB3 (LFBGA-354) - 5. Recommended Land Pattern
IPC-7351B Footprint (354 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32MP153AAB3 (LFBGA-354) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (20 figures · Page 1/2)
Showing 1–12 of 20 uncropped original figures for STM32MP153
P1 · p01_fig01EXACT PACKAGE
STM32MP153AAB3 (LFBGA-354) — • 32-bit dual-core Arm® Cortex®-A7 - L1 32-Kbyte I / 32-Kbyte D for each core - 256-Kbyte unified level 2 cache - Arm® NEON™ and Arm® TrustZone®
• 32-bit dual-core Arm® Cortex®-A7 - L1 32-Kbyte I / 32-Kbyte D for each core - 256-Kbyte unified level 2 cache - Arm® NEON™ and Arm® TrustZone®
P239 · p239_fig01EXACT PACKAGE
STM32MP153AAB3 (LFBGA-354) — Figure 69. LFBGA354 - Outline
Figure 69. LFBGA354 - Outline
P239 · p239_fig02EXACT PACKAGE
STM32MP153AAB3 (LFBGA-354) — DS12502 Rev 6 239/256 | 250 | Table 116. LFBGA354 - Mechanical data | Symbol | millimeters inches(1) | Min Typ Max Min Typ Max | A(2) - - 1.290 - - 0.0508 | A1(3) 0.250 - - 0.0098 - - | A2 - 0.900 - - 0.0354 - | b(4) 0.350 0.400 0.450 0.013
DS12502 Rev 6 239/256 | 250 | Table 116. LFBGA354 - Mechanical data | Symbol | millimeters inches(1) | Min Typ Max Min Typ Max | A(2) - - 1.290 - - 0.0508 | A1(3) 0.250 - - 0.0098 - - | A2 - 0.900 - - 0.0354 - | b(4) 0.350 0.400 0.450 0.013
P240 · p240_fig01EXACT PACKAGE
STM32MP153AAB3 (LFBGA-354) — Figure 70. LFBGA354 - Recommended footprint
Figure 70. LFBGA354 - Recommended footprint
P241 · p241_fig01EXACT PACKAGE
STM32MP153AAB3 (LFBGA-354) — Figure 71. LFBGA354 marking (package top view)
Figure 71. LFBGA354 marking (package top view)
P56 · p56_fig011751×1815px
STM32MP153AAB3 (LFBGA-354) — Figure 5. STM32MP153A/DADxx TFBGA257 pinout
Figure 5. STM32MP153A/DADxx TFBGA257 pinout
P56 · p56_fig01P56
STM32MP153AAB3 (LFBGA-354) — Datasheet Page 56 (p56_fig01)
Datasheet Page 56 (p56_fig01)
P58 · p58_fig011751×1814px
STM32MP153AAB3 (LFBGA-354) — Figure 7. STM32MP153A/DACxx TFBGA361 pinout
Figure 7. STM32MP153A/DACxx TFBGA361 pinout
P120 · p120_fig011751×1939px
STM32MP153AAB3 (LFBGA-354) — Figure 11. Power supply scheme VDDA1V1_REG
Figure 11. Power supply scheme VDDA1V1_REG
P120 · p120_fig01P120
STM32MP153AAB3 (LFBGA-354) — Datasheet Page 120 (p120_fig01)
Datasheet Page 120 (p120_fig01)
P148 · p148_fig011546×498px
STM32MP153AAB3 (LFBGA-354) — Figure 19. Typical application with a 24 MHz crystal fHSE CL1
Figure 19. Typical application with a 24 MHz crystal fHSE CL1
P149 · p149_fig011546×497px
STM32MP153AAB3 (LFBGA-354) — Figure 20. Typical application with a 32.768 kHz crystal fHSE CL1
Figure 20. Typical application with a 32.768 kHz crystal fHSE CL1
Page 1 / 2 (20 extracted figures)

Technical Specifications & Part Details (STM32MP153AAB3)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32MP153AAB3 (LFBGA-354) is a 354-pin embedded microcontroller unit (mcu) featuring a 16.00 × 16.00 × 1.20 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
800 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
114 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
16.00 × 16.00 × 1.20 mm (A1=0.30 mm)
Package family: BGA (LFBGA-354)
Pin Count & Lead PitchN / e
354 Pins | Pitch e = 0.80 mm (31.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0, BOOT1): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol354 auto-grouped pins
OK
IPC-7351B Land Pattern354 pads · Pitch 0.80mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — STM32MP153 (12)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (LFBGA-354)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
16.00 × 16.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.20mm · e=0.80mm
Pad Size (W × L)Level B
0.32 × 0.32 mm
Pins / Total PadsTopology
354P / 354Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LFBGA-354
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32MP153AAB3 (LFBGA-354)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32MP153AAB3 (LFBGA-354)?

Manufactured by ST, the STM32MP153AAB3 is housed in a LFBGA-354 package with 354 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PG15: Multiplexed I/O & Peripheral Pin PG15 (UART, SPI, I2C)), A3 (PD0: Multiplexed I/O & Peripheral Pin PD0 (UART, I2C)), A4 (PD1: Multiplexed I/O & Peripheral Pin PD1 (UART, I2C)), A5 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), A6 (PG6: Multiplexed I/O & Peripheral Pin PG6 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32MP153AAB3?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32MP153AAB3 (LFBGA-354) has a nominal body envelope of 16.00 × 16.00 mm, pitch e = 0.80 mm, and 354 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32MP153AAB3?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32MP153AAB3 (ST, LFBGA-354) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (354 pins) & STM32MP153 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A2PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA. Supported peripheral buses: UART, SPI, I2C.
A3PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: UART, I2C.
A4PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: UART, I2C.
A5PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
A6PG6Digital_IOSignal terminal PG6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG6. Supported peripheral buses: General.
A7PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK. Supported peripheral buses: UART, SPI.
A8PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: UART, SPI, RTC/CLK.
A9PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: UART.
A10PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: PWM.
A11PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
A12VDD_UnusedPower_InPrimary positive power supply input (VDD_Unused) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A13DNUDigital_IOSignal terminal DNU (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DNU. Supported peripheral buses: General.
A14DNUDigital_IOSignal terminal DNU (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DNU. Supported peripheral buses: General.
A15DNUDigital_IOSignal terminal DNU (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DNU. Supported peripheral buses: General.
A16VDD1V2_Unus edPower_InPrimary positive power supply input (VDD1V2_Unus ed) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A17DDR_DQ0Digital_IOSignal terminal DDR_DQ0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQ0. Supported peripheral buses: General.
A18DDR_DQ1Digital_IOSignal terminal DDR_DQ1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQ1. Supported peripheral buses: General.
A19VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B1PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
B2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B3PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI_SAI1SDA. Supported peripheral buses: SPI.
B4PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: UART, I2C.
B5PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, I2C.
B6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B7PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO_SAI1SCKA. Supported peripheral buses: SPI.
B8PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL, SPI3_MOSI. Supported peripheral buses: UART, SPI, I2C, RTC/CLK.
B9PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO, SPI2_NSS, SPI6_MISOSDMMC2D3. Supported peripheral buses: SPI, PWM.
B10PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
B11PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS_SAI1FSA. Supported peripheral buses: SPI.
B12VDDA1V8_Un usedPower_InPrimary positive power supply input (VDDA1V8_Un used) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B13DNUDigital_IOSignal terminal DNU (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DNU. Supported peripheral buses: General.
B14DNUDigital_IOSignal terminal DNU (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DNU. Supported peripheral buses: General.
B15DNUDigital_IOSignal terminal DNU (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DNU. Supported peripheral buses: General.
B16VDD1V2_Unus edPower_InPrimary positive power supply input (VDD1V2_Unus ed) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B17DDR_DQ3Digital_IOSignal terminal DDR_DQ3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQ3. Supported peripheral buses: General.
B18DDR_DQ7Digital_IOSignal terminal DDR_DQ7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQ7. Supported peripheral buses: General.
B19DDR_DQS0NDigital_IOSignal terminal DDR_DQS0N (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQS0N. Supported peripheral buses: General.
C1PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSSUSART6CK. Supported peripheral buses: SPI, PWM.
C2PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: General.
C3VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C4PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: SPI.
C5PD10Digital_IOSignal terminal PD10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: SPI, RTC/CLK.
C6PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI.
C7PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI.
C8PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, PWM.
C9PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, PWM.
C10PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, RTC/CLK.
C11PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: UART, PWM.
C12VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C13VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C14VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C15VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C16VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C17VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C18DDR_DQM0Digital_IOSignal terminal DDR_DQM0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQM0. Supported peripheral buses: General.
C19DDR_DQS0PDigital_IOSignal terminal DDR_DQS0P (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: DDR_DQS0P. Supported peripheral buses: General.
D1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D2PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCKSDMMC1D0DIR. Supported peripheral buses: SPI, PWM.
D3PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: UART, PWM.
D4VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D5VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D6PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: UART.
D7PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART.
ExplorePartsPackagesMFRsUpload