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Mechanical Dimensions & Land Pattern (PBGA-272(27x27))
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
27.00 × 27.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.35mm · e=1.27mm
Pad Size (W × L)Level B
0.56 × 0.56 mm
Pins / Total PadsTopology
272P / 272Pad (BGA_GRID)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit PBGA-272(27x27) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — MT90869AG2 (PBGA-272(27x27))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of MT90869AG2 (PBGA-272(27x27))?
Manufactured by MICROCHIP, the MT90869AG2 is housed in a PBGA-272(27x27) package with 272 pins and a 1.27 mm lead pitch. Key pins include: A1 (PA1: Multiplexed I/O & Peripheral Pin PA1 (General)), A2 (PA2: Multiplexed I/O & Peripheral Pin PA2 (General)), A3 (PA3: Multiplexed I/O & Peripheral Pin PA3 (General)), A4 (PA4: Multiplexed I/O & Peripheral Pin PA4 (General)), A5 (PA5: Multiplexed I/O & Peripheral Pin PA5 (General)), A6 (PA6: Multiplexed I/O & Peripheral Pin PA6 (General)).
What are the IPC-7351B PCB Footprint dimensions for MT90869AG2?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MT90869AG2 (PBGA-272(27x27)) has a nominal body envelope of 27.00 × 27.00 mm, pitch e = 1.27 mm, and 272 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MT90869AG2?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MT90869AG2 (MICROCHIP, PBGA-272(27x27)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (272 pins) & MT90869 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | PA1 | Digital_IO | Signal terminal PA1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General. |
| A2 | PA2 | Digital_IO | Signal terminal PA2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General. |
| A3 | PA3 | Digital_IO | Signal terminal PA3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General. |
| A4 | PA4 | Digital_IO | Signal terminal PA4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General. |
| A5 | PA5 | Digital_IO | Signal terminal PA5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General. |
| A6 | PA6 | Digital_IO | Signal terminal PA6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General. |
| A7 | PA7 | Digital_IO | Signal terminal PA7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General. |
| A8 | A0 A14 - | Digital_IO | Signal terminal A0 A14 - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A0 A14 -. Supported peripheral buses: General. |
| A9 | A0 A14 - | Digital_IO | Signal terminal A0 A14 - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A0 A14 -. Supported peripheral buses: General. |
| A10 | PA10 | Digital_IO | Signal terminal PA10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General. |
| A11 | DS | Digital_IO | Signal terminal DS (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DS. Supported peripheral buses: General. |
| A12 | ODE | Digital_IO | Signal terminal ODE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: ODE. Supported peripheral buses: General. |
| A13 | DTA | Digital_IO | Signal terminal DTA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DTA. Supported peripheral buses: General. |
| A14 | TCK | Digital_IO | Signal terminal TCK (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TCK. Supported peripheral buses: General. |
| A15 | PA15 | Digital_IO | Signal terminal PA15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General. |
| A16 | PA16 | Digital_IO | Signal terminal PA16 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA16. Supported peripheral buses: General. |
| A17 | PA17 | Digital_IO | Signal terminal PA17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA17. Supported peripheral buses: General. |
| A18 | PA18 | Digital_IO | Signal terminal PA18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA18. Supported peripheral buses: General. |
| A19 | PA19 | Digital_IO | Signal terminal PA19 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA19. Supported peripheral buses: General. |
| A20 | PA20 | Digital_IO | Signal terminal PA20 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA20. Supported peripheral buses: General. |
| B1 | PB1 | Digital_IO | Signal terminal PB1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General. |
| B2 | PB2 | Digital_IO | Signal terminal PB2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General. |
| B3 | PB3 | Digital_IO | Signal terminal PB3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General. |
| B4 | PB4 | Digital_IO | Signal terminal PB4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General. |
| B5 | PB5 | Digital_IO | Signal terminal PB5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General. |
| B6 | PB6 | Digital_IO | Signal terminal PB6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General. |
| B7 | PB7 | Digital_IO | Signal terminal PB7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General. |
| B8 | A0 A14 - | Digital_IO | Signal terminal A0 A14 - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A0 A14 -. Supported peripheral buses: General. |
| B9 | A0 A14 - | Digital_IO | Signal terminal A0 A14 - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A0 A14 -. Supported peripheral buses: General. |
| B10 | PB10 | Digital_IO | Signal terminal PB10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General. |
| B11 | CS | Digital_IO | Signal terminal CS (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CS. Supported peripheral buses: General. |
| B12 | PB12 | Digital_IO | Signal terminal PB12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General. |
| B13 | TDi | Digital_IO | Signal terminal TDi (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TDi. Supported peripheral buses: SWD/JTAG. |
| B14 | TRST | Digital_IO | Signal terminal TRST (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TRST. Supported peripheral buses: General. |
| B15 | PB15 | Digital_IO | Signal terminal PB15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General. |
| B16 | PB16 | Digital_IO | Signal terminal PB16 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB16. Supported peripheral buses: General. |
| B17 | PB17 | Digital_IO | Signal terminal PB17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB17. Supported peripheral buses: General. |
| B18 | PB18 | Digital_IO | Signal terminal PB18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB18. Supported peripheral buses: General. |
| B19 | PB19 | Digital_IO | Signal terminal PB19 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB19. Supported peripheral buses: General. |
| B20 | LSTo0 31 - | Digital_IO | Signal terminal LSTo0 31 - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: LSTo0 31 -. Supported peripheral buses: General. |
| C1 | PC1 | Digital_IO | Signal terminal PC1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General. |
| C2 | PC2 | Digital_IO | Signal terminal PC2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General. |
| C3 | IC0 | Digital_IO | Signal terminal IC0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: IC0. Supported peripheral buses: General. |
| C4 | PC4 | Digital_IO | Signal terminal PC4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC4. Supported peripheral buses: General. |
| C5 | PC5 | Digital_IO | Signal terminal PC5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC5. Supported peripheral buses: General. |
| C6 | PC6 | Digital_IO | Signal terminal PC6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General. |
| C7 | PC7 | Digital_IO | Signal terminal PC7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General. |
| C8 | A0 A14 - | Digital_IO | Signal terminal A0 A14 - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A0 A14 -. Supported peripheral buses: General. |
| C9 | IC0 | Digital_IO | Signal terminal IC0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: IC0. Supported peripheral buses: General. |
| C10 | PC10 | Digital_IO | Signal terminal PC10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General. |
| C11 | R/W | Digital_IO | Signal terminal R/W (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: R/W. Supported peripheral buses: General. |
| C12 | RESET | Digital_IO | Active-low hardware reset terminal (RESET): pulling this pin Low resets the processor core and peripherals. |
| C13 | TDo | Digital_IO | Signal terminal TDo (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TDo. Supported peripheral buses: General. |
| C14 | PC14 | Digital_IO | Signal terminal PC14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC14. Supported peripheral buses: General. |
| C15 | PC15 | Digital_IO | Signal terminal PC15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC15. Supported peripheral buses: General. |
| C16 | PC16 | Digital_IO | Signal terminal PC16 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC16. Supported peripheral buses: General. |
| C17 | PC17 | Digital_IO | Signal terminal PC17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC17. Supported peripheral buses: General. |
| C18 | LSTo0 31 - | Digital_IO | Signal terminal LSTo0 31 - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: LSTo0 31 -. Supported peripheral buses: General. |
| C19 | LSTo0 31 - | Digital_IO | Signal terminal LSTo0 31 - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: LSTo0 31 -. Supported peripheral buses: General. |
| C20 | LSTo0 31 - | Digital_IO | Signal terminal LSTo0 31 - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: LSTo0 31 -. Supported peripheral buses: General. |
| D1 | PD1 | Digital_IO | Signal terminal PD1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General. |
| D2 | PD2 | Digital_IO | Signal terminal PD2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General. |
| D3 | PD3 | Digital_IO | Signal terminal PD3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General. |
| D4 | PD4 | Digital_IO | Signal terminal PD4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General. |