Mechanical Dimensions & Land Pattern (PDIP-24)
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
29.94 × 6.35 mm
Height (A) & Pitch (e)IPC-7351B
A=4.20mm · e=2.54mm
Pad Size (W × L)Level B
1.60 × 1.60 mm
Pins / Total PadsTopology
24P / 24Pad (THT_DIP)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit PDIP-24 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — ATF750CL-15PU (PDIP-24)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of ATF750CL-15PU (PDIP-24)?
Manufactured by MICROCHIP, the ATF750CL-15PU is housed in a PDIP-24 package with 24 pins and a 2.54 mm lead pitch, supporting a VCC supply range of 2.7V to 3.6V. Key pins include: 1 (CLK/IN: Multiplexed I/O & Peripheral Pin CLK/IN (General)), 2 (IN: Multiplexed I/O & Peripheral Pin IN (General)), 3 (IN: Multiplexed I/O & Peripheral Pin IN (General)), 4 (IN: Multiplexed I/O & Peripheral Pin IN (General)), 5 (IN: Multiplexed I/O & Peripheral Pin IN (General)), 6 (IN: Multiplexed I/O & Peripheral Pin IN (General)).
What are the IPC-7351B PCB Footprint dimensions for ATF750CL-15PU?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATF750CL-15PU (PDIP-24) has a nominal body envelope of 6.35 × 29.94 mm, pitch e = 2.54 mm, and 24 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATF750CL-15PU?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATF750CL-15PU (MICROCHIP, PDIP-24) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (24 pins) & ATF750 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | CLK/IN | Digital_IO | Signal terminal CLK/IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: CLK/IN. Supported peripheral buses: General. |
| 2 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 3 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 4 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 5 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 6 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 7 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 8 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 9 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 10 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 11 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 12 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 13 | IN | Digital_IO | Signal terminal IN (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General. |
| 14 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 15 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 16 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 17 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 18 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 19 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 20 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 21 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 22 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 23 | I/O | Digital_IO | Signal terminal I/O (I/O, 2.7V to 3.6V domain). Multiplexed alternate functions: I/O. Supported peripheral buses: General. |
| 24 | VCC | Power_In | Primary positive power supply input (VCC) operating in the 2.7V to 3.6V domain (Max rating: 3.6V). |