MCP6401T-E/OT (SOT-23-5) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of MCP6401T-E/OT (SOT-23-5)?

Manufactured by MICROCHIP, the MCP6401T-E/OT is housed in a SOT-23-5 package with 5 pins and a 0.95 mm lead pitch, supporting a VCC supply range of 1.8V to 6.0V. Key pins include: 1 (V V OUT, OUTA: Multiplexed I/O & Peripheral Pin V V OUT, OUTA (General)), 2 (VDD: Power Supply Input (VDD — 1.8V to 6.0V)), 3 (V IN+ V INA+ ,: Multiplexed I/O & Peripheral Pin V IN+ V INA+ , (General)), 4 (V V IN–, INA–: Multiplexed I/O & Peripheral Pin V V IN–, INA– (General)), 5 (VSS: Ground Reference Pin (VSS)).

Q: What are the IPC-7351B PCB Footprint dimensions for MCP6401T-E/OT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MCP6401T-E/OT (SOT-23-5) has a nominal body envelope of 1.60 × 2.90 mm, pitch e = 0.95 mm, and 5 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MCP6401T-E/OT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MCP6401T-E/OT (MICROCHIP, SOT-23-5) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 2.90mm × 1.60mm · Pitch: 0.95mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (5/5)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	V V OUT, OUTA	I/O	Multiplexed I/O & Peripheral Pin V V OUT, OUTA (General)
2	VDD	Power	Power Supply Input (VDD — 1.8V to 6.0V)
3	V IN+ V INA+ ,	I/O	Multiplexed I/O & Peripheral Pin V IN+ V INA+ , (General)
4	V V IN–, INA–	I/O	Multiplexed I/O & Peripheral Pin V V IN–, INA– (General)
5	VSS	GND	Ground Reference Pin (VSS)

PIN 1 V V OUT, OUTA

I/O

Multiplexed I/O & Peripheral Pin V V OUT, OUTA (General)

Design note: AnalogOutput(opampA)

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 17 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

MCP6401T-E/OT (SOT-23-5) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

MCP6401T-E/OT (SOT-23-5) - 2. Standard Pinout (Top View)

True package pinout (5 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

MCP6401T-E/OT (SOT-23-5) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

MCP6401T-E/OT (SOT-23-5) - 4. Package Dimensions (D×E×A)

SOT-23-5 · 2.90×1.60mm · Pitch 0.95mmExpand ›

5. Recommended Land PatternLAND PATTERN

MCP6401T-E/OT (SOT-23-5) - 5. Recommended Land Pattern

IPC-7351B Footprint (5 Pads)Expand ›

6. Application SchematicSCHEMATIC

MCP6401T-E/OT (SOT-23-5) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (17 figures · Page 1/2)

Showing 1–12 of 17 uncropped original figures for MCP6401

P2 · p02_fig01EXACT PACKAGE

MCP6401/1R/1U/2/4/6/7/9

P22 · p22_fig02EXACT PACKAGE

MCP6406T-H/OT ZYNN

P22 · p22_fig03EXACT PACKAGE

MCP6406T-H/OT ZYNN

P1 · p01_fig01377×200px

1 MHz, 45 µA Op Amps

P1 · p01_fig021777×914px

MCP6401T-E/OT (SOT-23-5) — © 2009-2011 Microchip Technology Inc. DS22229D-page 1 | • SPICE Macro Models • FilterLab® Software • Microchip Advanced Part Selector (MAPS) • Analog Demonstration and Evaluation Boards • Application Notes | Typical Application | VOUT | R2

© 2009-2011 Microchip Technology Inc. DS22229D-page 1 | • SPICE Macro Models • FilterLab® Software • Microchip Advanced Part Selector (MAPS) • Analog Demonstration and Evaluation Boards • Application Notes | Typical Application | VOUT | R2

P1 · p01_fig02P1

Datasheet Page 1 (p01_fig02)

P2 · p02_fig01P2

Datasheet Page 2 (p02_fig01)

P17 · p17_fig011777×695px

FIGURE 4-2: Protecting the Analog Inputs.

P17 · p17_fig021777×687px

FIGURE 4-3: Protecting the Analog Inputs.

P19 · p19_fig011005×569px

FIGURE 4-7: Example Guard Ring Layout for Inverting Gain.

P19 · p19_fig02867×1142px

FIGURE 4-7: Example Guard Ring Layout for Inverting Gain.

P22 · p22_fig011777×2735px

MCP6401T-E/OT (SOT-23-5) — MCP6401/1R/1U/2/4/6/7/9 | DS22229D-page 22 © 2009-2011 Microchip Technology Inc. | 6.0 PACKAGING INFORMATION | 6.1 Package Marking Information | 5-Lead SC70 (MCP6401 only) Example: | Note: In the event the full Microchip part number cannot

Page 1 / 2 (17 extracted figures)

Technical Specifications & Part Details (MCP6401T-E/OT)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:MCP6401T-E/OT (SOT-23-5) is a 5-pin standard electronic & interconnect component featuring a 2.90 × 1.60 × 1.10 mm mechanical envelope (lead pitch e = 0.95 mm). Rated for 1.8V to 6.0V supply operation across -40°C to +125°C with integrated Standard I/O / Passive interfaces.

Operating Supply VoltageV_CC / V_DD

1.8V to 6.0V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C to +125°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

1 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

45 µA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

2.90 × 1.60 × 1.10 mm (A1=0.08 mm)

Package family: SOT23 (SOT-23-5)

Pin Count & Lead PitchN / e

5 Pins | Pitch e = 0.95 mm (37.4 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

Standard I/O / Passive

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol5 auto-grouped pins

IPC-7351B Land Pattern5 pads · Pitch 0.95mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOT-23-5)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

2.90 × 1.60 mm

Height (A) & Pitch (e)IPC-7351B

A=1.10mm · e=0.95mm

Pad Size (W × L)Level B

0.60 × 1.00 mm

Pins / Total PadsTopology

5P / 5Pad (SOT_SMALL)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit SOT-23-5	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — MCP6401T-E/OT (SOT-23-5)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of MCP6401T-E/OT (SOT-23-5)?

Manufactured by MICROCHIP, the MCP6401T-E/OT is housed in a SOT-23-5 package with 5 pins and a 0.95 mm lead pitch, supporting a VCC supply range of 1.8V to 6.0V. Key pins include: 1 (V V OUT, OUTA: Multiplexed I/O & Peripheral Pin V V OUT, OUTA (General)), 2 (VDD: Power Supply Input (VDD — 1.8V to 6.0V)), 3 (V IN+ V INA+ ,: Multiplexed I/O & Peripheral Pin V IN+ V INA+ , (General)), 4 (V V IN–, INA–: Multiplexed I/O & Peripheral Pin V V IN–, INA– (General)), 5 (VSS: Ground Reference Pin (VSS)).

What are the IPC-7351B PCB Footprint dimensions for MCP6401T-E/OT?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MCP6401T-E/OT (SOT-23-5) has a nominal body envelope of 1.60 × 2.90 mm, pitch e = 0.95 mm, and 5 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MCP6401T-E/OT?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MCP6401T-E/OT (MICROCHIP, SOT-23-5) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (5 pins) & MCP6401 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	V V OUT, OUTA	Digital_IO	Signal terminal V V OUT, OUTA (I/O, 1.8V to 6.0V domain). Multiplexed alternate functions: V V OUT, OUTA. Supported peripheral buses: General.
2	VDD	Power_In	Primary positive power supply input (VDD) operating in the 1.8V to 6.0V domain (Max rating: 6.0V).
3	V IN+ V INA+ ,	Digital_IO	Signal terminal V IN+ V INA+ , (I/O, 1.8V to 6.0V domain). Multiplexed alternate functions: V IN+ V INA+ ,. Supported peripheral buses: General.
4	V V IN–, INA–	Digital_IO	Signal terminal V V IN–, INA– (I/O, 1.8V to 6.0V domain). Multiplexed alternate functions: V V IN–, INA–. Supported peripheral buses: General.
5	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.

4D Studio: MCP6401T-E/OT Permalink: /part/C144369 MICROCHIP SOT-23-5 All Packages All Manufacturers