MIC4684YM-TR (SOIC-8) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of MIC4684YM-TR (SOIC-8)?

Manufactured by MICROCHIP, the MIC4684YM-TR is housed in a SOIC-8 package with 8 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 4V to 30V. Key pins include: 1 (SW: Multiplexed I/O & Peripheral Pin SW (General)), 2 (GND: Ground Reference Pin (GND)), 3 (IN: Multiplexed I/O & Peripheral Pin IN (General)), 4 (BS: Multiplexed I/O & Peripheral Pin BS (General)), 5 (FB: Multiplexed I/O & Peripheral Pin FB (General)), 6 (GND: Ground Reference Pin (GND)).

Q: What are the IPC-7351B PCB Footprint dimensions for MIC4684YM-TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MIC4684YM-TR (SOIC-8) has a nominal body envelope of 3.90 × 4.90 mm, pitch e = 1.27 mm, and 8 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MIC4684YM-TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MIC4684YM-TR (MICROCHIP, SOIC-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 3.90mm × 4.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (8/8)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	SW	I/O	Multiplexed I/O & Peripheral Pin SW (General)
2	GND	GND	Ground Reference Pin (GND)
3	IN	I/O	Multiplexed I/O & Peripheral Pin IN (General)
4	BS	I/O	Multiplexed I/O & Peripheral Pin BS (General)
5	FB	I/O	Multiplexed I/O & Peripheral Pin FB (General)
6	GND	GND	Ground Reference Pin (GND)
7	GND	GND	Ground Reference Pin (GND)
8	EN	I	System Enable & Hardware Reset (EN)

PIN 1 SW

I/O

Multiplexed I/O & Peripheral Pin SW (General)

Design note: Switch(Output):EmitterofNPNoutputswitch Connecttoexternalstorage . inductorandShottkydiode .

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

MIC4684YM-TR (SOIC-8) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

MIC4684YM-TR (SOIC-8) - 2. Standard Pinout (Top View)

True package pinout (8 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

MIC4684YM-TR (SOIC-8) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

MIC4684YM-TR (SOIC-8) - 4. Package Dimensions (D×E×A)

SOIC-8 · 3.90×4.90mm · Pitch 1.27mmExpand ›

5. Recommended Land PatternLAND PATTERN

MIC4684YM-TR (SOIC-8) - 5. Recommended Land Pattern

IPC-7351B Footprint (8 Pads)Expand ›

6. Application SchematicSCHEMATIC

MIC4684YM-TR (SOIC-8) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)

Showing 1–9 of 9 uncropped original figures for MIC4684

P2 · p02_fig01EXACT PACKAGE

Micrel, Inc. MIC4684

P11 · p11_fig01EXACT PACKAGE

Figure 5. Critical Traces for Layout

P12 · p12_fig01EXACT PACKAGE

Figure 6. 4V - 16V Input Evaluation Board Schematic Diagram

P1 · p01_fig01864×246px

MIC4684 Micrel, Inc. MIC4684 MICReL

P1 · p01_fig02974×463px

MIC4684YM-TR (SOIC-8) — Typical Application | BS VIN 4 | 1 | 5 | 2, 6, 7 | 3 | 8 SW | FB | EN | GND | MIC4684BM CBS 0.33µF/50V | CIN 33µF 35V | 330µF 6.3V 3A 40V | R1 3.01k | R2 3.01k | 68µH | VIN 6.5V to 25V VOUT 2.5V/1.5A | Adjustable Buck Converter

Typical Application | BS VIN 4 | 1 | 5 | 2, 6, 7 | 3 | 8 SW | FB | EN | GND | MIC4684BM CBS 0.33µF/50V | CIN 33µF 35V | 330µF 6.3V 3A 40V | R1 3.01k | R2 3.01k | 68µH | VIN 6.5V to 25V VOUT 2.5V/1.5A | Adjustable Buck Converter

P1 · p01_fig03587×640px

MIC4684YM-TR (SOIC-8) — 0 | 20 | 40 | 60 | 80 | 100 | 0 0.5 1 1.5 2 | ) % ( Y C N E I C I F F E | OUTPUT CURRENT (A) | Efficiency vs. Output Current | VOUT = 1.8V VOUT = 2.5V | VOUT = 3.3V | VIN = 5.0V | Efficiency vs. Output Current

0 | 20 | 40 | 60 | 80 | 100 | 0 0.5 1 1.5 2 | ) % ( Y C N E I C I F F E | OUTPUT CURRENT (A) | Efficiency vs. Output Current | VOUT = 1.8V VOUT = 2.5V | VOUT = 3.3V | VIN = 5.0V | Efficiency vs. Output Current

P2 · p02_fig01P2

Datasheet Page 2 (p02_fig01)

P12 · p12_fig01P12

Datasheet Page 12 (p12_fig01)

P16 · p16_fig011682×1048px

Micrel, Inc. MIC4684 | Package Information | 8-Lead SOP (M)

Technical Specifications & Part Details (MIC4684YM-TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:MIC4684YM-TR (SOIC-8) is a 8-pin standard electronic & interconnect component featuring a 4.90 × 3.90 × 1.75 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 4V to 30V supply operation across 40°C to +125°C with integrated PWM interfaces.

Operating Supply VoltageV_CC / V_DD

4V to 30V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

40°C to +125°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

200kHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

4.90 × 3.90 × 1.75 mm (A1=0.15 mm)

Package family: SOIC (SOIC-8)

Pin Count & Lead PitchN / e

8 Pins | Pitch e = 1.27 mm (50.0 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

PWM

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol8 auto-grouped pins

IPC-7351B Land Pattern8 pads · Pitch 1.27mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

IPC-7351B

Family Variants & Same Datasheet Chips — MIC4684 (2)

Select package variant or sibling MPN sharing this datasheet

SOIC-8 · 8P

MIC4684YM-TR

MICROCHIP·SOIC-8

IPC-7351B

8P4.9×3.9×1.75mmP=1.27mm

MIC4684 (SOIC-8)

SOP-8 · 8P

MIC4684YM

MICROCHIP·SOP-8

IPC-7351B

8P4.9×3.9×1.75mmP=1.27mm

MIC4684 (SOP-8)

Mechanical Dimensions & Land Pattern (SOIC-8)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

4.90 × 3.90 mm

Height (A) & Pitch (e)IPC-7351B

A=1.75mm · e=1.27mm

Pad Size (W × L)Level B

0.60 × 1.55 mm

Pins / Total PadsTopology

8P / 8Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit SOIC-8	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — MIC4684YM-TR (SOIC-8)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of MIC4684YM-TR (SOIC-8)?

Manufactured by MICROCHIP, the MIC4684YM-TR is housed in a SOIC-8 package with 8 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 4V to 30V. Key pins include: 1 (SW: Multiplexed I/O & Peripheral Pin SW (General)), 2 (GND: Ground Reference Pin (GND)), 3 (IN: Multiplexed I/O & Peripheral Pin IN (General)), 4 (BS: Multiplexed I/O & Peripheral Pin BS (General)), 5 (FB: Multiplexed I/O & Peripheral Pin FB (General)), 6 (GND: Ground Reference Pin (GND)).

What are the IPC-7351B PCB Footprint dimensions for MIC4684YM-TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MIC4684YM-TR (SOIC-8) has a nominal body envelope of 3.90 × 4.90 mm, pitch e = 1.27 mm, and 8 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MIC4684YM-TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MIC4684YM-TR (MICROCHIP, SOIC-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (8 pins) & MIC4684 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	SW	Digital_IO	Signal terminal SW (I/O, 4V to 30V domain). Multiplexed alternate functions: SW. Supported peripheral buses: General.
2	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
3	IN	Digital_IO	Signal terminal IN (I/O, 4V to 30V domain). Multiplexed alternate functions: IN. Supported peripheral buses: General.
4	BS	Digital_IO	Signal terminal BS (I/O, 4V to 30V domain). Multiplexed alternate functions: BS. Supported peripheral buses: General.
5	FB	Digital_IO	Signal terminal FB (I/O, 4V to 30V domain). Multiplexed alternate functions: FB. Supported peripheral buses: General.
6	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
7	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
8	EN	Digital_IO	Chip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset.

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