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AT28C256-15UM/883-815 (CPGA-28(14x16.5)) — Symbol, Footprint IPC-7351B & 3D STEP Model

AT28C256-15UM/883-815

MICROCHIPID: C1352937CPGA-28(14x16.5) · 28 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · AT28C256-15UM/883-815 (CPGA-28(14x16.5))1A142A123A74A65A56A47A38A29A110A011I/O012I/O113I/O214GND28VCC27WE#26A1325A824A923A1122OE#21A1020CE#19I/O718I/O617I/O516I/O415I/O3Grid Pitch = 2.54mm (IEEE-315)-20.3-15.2-10.2-5.105.110.215.220.322.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728E=15.20mm · Pitch e=0.50mmD=13.70mm-11-9-7-5-3-113579111197531-1-3-5-7-9-11mm
3. 3D CAD MODEL
Package Body: 15.20mm × 13.70mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (28/28)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1A14I/OMultiplexed I/O & Peripheral Pin A14 (General)
2A12I/OMultiplexed I/O & Peripheral Pin A12 (General)
3A7I/OMultiplexed I/O & Peripheral Pin A7 (General)
4A6I/OMultiplexed I/O & Peripheral Pin A6 (General)
5A5I/OMultiplexed I/O & Peripheral Pin A5 (General)
6A4I/OMultiplexed I/O & Peripheral Pin A4 (General)
7A3I/OMultiplexed I/O & Peripheral Pin A3 (General)
8A2I/OMultiplexed I/O & Peripheral Pin A2 (General)
9A1I/OMultiplexed I/O & Peripheral Pin A1 (General)
10A0I/OMultiplexed I/O & Peripheral Pin A0 (General)
11I/O0I/OMultiplexed I/O & Peripheral Pin I/O0 (General)
12I/O1I/OMultiplexed I/O & Peripheral Pin I/O1 (General)
13I/O2I/OMultiplexed I/O & Peripheral Pin I/O2 (General)
14GNDGNDGround Reference Pin (GND)
15I/O3I/OMultiplexed I/O & Peripheral Pin I/O3 (General)
16I/O4I/OMultiplexed I/O & Peripheral Pin I/O4 (General)
17I/O5I/OMultiplexed I/O & Peripheral Pin I/O5 (General)
18I/O6I/OMultiplexed I/O & Peripheral Pin I/O6 (General)
19I/O7I/OMultiplexed I/O & Peripheral Pin I/O7 (General)
20CE#I/OMultiplexed I/O & Peripheral Pin CE# (General)
21A10I/OMultiplexed I/O & Peripheral Pin A10 (General)
22OE#I/OMultiplexed I/O & Peripheral Pin OE# (General)
23A11I/OMultiplexed I/O & Peripheral Pin A11 (General)
24A9I/OMultiplexed I/O & Peripheral Pin A9 (General)
25A8I/OMultiplexed I/O & Peripheral Pin A8 (General)
26A13I/OMultiplexed I/O & Peripheral Pin A13 (General)
27WE#I/OMultiplexed I/O & Peripheral Pin WE# (General)
28VCCPowerPower Supply Input (VCC — 3.3V / 5.0V Standard Logic)
PIN 1 A14
I/O
Multiplexed I/O & Peripheral Pin A14 (General)
Design note: Signal terminal A14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A14. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 5 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: AT28C256-15UM/883-815 (MICROCHIP · CPGA-28(14x16.5))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) - 2. Standard Pinout (Top View)
True package pinout (28 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) - 4. Package Dimensions (D×E×A)
CPGA-28(14x16.5) · 15.20×13.70mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) - 5. Recommended Land Pattern
IPC-7351B Footprint (28 Pads)Expand ›
6. Application SchematicSCHEMATIC
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (5 figures · Page 1/1)
Showing 1–5 of 5 uncropped original figures for AT28C256
P25 · p25_fig01EXACT PACKAGE
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) — TITLE DRAWING NO. REV. 28U, 28-pin, Ceramic Pin Grid Array (PGA) B 28U | 10/21/03 | Dimensions in Millimeters and (Inches). Controlling dimension: Inches. | 13.74(0.540) 13.36(0.526) | 15.24(0.600) 14.88(0.586) | 2.57(0.101) 2.06(0.081) | 7
TITLE DRAWING NO. REV. 28U, 28-pin, Ceramic Pin Grid Array (PGA) B 28U | 10/21/03 | Dimensions in Millimeters and (Inches). Controlling dimension: Inches. | 13.74(0.540) 13.36(0.526) | 15.24(0.600) 14.88(0.586) | 2.57(0.101) 2.06(0.081) | 7
P1 · p01_fig011756×463px
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) — Features
Features
P21 · p21_fig011923×2138px
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) — 7. Packaging Information
7. Packaging Information
P21 · p21_fig01P21
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) — Datasheet Page 21 (p21_fig01)
Datasheet Page 21 (p21_fig01)
P22 · p22_fig011779×2096px
AT28C256-15UM/883-815 (CPGA-28(14x16.5)) — TITLE DRAWING NO. REV. 28D6, 28-lead, 0.600" Wide, Non-windowed, Ceramic Dual Inline Package (Cerdip) B 28D6 | 10/23/03 | 37.85(1.490) 36.58(1.440) PIN | 1 | 15.49(0.610) 12.95(0.510) | 0.127(0.005)MIN | 1.52(0.060) 0.38(0.015) 0.66(0.026)
TITLE DRAWING NO. REV. 28D6, 28-lead, 0.600" Wide, Non-windowed, Ceramic Dual Inline Package (Cerdip) B 28D6 | 10/23/03 | 37.85(1.490) 36.58(1.440) PIN | 1 | 15.49(0.610) 12.95(0.510) | 0.127(0.005)MIN | 1.52(0.060) 0.38(0.015) 0.66(0.026)

Technical Specifications & Part Details (AT28C256-15UM/883-815)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:AT28C256-15UM/883-815 (CPGA-28(14x16.5)) is a 28-pin standard electronic & interconnect component featuring a 15.20 × 13.70 × 3.68 mm mechanical envelope (lead pitch e = 0.00 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -55°C to +125°C with integrated Standard I/O / Passive interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-55°C to +125°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
5 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
15.20 × 13.70 × 3.68 mm (A1=0.02 mm)
Package family: OTHER (CPGA-28(14x16.5))
Pin Count & Lead PitchN / e
28 Pins
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Standard I/O / Passive
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol28 auto-grouped pins
OK
IPC-7351B Land Pattern28 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — AT28C256 (3)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (CPGA-28(14x16.5))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
15.20 × 13.70 mm
Height (A) & Pitch (e)IPC-7351B
A=3.68mm · e=0.50mm
Pad Size (W × L)Level B
0.40 × 0.90 mm
Pins / Total PadsTopology
28P / 28Pad (CUSTOM_ARRAY)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
CPGA-28(14x16.5)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — AT28C256-15UM/883-815 (CPGA-28(14x16.5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of AT28C256-15UM/883-815 (CPGA-28(14x16.5))?

Manufactured by MICROCHIP, the AT28C256-15UM/883-815 is housed in a CPGA-28(14x16.5) package with 28 pins and a 0.50 mm lead pitch. Key pins include: 1 (A14: Multiplexed I/O & Peripheral Pin A14 (General)), 2 (A12: Multiplexed I/O & Peripheral Pin A12 (General)), 3 (A7: Multiplexed I/O & Peripheral Pin A7 (General)), 4 (A6: Multiplexed I/O & Peripheral Pin A6 (General)), 5 (A5: Multiplexed I/O & Peripheral Pin A5 (General)), 6 (A4: Multiplexed I/O & Peripheral Pin A4 (General)).

What are the IPC-7351B PCB Footprint dimensions for AT28C256-15UM/883-815?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), AT28C256-15UM/883-815 (CPGA-28(14x16.5)) has a nominal body envelope of 13.70 × 15.20 mm, pitch e = 0.50 mm, and 28 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for AT28C256-15UM/883-815?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for AT28C256-15UM/883-815 (MICROCHIP, CPGA-28(14x16.5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (28 pins) & AT28C256 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1A14Digital_IOSignal terminal A14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A14. Supported peripheral buses: General.
2A12Digital_IOSignal terminal A12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A12. Supported peripheral buses: General.
3A7Digital_IOSignal terminal A7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A7. Supported peripheral buses: General.
4A6Digital_IOSignal terminal A6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A6. Supported peripheral buses: General.
5A5Digital_IOSignal terminal A5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A5. Supported peripheral buses: General.
6A4Digital_IOSignal terminal A4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A4. Supported peripheral buses: General.
7A3Digital_IOSignal terminal A3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A3. Supported peripheral buses: General.
8A2Digital_IOSignal terminal A2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A2. Supported peripheral buses: General.
9A1Digital_IOSignal terminal A1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A1. Supported peripheral buses: General.
10A0Digital_IOSignal terminal A0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A0. Supported peripheral buses: General.
11I/O0Digital_IOSignal terminal I/O0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: I/O0. Supported peripheral buses: General.
12I/O1Digital_IOSignal terminal I/O1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: I/O1. Supported peripheral buses: General.
13I/O2Digital_IOSignal terminal I/O2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: I/O2. Supported peripheral buses: General.
14GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
15I/O3Digital_IOSignal terminal I/O3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: I/O3. Supported peripheral buses: General.
16I/O4Digital_IOSignal terminal I/O4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: I/O4. Supported peripheral buses: General.
17I/O5Digital_IOSignal terminal I/O5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: I/O5. Supported peripheral buses: General.
18I/O6Digital_IOSignal terminal I/O6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: I/O6. Supported peripheral buses: General.
19I/O7Digital_IOSignal terminal I/O7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: I/O7. Supported peripheral buses: General.
20CE#Digital_IOSignal terminal CE# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CE#. Supported peripheral buses: General.
21A10Digital_IOSignal terminal A10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A10. Supported peripheral buses: General.
22OE#Digital_IOSignal terminal OE# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: OE#. Supported peripheral buses: General.
23A11Digital_IOSignal terminal A11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A11. Supported peripheral buses: General.
24A9Digital_IOSignal terminal A9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A9. Supported peripheral buses: General.
25A8Digital_IOSignal terminal A8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A8. Supported peripheral buses: General.
26A13Digital_IOSignal terminal A13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A13. Supported peripheral buses: General.
27WE#Digital_IOSignal terminal WE# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: WE#. Supported peripheral buses: General.
28VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
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