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STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F769AIY6UTR

STID: C1343559WLCSP-180(5.5x6) · 180 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F769AIY6UTR (WLCSP-180(5.5x6))A1PF1A2PF2A3PF3A4PF4A5PF5A6PF12A7PF13A8PF14A9PF15A10PG0A11PG1A12PG2A13PA13B1PC15- OSC32_B2VBATB3PB3B4PB8B5PB6B6PD5B7PD2B8PC11B9PC10B10PA12B11PB11B12PB12B13PB13C1PH0- OSC_INC2VSSC3PE4C4PE1C5PB5C6PD6C7PD3C8PC12C9PA9C10PA11C11PC11C12PC12C13PC13D1PD15D2PD0D3PD1D4PE7D5PE8D6PE9D7PE10D8PE11D9PE12D10PE13D11PE14D12PE15D13PD8E1NRSTE2PC2E3PE6E4VSSE5VSSE6BYPASS_REGE7VCAP_2E8PD1E9PC9E10PC7E11PE11E12PE12E13PE13F1PC0F2PC1F3PC3F4VDDF5VDDF6VDDUSBF7PDR_ONF8VCAP_1F9PC8F10PC6F11PF11F12PF12F13PF13G1VSSAG2PA0- WKUPG3PA4G4PC4G5PB2G6PG6G8PD15G9PD11G10PB15G11PG11G12PG12G13PG13P13PP13P12PP12P11PP11P10PP10P9PP9P8PP8P7PE9P6PE13P5PP5P4PP4P3PP3P2PP2P1PP1N13PN13N12PN12N11PN11N10PN10N9PN9N8PN8N7PN7N6PE14N5PN5N4PN4N3PN3N2PN2N1PN1M13PM13M12PM12M11PM11M10PM10M9PM9M8PM8M7PM7M6PE15M5PM5M4PM4M3PM3M2PM2M1PM1L13PL13L12PL12L11PL11L10PL10L9PL9L8PL8L7PL7L6PE12L5PL5L4PL4L3PL3L2PL2L1PL1K13PK13K12PK12K11PK11K10VSSK9VSSK8VSSK7VSSK6VSSK5PB10K4PB1K3PA7K2PA3K1VDDJ13PJ13J12PJ12J11PJ11J10VSSJ9VSSJ8VSSJ7VSSJ6PE10J5PE8J4PB0J3PA6J2PA2J1VSSH13PH13H12PH12H11PH11H10PB14H9PD10H8PD14H6PH6H5PE7H4PC5H3PA5H2PA1H1VDDAGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8119.4114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3-119.4mm
2. 2D FOOTPRINT
A1A2A3A4A5A6A7A8A9A10A11A12A13B1B2B3B4B5B6B7B8B9B10B11B12B13C1C2C3C4C5C6C7C8C9C10C11C12C13D1D2D3D4D5D6D7D8D9D10D11D12D13E1E2E3E4E5E6E7E8E9E10E11E12E13F1F2F3F4F5F6F7F8F9F10F11F12F13G1G2G3G4G5G6G8G9G10G11G12G13H1H2H3H4H5H6H8H9H10H11H12H13J1J2J3J4J5J6J7J8J9J10J11J12J13K1K2K3K4K5K6K7K8K9K10K11K12K13L1L2L3L4L5L6L7L8L9L10L11L12L13M1M2M3M4M5M6M7M8M9M10M11M12M13N1N2N3N4N5N6N7N8N9N10N11N12N13P1P2P3P4P5P6P7P8P9P10P11P12P13E=6.00mm · Pitch e=0.40mmD=5.50mm-5-4-3-2-101234543210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 6.00mm × 5.50mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (180/180)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
A2PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
A3PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
A4PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
A5PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
A6PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
A7PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
A8PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
A9PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
A10PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
A11PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
A12PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
A13PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
B1PC15- OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15- OSC32_OUT (RTC/CLK)
B2VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
B3PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
B4PB8I/OMultiplexed I/O & Peripheral Pin PB8 (UART, I2C, CAN)
B5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C)
B6PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
B7PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
B8PC11I/OMultiplexed I/O & Peripheral Pin PC11 (SPI)
B9PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
B10PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, SPI, CAN)
B11PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
B12PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
B13PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
C1PH0- OSC_INI/OMultiplexed I/O & Peripheral Pin PH0- OSC_IN (RTC/CLK)
C2VSSGNDGround Reference Pin (VSS)
C3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (SPI)
C4PE1I/OMultiplexed I/O & Peripheral Pin PE1 (UART)
C5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, CAN)
C6PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART)
C7PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART)
C8PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
C9PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, I2C)
C10PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
C11PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
C12PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
C13PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
D1PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
D2PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
D3PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
D4PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
D5PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
D6PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
D7PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
D8PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
D9PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
D10PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
D11PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
D12PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
D13PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
E1NRSTISystem Enable & Hardware Reset (NRST)
E2PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC)
E3PE6I/OMultiplexed I/O & Peripheral Pin PE6 (SPI)
E4VSSGNDGround Reference Pin (VSS)
E5VSSGNDGround Reference Pin (VSS)
E6BYPASS_REGI/OMultiplexed I/O & Peripheral Pin BYPASS_REG (General)
E7VCAP_2I/OMultiplexed I/O & Peripheral Pin VCAP_2 (General)
E8PD1I/OMultiplexed I/O & Peripheral Pin PD1 (UART)
E9PC9I/OMultiplexed I/O & Peripheral Pin PC9 (I2C, RTC/CLK)
E10PC7I/OMultiplexed I/O & Peripheral Pin PC7 (PWM)
E11PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
E12PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
E13PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
F1PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC)
F2PC1I/OMultiplexed I/O & Peripheral Pin PC1 (SPI, I2C, ADC, RTC/CLK)
F3PC3I/OMultiplexed I/O & Peripheral Pin PC3 (ADC)
F4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F6VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
F7PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
F8VCAP_1I/OMultiplexed I/O & Peripheral Pin VCAP_1 (General)
F9PC8I/OMultiplexed I/O & Peripheral Pin PC8 (UART)
F10PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
F11PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
F12PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
F13PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
G1VSSAGNDGround Reference Pin (VSSA)
G2PA0- WKUPI/OMultiplexed I/O & Peripheral Pin PA0- WKUP (UART, ADC)
G3PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
G4PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
G5PB2I/OMultiplexed I/O & Peripheral Pin PB2 (SPI, I2C)
G6PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
G8PD15I/OMultiplexed I/O & Peripheral Pin PD15 (UART)
G9PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, I2C)
G10PB15I/OMultiplexed I/O & Peripheral Pin PB15 (UART, RTC/CLK)
G11PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
G12PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
G13PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
H1VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
H2PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC)
H3PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC)
H4PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
H5PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
H6PH6I/OMultiplexed I/O & Peripheral Pin PH6 (General)
H8PD14I/OMultiplexed I/O & Peripheral Pin PD14 (UART)
H9PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
H10PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI)
H11PH11I/OMultiplexed I/O & Peripheral Pin PH11 (General)
H12PH12I/OMultiplexed I/O & Peripheral Pin PH12 (General)
H13PH13I/OMultiplexed I/O & Peripheral Pin PH13 (General)
J1VSSGNDGround Reference Pin (VSS)
J2PA2I/OMultiplexed I/O & Peripheral Pin PA2 (SPI, ADC)
J3PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC)
J4PB0I/OMultiplexed I/O & Peripheral Pin PB0 (ADC, PWM)
J5PE8I/OMultiplexed I/O & Peripheral Pin PE8 (PWM)
J6PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
J7VSSGNDGround Reference Pin (VSS)
J8VSSGNDGround Reference Pin (VSS)
J9VSSGNDGround Reference Pin (VSS)
J10VSSGNDGround Reference Pin (VSS)
J11PJ11I/OMultiplexed I/O & Peripheral Pin PJ11 (General)
J12PJ12I/OMultiplexed I/O & Peripheral Pin PJ12 (General)
J13PJ13I/OMultiplexed I/O & Peripheral Pin PJ13 (General)
K1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K2PA3I/OMultiplexed I/O & Peripheral Pin PA3 (ADC)
K3PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
K4PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
K5PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, I2C)
K6VSSGNDGround Reference Pin (VSS)
K7VSSGNDGround Reference Pin (VSS)
K8VSSGNDGround Reference Pin (VSS)
K9VSSGNDGround Reference Pin (VSS)
K10VSSGNDGround Reference Pin (VSS)
K11PK11I/OMultiplexed I/O & Peripheral Pin PK11 (General)
K12PK12I/OMultiplexed I/O & Peripheral Pin PK12 (General)
K13PK13I/OMultiplexed I/O & Peripheral Pin PK13 (General)
L1PL1I/OMultiplexed I/O & Peripheral Pin PL1 (General)
L2PL2I/OMultiplexed I/O & Peripheral Pin PL2 (General)
L3PL3I/OMultiplexed I/O & Peripheral Pin PL3 (General)
L4PL4I/OMultiplexed I/O & Peripheral Pin PL4 (General)
L5PL5I/OMultiplexed I/O & Peripheral Pin PL5 (General)
L6PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI)
L7PL7I/OMultiplexed I/O & Peripheral Pin PL7 (General)
L8PL8I/OMultiplexed I/O & Peripheral Pin PL8 (General)
L9PL9I/OMultiplexed I/O & Peripheral Pin PL9 (General)
L10PL10I/OMultiplexed I/O & Peripheral Pin PL10 (General)
L11PL11I/OMultiplexed I/O & Peripheral Pin PL11 (General)
L12PL12I/OMultiplexed I/O & Peripheral Pin PL12 (General)
L13PL13I/OMultiplexed I/O & Peripheral Pin PL13 (General)
M1PM1I/OMultiplexed I/O & Peripheral Pin PM1 (General)
M2PM2I/OMultiplexed I/O & Peripheral Pin PM2 (General)
M3PM3I/OMultiplexed I/O & Peripheral Pin PM3 (General)
M4PM4I/OMultiplexed I/O & Peripheral Pin PM4 (General)
M5PM5I/OMultiplexed I/O & Peripheral Pin PM5 (General)
M6PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
M7PM7I/OMultiplexed I/O & Peripheral Pin PM7 (General)
M8PM8I/OMultiplexed I/O & Peripheral Pin PM8 (General)
M9PM9I/OMultiplexed I/O & Peripheral Pin PM9 (General)
M10PM10I/OMultiplexed I/O & Peripheral Pin PM10 (General)
M11PM11I/OMultiplexed I/O & Peripheral Pin PM11 (General)
M12PM12I/OMultiplexed I/O & Peripheral Pin PM12 (General)
M13PM13I/OMultiplexed I/O & Peripheral Pin PM13 (General)
N1PN1I/OMultiplexed I/O & Peripheral Pin PN1 (General)
N2PN2I/OMultiplexed I/O & Peripheral Pin PN2 (General)
N3PN3I/OMultiplexed I/O & Peripheral Pin PN3 (General)
N4PN4I/OMultiplexed I/O & Peripheral Pin PN4 (General)
N5PN5I/OMultiplexed I/O & Peripheral Pin PN5 (General)
N6PE14I/OMultiplexed I/O & Peripheral Pin PE14 (SPI)
N7PN7I/OMultiplexed I/O & Peripheral Pin PN7 (General)
N8PN8I/OMultiplexed I/O & Peripheral Pin PN8 (General)
N9PN9I/OMultiplexed I/O & Peripheral Pin PN9 (General)
N10PN10I/OMultiplexed I/O & Peripheral Pin PN10 (General)
N11PN11I/OMultiplexed I/O & Peripheral Pin PN11 (General)
N12PN12I/OMultiplexed I/O & Peripheral Pin PN12 (General)
N13PN13I/OMultiplexed I/O & Peripheral Pin PN13 (General)
P1PP1I/OMultiplexed I/O & Peripheral Pin PP1 (General)
P2PP2I/OMultiplexed I/O & Peripheral Pin PP2 (General)
P3PP3I/OMultiplexed I/O & Peripheral Pin PP3 (General)
P4PP4I/OMultiplexed I/O & Peripheral Pin PP4 (General)
P5PP5I/OMultiplexed I/O & Peripheral Pin PP5 (General)
P6PE13I/OMultiplexed I/O & Peripheral Pin PE13 (SPI)
P7PE9I/OMultiplexed I/O & Peripheral Pin PE9 (UART, PWM)
P8PP8I/OMultiplexed I/O & Peripheral Pin PP8 (General)
P9PP9I/OMultiplexed I/O & Peripheral Pin PP9 (General)
P10PP10I/OMultiplexed I/O & Peripheral Pin PP10 (General)
P11PP11I/OMultiplexed I/O & Peripheral Pin PP11 (General)
P12PP12I/OMultiplexed I/O & Peripheral Pin PP12 (General)
P13PP13I/OMultiplexed I/O & Peripheral Pin PP13 (General)
PIN A1 PF1
I/O
Multiplexed I/O & Peripheral Pin PF1 (General)
Design note: Signal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 14 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F769AIY6UTR (ST · WLCSP-180(5.5x6))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F769AIY6UTR (WLCSP-180(5.5x6)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F769AIY6UTR (WLCSP-180(5.5x6)) - 2. Standard Pinout (Top View)
True package pinout (180 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F769AIY6UTR (WLCSP-180(5.5x6)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F769AIY6UTR (WLCSP-180(5.5x6)) - 4. Package Dimensions (D×E×A)
WLCSP-180(5.5x6) · 6.00×5.50mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F769AIY6UTR (WLCSP-180(5.5x6)) - 5. Recommended Land Pattern
IPC-7351B Footprint (180 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F769AIY6UTR (WLCSP-180(5.5x6)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (14 figures · Page 1/2)
Showing 1–12 of 14 uncropped original figures for STM32F765 / STM32F767 / STM32F769
P61 · p61_fig01EXACT PACKAGE
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Figure 17. STM32F769Ax/STM32F768Ax WLCSP180 ballout
Figure 17. STM32F769Ax/STM32F768Ax WLCSP180 ballout
P236 · p236_fig01EXACT PACKAGE
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Figure 98. WLCSP180 outline
Figure 98. WLCSP180 outline
P237 · p237_fig01EXACT PACKAGE
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Figure 99. WLCSP180 recommended footprint
Figure 99. WLCSP180 recommended footprint
P238 · p238_fig01EXACT PACKAGE
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Figure 100. WLCSP180 top view example
Figure 100. WLCSP180 top view example
P1 · p01_fig01881×617px
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — • Low-power - Sleep, Stop and Standby modes - VBAT supply for RTC, 32×32 bit backup registers + 4 Kbytes backup SRAM
• Low-power - Sleep, Stop and Standby modes - VBAT supply for RTC, 32×32 bit backup registers + 4 Kbytes backup SRAM
P55 · p55_fig011546×1389px
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Figure 11. STM32F76xxx LQFP100 pinout
Figure 11. STM32F76xxx LQFP100 pinout
P66 · p66_fig011748×1076px
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — 66/252 DS11532 Rev 7
66/252 DS11532 Rev 7
P66 · p66_fig01P66
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Datasheet Page 66 (p66_fig01)
Datasheet Page 66 (p66_fig01)
P105 · p105_fig011546×2099px
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Figure 24. STM32F769xx/STM32F779xx power supply scheme
Figure 24. STM32F769xx/STM32F779xx power supply scheme
P105 · p105_fig01P105
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Datasheet Page 105 (p105_fig01)
Datasheet Page 105 (p105_fig01)
P106 · p106_fig011551×2039px
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Figure 25. STM32F765xx/STM32F767xx/STM32F777xx power supply scheme
Figure 25. STM32F765xx/STM32F767xx/STM32F777xx power supply scheme
P136 · p136_fig011546×487px
STM32F769AIY6UTR (WLCSP-180(5.5x6)) — Figure 30. Typical application with an 8 MHz crystal
Figure 30. Typical application with an 8 MHz crystal
Page 1 / 2 (14 extracted figures)

Technical Specifications & Part Details (STM32F769AIY6UTR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F769AIY6UTR (WLCSP-180(5.5x6)) is a 180-pin embedded microcontroller unit (mcu) featuring a 5.50 × 6.00 × 0.56 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.7 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, I2S, ADC, PWM, JTAG / SWD, IrDA, CAN, DAC, RTC/CLK, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.7 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
216 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
54 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
5.50 × 6.00 × 0.56 mm (A1=0.17 mm)
Package family: WLCSP (WLCSP-180(5.5x6))
Pin Count & Lead PitchN / e
180 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, I2S, ADC, PWM, JTAG / SWD, IrDA, CAN, DAC, RTC/CLK, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol180 auto-grouped pins
OK
IPC-7351B Land Pattern180 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-180(5.5x6))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
5.50 × 6.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.56mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
180P / 180Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-180(5.5x6)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F769AIY6UTR (WLCSP-180(5.5x6))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F769AIY6UTR (WLCSP-180(5.5x6))?

Manufactured by ST, the STM32F769AIY6UTR is housed in a WLCSP-180(5.5x6) package with 180 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: A1 (PF1: Multiplexed I/O & Peripheral Pin PF1 (General)), A2 (PF2: Multiplexed I/O & Peripheral Pin PF2 (General)), A3 (PF3: Multiplexed I/O & Peripheral Pin PF3 (General)), A4 (PF4: Multiplexed I/O & Peripheral Pin PF4 (General)), A5 (PF5: Multiplexed I/O & Peripheral Pin PF5 (General)), A6 (PF12: Multiplexed I/O & Peripheral Pin PF12 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32F769AIY6UTR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F769AIY6UTR (WLCSP-180(5.5x6)) has a nominal body envelope of 6.00 × 5.50 mm, pitch e = 0.40 mm, and 180 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F769AIY6UTR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F769AIY6UTR (ST, WLCSP-180(5.5x6)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (180 pins) & STM32F765 / STM32F767 / STM32F769 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
A2PF2Digital_IOSignal terminal PF2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: General.
A3PF3Digital_IOSignal terminal PF3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General.
A4PF4Digital_IOSignal terminal PF4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
A5PF5Digital_IOSignal terminal PF5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General.
A6PF12Digital_IOSignal terminal PF12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF12. Supported peripheral buses: General.
A7PF13Digital_IOSignal terminal PF13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF13. Supported peripheral buses: General.
A8PF14Digital_IOSignal terminal PF14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF14. Supported peripheral buses: General.
A9PF15Digital_IOSignal terminal PF15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF15. Supported peripheral buses: General.
A10PG0Digital_IOSignal terminal PG0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG0. Supported peripheral buses: General.
A11PG1Digital_IOSignal terminal PG1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG1. Supported peripheral buses: General.
A12PG2Digital_IOSignal terminal PG2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG2. Supported peripheral buses: General.
A13PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
B1PC15- OSC32_OUTDigital_IOSignal terminal PC15- OSC32_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15- OSC32_OUT. Supported peripheral buses: RTC/CLK.
B2VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B3PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
B4PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C, CAN.
B5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C.
B6PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART.
B7PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
B8PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISORX. Supported peripheral buses: SPI.
B9PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
B10PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_CKUART4TX. Supported peripheral buses: UART, SPI, CAN.
B11PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
B12PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
B13PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
C1PH0- OSC_INDigital_IOSignal terminal PH0- OSC_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0- OSC_IN. Supported peripheral buses: RTC/CLK.
C2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C3PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI.
C4PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: UART.
C5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SDSPI3MOSI, SPI6MOSI. Supported peripheral buses: UART, SPI, CAN.
C6PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: UART.
C7PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: UART.
C8PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SDUSART3. Supported peripheral buses: UART, SPI.
C9PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART, I2C.
C10PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_WSUART4RX. Supported peripheral buses: UART, SPI, PWM.
C11PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
C12PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
C13PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
D1PD15Digital_IOSignal terminal PD15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: General.
D2PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
D3PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
D4PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
D5PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: General.
D6PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: General.
D7PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: General.
D8PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: General.
D9PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE12. Supported peripheral buses: General.
D10PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: General.
D11PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: General.
D12PE15Digital_IOSignal terminal PE15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
D13PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: General.
E1NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
E2PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: SPI, ADC.
E3PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: SPI.
E4VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E5VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E6BYPASS_REGDigital_IOSignal terminal BYPASS_REG (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: BYPASS_REG. Supported peripheral buses: General.
E7VCAP_2Digital_IOSignal terminal VCAP_2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP_2. Supported peripheral buses: General.
E8PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: UART.
E9PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: I2C, RTC/CLK.
E10PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: PWM.
E11PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: General.
E12PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE12. Supported peripheral buses: General.
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