STM32F765NGH7 (TFBGA-216) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of STM32F765NGH7 (TFBGA-216)?

Manufactured by ST, the STM32F765NGH7 is housed in a TFBGA-216 package with 216 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: A1 (PF1: Multiplexed I/O & Peripheral Pin PF1 (General)), A2 (PF2: Multiplexed I/O & Peripheral Pin PF2 (General)), A3 (PF3: Multiplexed I/O & Peripheral Pin PF3 (General)), A4 (PF4: Multiplexed I/O & Peripheral Pin PF4 (General)), A5 (PF5: Multiplexed I/O & Peripheral Pin PF5 (General)), A6 (PF12: Multiplexed I/O & Peripheral Pin PF12 (General)).

Q: What are the IPC-7351B PCB Footprint dimensions for STM32F765NGH7?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F765NGH7 (TFBGA-216) has a nominal body envelope of 13.00 × 13.00 mm, pitch e = 0.80 mm, and 216 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F765NGH7?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F765NGH7 (ST, TFBGA-216) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 13.00mm × 13.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (216/216)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
A1	PF1	I/O	Multiplexed I/O & Peripheral Pin PF1 (General)
A2	PF2	I/O	Multiplexed I/O & Peripheral Pin PF2 (General)
A3	PF3	I/O	Multiplexed I/O & Peripheral Pin PF3 (General)
A4	PF4	I/O	Multiplexed I/O & Peripheral Pin PF4 (General)
A5	PF5	I/O	Multiplexed I/O & Peripheral Pin PF5 (General)
A6	PF12	I/O	Multiplexed I/O & Peripheral Pin PF12 (General)
A7	PF13	I/O	Multiplexed I/O & Peripheral Pin PF13 (General)
A8	PF14	I/O	Multiplexed I/O & Peripheral Pin PF14 (General)
A9	PF15	I/O	Multiplexed I/O & Peripheral Pin PF15 (General)
A10	PG0	I/O	Multiplexed I/O & Peripheral Pin PG0 (General)
A11	PG1	I/O	Multiplexed I/O & Peripheral Pin PG1 (General)
A12	PG2	I/O	Multiplexed I/O & Peripheral Pin PG2 (General)
A13	PA13	I/O	Multiplexed I/O & Peripheral Pin PA13 (General)
A14	PA14	I/O	Multiplexed I/O & Peripheral Pin PA14 (General)
A15	PA15	I/O	Multiplexed I/O & Peripheral Pin PA15 (General)
B1	PC15- OSC32_OUT	I/O	Multiplexed I/O & Peripheral Pin PC15- OSC32_OUT (RTC/CLK)
B2	VBAT	Power	Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))
B3	PB3	I/O	Multiplexed I/O & Peripheral Pin PB3 (General)
B4	PB8	I/O	Multiplexed I/O & Peripheral Pin PB8 (UART, I2C, CAN)
B5	PB6	I/O	Multiplexed I/O & Peripheral Pin PB6 (UART, I2C)
B6	PD5	I/O	Multiplexed I/O & Peripheral Pin PD5 (UART)
B7	PD2	I/O	Multiplexed I/O & Peripheral Pin PD2 (UART)
B8	PC11	I/O	Multiplexed I/O & Peripheral Pin PC11 (SPI)
B9	PC10	I/O	Multiplexed I/O & Peripheral Pin PC10 (UART, SPI)
B10	PA12	I/O	Multiplexed I/O & Peripheral Pin PA12 (UART, SPI, CAN)
B11	PB11	I/O	Multiplexed I/O & Peripheral Pin PB11 (General)
B12	PB12	I/O	Multiplexed I/O & Peripheral Pin PB12 (General)
B13	PB13	I/O	Multiplexed I/O & Peripheral Pin PB13 (General)
B14	PB14	I/O	Multiplexed I/O & Peripheral Pin PB14 (General)
B15	PB15	I/O	Multiplexed I/O & Peripheral Pin PB15 (General)
C1	PH0- OSC_IN	I/O	Multiplexed I/O & Peripheral Pin PH0- OSC_IN (RTC/CLK)
C2	VSS	GND	Ground Reference Pin (VSS)
C3	PE4	I/O	Multiplexed I/O & Peripheral Pin PE4 (SPI)
C4	PE1	I/O	Multiplexed I/O & Peripheral Pin PE1 (UART)
C5	PB5	I/O	Multiplexed I/O & Peripheral Pin PB5 (UART, SPI, CAN)
C6	PD6	I/O	Multiplexed I/O & Peripheral Pin PD6 (UART)
C7	PD3	I/O	Multiplexed I/O & Peripheral Pin PD3 (UART)
C8	PC12	I/O	Multiplexed I/O & Peripheral Pin PC12 (UART, SPI)
C9	PA9	I/O	Multiplexed I/O & Peripheral Pin PA9 (UART, I2C)
C10	PA11	I/O	Multiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
C11	PC11	I/O	Multiplexed I/O & Peripheral Pin PC11 (General)
C12	PC12	I/O	Multiplexed I/O & Peripheral Pin PC12 (General)
C13	PC13	I/O	Multiplexed I/O & Peripheral Pin PC13 (General)
C14	PC14	I/O	Multiplexed I/O & Peripheral Pin PC14 (General)
C15	PC15	I/O	Multiplexed I/O & Peripheral Pin PC15 (General)
D1	PD15	I/O	Multiplexed I/O & Peripheral Pin PD15 (General)
D2	PD0	I/O	Multiplexed I/O & Peripheral Pin PD0 (General)
D3	PD1	I/O	Multiplexed I/O & Peripheral Pin PD1 (General)
D4	PE7	I/O	Multiplexed I/O & Peripheral Pin PE7 (General)
D5	PE8	I/O	Multiplexed I/O & Peripheral Pin PE8 (General)
D6	PE9	I/O	Multiplexed I/O & Peripheral Pin PE9 (General)
D7	PE10	I/O	Multiplexed I/O & Peripheral Pin PE10 (General)
D8	PE11	I/O	Multiplexed I/O & Peripheral Pin PE11 (General)
D9	PE12	I/O	Multiplexed I/O & Peripheral Pin PE12 (General)
D10	PE13	I/O	Multiplexed I/O & Peripheral Pin PE13 (General)
D11	PE14	I/O	Multiplexed I/O & Peripheral Pin PE14 (General)
D12	PE15	I/O	Multiplexed I/O & Peripheral Pin PE15 (General)
D13	PD8	I/O	Multiplexed I/O & Peripheral Pin PD8 (General)
D14	PD9	I/O	Multiplexed I/O & Peripheral Pin PD9 (General)
D15	PD10	I/O	Multiplexed I/O & Peripheral Pin PD10 (General)
E1	NRST	I	System Enable & Hardware Reset (NRST)
E2	PC2	I/O	Multiplexed I/O & Peripheral Pin PC2 (SPI, ADC)
E3	PE6	I/O	Multiplexed I/O & Peripheral Pin PE6 (SPI)
E4	VSS	GND	Ground Reference Pin (VSS)
E5	VSS	GND	Ground Reference Pin (VSS)
E6	BYPASS_REG	I/O	Multiplexed I/O & Peripheral Pin BYPASS_REG (General)
E7	VCAP_2	I/O	Multiplexed I/O & Peripheral Pin VCAP_2 (General)
E8	PD1	I/O	Multiplexed I/O & Peripheral Pin PD1 (UART)
E9	PC9	I/O	Multiplexed I/O & Peripheral Pin PC9 (I2C, RTC/CLK)
E10	PC7	I/O	Multiplexed I/O & Peripheral Pin PC7 (PWM)
E11	PE11	I/O	Multiplexed I/O & Peripheral Pin PE11 (General)
E12	PE12	I/O	Multiplexed I/O & Peripheral Pin PE12 (General)
E13	PE13	I/O	Multiplexed I/O & Peripheral Pin PE13 (General)
E14	PE14	I/O	Multiplexed I/O & Peripheral Pin PE14 (General)
E15	PE15	I/O	Multiplexed I/O & Peripheral Pin PE15 (General)
F1	PC0	I/O	Multiplexed I/O & Peripheral Pin PC0 (ADC)
F2	PC1	I/O	Multiplexed I/O & Peripheral Pin PC1 (SPI, I2C, ADC, RTC/CLK)
F3	PC3	I/O	Multiplexed I/O & Peripheral Pin PC3 (ADC)
F4	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
F5	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
F6	VDDUSB	Power	Power Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
F7	PDR_ON	I/O	Multiplexed I/O & Peripheral Pin PDR_ON (General)
F8	VCAP_1	I/O	Multiplexed I/O & Peripheral Pin VCAP_1 (General)
F9	PC8	I/O	Multiplexed I/O & Peripheral Pin PC8 (UART)
F10	PC6	I/O	Multiplexed I/O & Peripheral Pin PC6 (PWM)
F11	PF11	I/O	Multiplexed I/O & Peripheral Pin PF11 (General)
F12	PF12	I/O	Multiplexed I/O & Peripheral Pin PF12 (General)
F13	PF13	I/O	Multiplexed I/O & Peripheral Pin PF13 (General)
F14	PF14	I/O	Multiplexed I/O & Peripheral Pin PF14 (General)
F15	PF15	I/O	Multiplexed I/O & Peripheral Pin PF15 (General)
G1	VSSA	GND	Ground Reference Pin (VSSA)
G2	PA0- WKUP	I/O	Multiplexed I/O & Peripheral Pin PA0- WKUP (UART, ADC)
G3	PA4	I/O	Multiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
G4	PC4	I/O	Multiplexed I/O & Peripheral Pin PC4 (UART, ADC)
G5	PB2	I/O	Multiplexed I/O & Peripheral Pin PB2 (SPI, I2C)
G6	PG6	I/O	Multiplexed I/O & Peripheral Pin PG6 (General)
G10	PG10	I/O	Multiplexed I/O & Peripheral Pin PG10 (General)
G11	PG11	I/O	Multiplexed I/O & Peripheral Pin PG11 (General)
G12	PG12	I/O	Multiplexed I/O & Peripheral Pin PG12 (General)
G13	PG13	I/O	Multiplexed I/O & Peripheral Pin PG13 (General)
G14	PG14	I/O	Multiplexed I/O & Peripheral Pin PG14 (General)
G15	PG15	I/O	Multiplexed I/O & Peripheral Pin PG15 (General)
H1	VDDA	Power	Power Supply Input (VDDA — 3.3V VDD (Max 4.0V))
H2	PA1	I/O	Multiplexed I/O & Peripheral Pin PA1 (UART, ADC)
H3	PA5	I/O	Multiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC)
H4	PC5	I/O	Multiplexed I/O & Peripheral Pin PC5 (UART, ADC)
H5	PE7	I/O	Multiplexed I/O & Peripheral Pin PE7 (General)
H6	PH6	I/O	Multiplexed I/O & Peripheral Pin PH6 (General)
H10	PH10	I/O	Multiplexed I/O & Peripheral Pin PH10 (General)
H11	PH11	I/O	Multiplexed I/O & Peripheral Pin PH11 (General)
H12	PH12	I/O	Multiplexed I/O & Peripheral Pin PH12 (General)
H13	PH13	I/O	Multiplexed I/O & Peripheral Pin PH13 (General)
H14	PH14	I/O	Multiplexed I/O & Peripheral Pin PH14 (General)
H15	PH15	I/O	Multiplexed I/O & Peripheral Pin PH15 (General)
J1	VSS	GND	Ground Reference Pin (VSS)
J2	PA2	I/O	Multiplexed I/O & Peripheral Pin PA2 (SPI, ADC)
J3	PA6	I/O	Multiplexed I/O & Peripheral Pin PA6 (SPI, ADC)
J4	PB0	I/O	Multiplexed I/O & Peripheral Pin PB0 (ADC, PWM)
J5	PE8	I/O	Multiplexed I/O & Peripheral Pin PE8 (PWM)
J6	PJ6	I/O	Multiplexed I/O & Peripheral Pin PJ6 (General)
J10	VSS	GND	Ground Reference Pin (VSS)
J11	PJ11	I/O	Multiplexed I/O & Peripheral Pin PJ11 (General)
J12	PJ12	I/O	Multiplexed I/O & Peripheral Pin PJ12 (General)
J13	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
J14	PJ14	I/O	Multiplexed I/O & Peripheral Pin PJ14 (General)
J15	PJ15	I/O	Multiplexed I/O & Peripheral Pin PJ15 (General)
K1	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
K2	PA3	I/O	Multiplexed I/O & Peripheral Pin PA3 (ADC)
K3	PA7	I/O	Multiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
K4	PB1	I/O	Multiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
K5	PK5	I/O	Multiplexed I/O & Peripheral Pin PK5 (General)
K6	VSS	GND	Ground Reference Pin (VSS)
K7	VSS	GND	Ground Reference Pin (VSS)
K8	VSS	GND	Ground Reference Pin (VSS)
K9	VSS	GND	Ground Reference Pin (VSS)
K10	VSS	GND	Ground Reference Pin (VSS)
K11	PK11	I/O	Multiplexed I/O & Peripheral Pin PK11 (General)
K12	PK12	I/O	Multiplexed I/O & Peripheral Pin PK12 (General)
K13	PK13	I/O	Multiplexed I/O & Peripheral Pin PK13 (General)
K14	PK14	I/O	Multiplexed I/O & Peripheral Pin PK14 (General)
K15	PK15	I/O	Multiplexed I/O & Peripheral Pin PK15 (General)
L1	PL1	I/O	Multiplexed I/O & Peripheral Pin PL1 (General)
L2	PL2	I/O	Multiplexed I/O & Peripheral Pin PL2 (General)
L3	PL3	I/O	Multiplexed I/O & Peripheral Pin PL3 (General)
L4	PL4	I/O	Multiplexed I/O & Peripheral Pin PL4 (General)
L5	PL5	I/O	Multiplexed I/O & Peripheral Pin PL5 (General)
L6	PL6	I/O	Multiplexed I/O & Peripheral Pin PL6 (General)
L7	PL7	I/O	Multiplexed I/O & Peripheral Pin PL7 (General)
L8	PL8	I/O	Multiplexed I/O & Peripheral Pin PL8 (General)
L9	PL9	I/O	Multiplexed I/O & Peripheral Pin PL9 (General)
L10	PL10	I/O	Multiplexed I/O & Peripheral Pin PL10 (General)
L11	PL11	I/O	Multiplexed I/O & Peripheral Pin PL11 (General)
L12	PL12	I/O	Multiplexed I/O & Peripheral Pin PL12 (General)
L13	PL13	I/O	Multiplexed I/O & Peripheral Pin PL13 (General)
L14	PD15	I/O	Multiplexed I/O & Peripheral Pin PD15 (UART)
L15	PL15	I/O	Multiplexed I/O & Peripheral Pin PL15 (General)
M1	PM1	I/O	Multiplexed I/O & Peripheral Pin PM1 (General)
M2	PM2	I/O	Multiplexed I/O & Peripheral Pin PM2 (General)
M3	PM3	I/O	Multiplexed I/O & Peripheral Pin PM3 (General)
M4	PM4	I/O	Multiplexed I/O & Peripheral Pin PM4 (General)
M5	PM5	I/O	Multiplexed I/O & Peripheral Pin PM5 (General)
M6	PM6	I/O	Multiplexed I/O & Peripheral Pin PM6 (General)
M7	PM7	I/O	Multiplexed I/O & Peripheral Pin PM7 (General)
M8	PM8	I/O	Multiplexed I/O & Peripheral Pin PM8 (General)
M9	VSS	GND	Ground Reference Pin (VSS)
M10	PM10	I/O	Multiplexed I/O & Peripheral Pin PM10 (General)
M11	PM11	I/O	Multiplexed I/O & Peripheral Pin PM11 (General)
M12	PM12	I/O	Multiplexed I/O & Peripheral Pin PM12 (General)
M13	PM13	I/O	Multiplexed I/O & Peripheral Pin PM13 (General)
M14	PD14	I/O	Multiplexed I/O & Peripheral Pin PD14 (UART)
M15	PD13	I/O	Multiplexed I/O & Peripheral Pin PD13 (I2C, PWM)
N1	PN1	I/O	Multiplexed I/O & Peripheral Pin PN1 (General)
N2	PN2	I/O	Multiplexed I/O & Peripheral Pin PN2 (General)
N3	PN3	I/O	Multiplexed I/O & Peripheral Pin PN3 (General)
N4	PN4	I/O	Multiplexed I/O & Peripheral Pin PN4 (General)
N5	PN5	I/O	Multiplexed I/O & Peripheral Pin PN5 (General)
N6	PN6	I/O	Multiplexed I/O & Peripheral Pin PN6 (General)
N7	PN7	I/O	Multiplexed I/O & Peripheral Pin PN7 (General)
N8	PN8	I/O	Multiplexed I/O & Peripheral Pin PN8 (General)
N9	VDD	Power	Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
N10	PN10	I/O	Multiplexed I/O & Peripheral Pin PN10 (General)
N11	PE13	I/O	Multiplexed I/O & Peripheral Pin PE13 (SPI)
N12	PN12	I/O	Multiplexed I/O & Peripheral Pin PN12 (General)
N13	PD12	I/O	Multiplexed I/O & Peripheral Pin PD12 (General)
N14	PD11	I/O	Multiplexed I/O & Peripheral Pin PD11 (UART, I2C)
N15	PD10	I/O	Multiplexed I/O & Peripheral Pin PD10 (General)
P1	PP1	I/O	Multiplexed I/O & Peripheral Pin PP1 (General)
P2	PP2	I/O	Multiplexed I/O & Peripheral Pin PP2 (General)
P3	PP3	I/O	Multiplexed I/O & Peripheral Pin PP3 (General)
P4	PP4	I/O	Multiplexed I/O & Peripheral Pin PP4 (General)
P5	PP5	I/O	Multiplexed I/O & Peripheral Pin PP5 (General)
P6	PP6	I/O	Multiplexed I/O & Peripheral Pin PP6 (General)
P7	PP7	I/O	Multiplexed I/O & Peripheral Pin PP7 (General)
P8	PP8	I/O	Multiplexed I/O & Peripheral Pin PP8 (General)
P9	PE9	I/O	Multiplexed I/O & Peripheral Pin PE9 (UART, PWM)
P10	PE11	I/O	Multiplexed I/O & Peripheral Pin PE11 (SPI)
P11	PE14	I/O	Multiplexed I/O & Peripheral Pin PE14 (SPI)
P12	PB12	I/O	Multiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C)
P13	PB13	I/O	Multiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
P14	PD9	I/O	Multiplexed I/O & Peripheral Pin PD9 (General)
P15	PD8	I/O	Multiplexed I/O & Peripheral Pin PD8 (UART)
R1	PR1	I/O	Multiplexed I/O & Peripheral Pin PR1 (General)
R2	PR2	I/O	Multiplexed I/O & Peripheral Pin PR2 (General)
R3	PR3	I/O	Multiplexed I/O & Peripheral Pin PR3 (General)
R4	PR4	I/O	Multiplexed I/O & Peripheral Pin PR4 (General)
R5	PR5	I/O	Multiplexed I/O & Peripheral Pin PR5 (General)
R6	PR6	I/O	Multiplexed I/O & Peripheral Pin PR6 (General)
R7	PR7	I/O	Multiplexed I/O & Peripheral Pin PR7 (General)
R8	PR8	I/O	Multiplexed I/O & Peripheral Pin PR8 (General)
R9	PE10	I/O	Multiplexed I/O & Peripheral Pin PE10 (PWM)
R10	PE12	I/O	Multiplexed I/O & Peripheral Pin PE12 (SPI)
R11	PE15	I/O	Multiplexed I/O & Peripheral Pin PE15 (General)
R12	PB10	I/O	Multiplexed I/O & Peripheral Pin PB10 (UART, I2C)
R13	PR13	I/O	Multiplexed I/O & Peripheral Pin PR13 (General)
R14	PB14	I/O	Multiplexed I/O & Peripheral Pin PB14 (UART, SPI)
R15	PB15	I/O	Multiplexed I/O & Peripheral Pin PB15 (UART, RTC/CLK)

PIN A1 PF1

I/O

Multiplexed I/O & Peripheral Pin PF1 (General)

Design note: Signal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 17 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

STM32F765NGH7 (TFBGA-216) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

STM32F765NGH7 (TFBGA-216) - 2. Standard Pinout (Top View)

True package pinout (216 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

STM32F765NGH7 (TFBGA-216) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

STM32F765NGH7 (TFBGA-216) - 4. Package Dimensions (D×E×A)

TFBGA-216 · 13.00×13.00mm · Pitch 0.80mmExpand ›

5. Recommended Land PatternLAND PATTERN

STM32F765NGH7 (TFBGA-216) - 5. Recommended Land Pattern

IPC-7351B Footprint (216 Pads)Expand ›

6. Application SchematicSCHEMATIC

STM32F765NGH7 (TFBGA-216) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (17 figures · Page 1/2)

Showing 1–12 of 17 uncropped original figures for STM32F765 / STM32F767 / STM32F769

P64 · p64_fig01EXACT PACKAGE

Figure 20. STM32F76xxx TFBGA216 ballout

P243 · p243_fig01EXACT PACKAGE

Figure 104. TFBGA216 outline

P244 · p244_fig01EXACT PACKAGE

Figure 105. TFBGA216 recommended footprint

P244 · p244_fig02EXACT PACKAGE

Figure 105. TFBGA216 recommended footprint

P1 · p01_fig01881×617px

• Low-power - Sleep, Stop and Standby modes - VBAT supply for RTC, 32×32 bit backup registers + 4 Kbytes backup SRAM

P56 · p56_fig011560×1471px

Figure 12. STM32F76xxx TFBGA100 pinout

P66 · p66_fig011748×1076px

66/252 DS11532 Rev 7

P66 · p66_fig01P66

Datasheet Page 66 (p66_fig01)

P105 · p105_fig011546×2099px

Figure 24. STM32F769xx/STM32F779xx power supply scheme

P105 · p105_fig01P105

Datasheet Page 105 (p105_fig01)

P106 · p106_fig011551×2039px

Figure 25. STM32F765xx/STM32F767xx/STM32F777xx power supply scheme

P136 · p136_fig011546×487px

Figure 30. Typical application with an 8 MHz crystal

Page 1 / 2 (17 extracted figures)

Technical Specifications & Part Details (STM32F765NGH7)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Embedded Microcontroller Unit (MCU)

Detailed Overview:STM32F765NGH7 (TFBGA-216) is a 216-pin embedded microcontroller unit (mcu) featuring a 13.00 × 13.00 × 1.12 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.7 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, I2S, ADC, PWM, JTAG / SWD, IrDA, CAN, DAC, RTC/CLK, UART interfaces.

Operating Supply VoltageV_CC / V_DD

1.7 V to 3.6 V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C ~ +85°C (Industrial Grade)

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

216 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

61 5V-tolerant (FT) pins detected

Package Envelope (D × E × A)D × E × A

13.00 × 13.00 × 1.12 mm (A1=0.25 mm)

Package family: BGA (TFBGA-216)

Pin Count & Lead PitchN / e

216 Pins | Pitch e = 0.80 mm (31.5 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

USB, SPI, I2C, I2S, ADC, PWM, JTAG / SWD, IrDA, CAN, DAC, RTC/CLK, UART

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol216 auto-grouped pins

IPC-7351B Land Pattern216 pads · Pitch 0.80mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TFBGA-216)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

13.00 × 13.00 mm

Height (A) & Pitch (e)IPC-7351B

A=1.12mm · e=0.80mm

Pad Size (W × L)Level B

0.32 × 0.32 mm

Pins / Total PadsTopology

216P / 216Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit TFBGA-216	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F765NGH7 (TFBGA-216)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F765NGH7 (TFBGA-216)?

Manufactured by ST, the STM32F765NGH7 is housed in a TFBGA-216 package with 216 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: A1 (PF1: Multiplexed I/O & Peripheral Pin PF1 (General)), A2 (PF2: Multiplexed I/O & Peripheral Pin PF2 (General)), A3 (PF3: Multiplexed I/O & Peripheral Pin PF3 (General)), A4 (PF4: Multiplexed I/O & Peripheral Pin PF4 (General)), A5 (PF5: Multiplexed I/O & Peripheral Pin PF5 (General)), A6 (PF12: Multiplexed I/O & Peripheral Pin PF12 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32F765NGH7?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F765NGH7 (TFBGA-216) has a nominal body envelope of 13.00 × 13.00 mm, pitch e = 0.80 mm, and 216 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F765NGH7?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F765NGH7 (ST, TFBGA-216) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (216 pins) & STM32F765 / STM32F767 / STM32F769 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
A1	PF1	Digital_IO	Signal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
A2	PF2	Digital_IO	Signal terminal PF2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: General.
A3	PF3	Digital_IO	Signal terminal PF3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General.
A4	PF4	Digital_IO	Signal terminal PF4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
A5	PF5	Digital_IO	Signal terminal PF5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General.
A6	PF12	Digital_IO	Signal terminal PF12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF12. Supported peripheral buses: General.
A7	PF13	Digital_IO	Signal terminal PF13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF13. Supported peripheral buses: General.
A8	PF14	Digital_IO	Signal terminal PF14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF14. Supported peripheral buses: General.
A9	PF15	Digital_IO	Signal terminal PF15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF15. Supported peripheral buses: General.
A10	PG0	Digital_IO	Signal terminal PG0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG0. Supported peripheral buses: General.
A11	PG1	Digital_IO	Signal terminal PG1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG1. Supported peripheral buses: General.
A12	PG2	Digital_IO	Signal terminal PG2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG2. Supported peripheral buses: General.
A13	PA13	Digital_IO	Signal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
A14	PA14	Digital_IO	Signal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
A15	PA15	Digital_IO	Signal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
B1	PC15- OSC32_OUT	Digital_IO	Signal terminal PC15- OSC32_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15- OSC32_OUT. Supported peripheral buses: RTC/CLK.
B2	VBAT	Power_In	Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B3	PB3	Digital_IO	Signal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
B4	PB8	Digital_IO	Signal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C, CAN.
B5	PB6	Digital_IO	Signal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C.
B6	PD5	Digital_IO	Signal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART.
B7	PD2	Digital_IO	Signal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
B8	PC11	Digital_IO	Signal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISORX. Supported peripheral buses: SPI.
B9	PC10	Digital_IO	Signal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
B10	PA12	Digital_IO	Signal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_CKUART4TX. Supported peripheral buses: UART, SPI, CAN.
B11	PB11	Digital_IO	Signal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
B12	PB12	Digital_IO	Signal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
B13	PB13	Digital_IO	Signal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
B14	PB14	Digital_IO	Signal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
B15	PB15	Digital_IO	Signal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
C1	PH0- OSC_IN	Digital_IO	Signal terminal PH0- OSC_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0- OSC_IN. Supported peripheral buses: RTC/CLK.
C2	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C3	PE4	Digital_IO	Signal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI.
C4	PE1	Digital_IO	Signal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: UART.
C5	PB5	Digital_IO	Signal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SDSPI3MOSI, SPI6MOSI. Supported peripheral buses: UART, SPI, CAN.
C6	PD6	Digital_IO	Signal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: UART.
C7	PD3	Digital_IO	Signal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: UART.
C8	PC12	Digital_IO	Signal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SDUSART3. Supported peripheral buses: UART, SPI.
C9	PA9	Digital_IO	Signal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART, I2C.
C10	PA11	Digital_IO	Signal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_WSUART4RX. Supported peripheral buses: UART, SPI, PWM.
C11	PC11	Digital_IO	Signal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
C12	PC12	Digital_IO	Signal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
C13	PC13	Digital_IO	Signal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
C14	PC14	Digital_IO	Signal terminal PC14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14. Supported peripheral buses: General.
C15	PC15	Digital_IO	Signal terminal PC15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15. Supported peripheral buses: General.
D1	PD15	Digital_IO	Signal terminal PD15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: General.
D2	PD0	Digital_IO	Signal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
D3	PD1	Digital_IO	Signal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
D4	PE7	Digital_IO	Signal terminal PE7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
D5	PE8	Digital_IO	Signal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: General.
D6	PE9	Digital_IO	Signal terminal PE9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: General.
D7	PE10	Digital_IO	Signal terminal PE10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: General.
D8	PE11	Digital_IO	Signal terminal PE11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: General.
D9	PE12	Digital_IO	Signal terminal PE12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE12. Supported peripheral buses: General.
D10	PE13	Digital_IO	Signal terminal PE13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: General.
D11	PE14	Digital_IO	Signal terminal PE14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: General.
D12	PE15	Digital_IO	Signal terminal PE15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
D13	PD8	Digital_IO	Signal terminal PD8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: General.
D14	PD9	Digital_IO	Signal terminal PD9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD9. Supported peripheral buses: General.
D15	PD10	Digital_IO	Signal terminal PD10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD10. Supported peripheral buses: General.
E1	NRST	Digital_IO	Active-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
E2	PC2	Digital_IO	Signal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: SPI, ADC.
E3	PE6	Digital_IO	Signal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: SPI.
E4	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.

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