Mechanical Dimensions & Land Pattern (LQFP-208(28x28))
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
28.00 × 28.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.20 mm
Pins / Total PadsTopology
208P / 208Pad (QUAD_ROW)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit LQFP-208(28x28) | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32F765BGT6 (LQFP-208(28x28))
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32F765BGT6 (LQFP-208(28x28))?
Manufactured by ST, the STM32F765BGT6 is housed in a LQFP-208(28x28) package with 208 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: 1 (P1: Multiplexed I/O & Peripheral Pin P1 (General)), 2 (P2: Multiplexed I/O & Peripheral Pin P2 (General)), 3 (PE4: Multiplexed I/O & Peripheral Pin PE4 (SPI)), 4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (SPI)), 5 (PE6: Multiplexed I/O & Peripheral Pin PE6 (SPI)), 6 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))).
What are the IPC-7351B PCB Footprint dimensions for STM32F765BGT6?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F765BGT6 (LQFP-208(28x28)) has a nominal body envelope of 28.00 × 28.00 mm, pitch e = 0.50 mm, and 208 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F765BGT6?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F765BGT6 (ST, LQFP-208(28x28)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (208 pins) & STM32F765 / STM32F767 / STM32F769 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | P1 | Digital_IO | Signal terminal P1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: P1. Supported peripheral buses: General. |
| 2 | P2 | Digital_IO | Signal terminal P2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: P2. Supported peripheral buses: General. |
| 3 | PE4 | Digital_IO | Signal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI. |
| 4 | PE5 | Digital_IO | Signal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SADFSDM1. Supported peripheral buses: SPI. |
| 5 | PE6 | Digital_IO | Signal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: SPI. |
| 6 | VBAT | Power_In | Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 7 | PC13 | Digital_IO | Signal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK. |
| 8 | PC14- OSC32_IN | Digital_IO | Signal terminal PC14- OSC32_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14- OSC32_IN. Supported peripheral buses: RTC/CLK. |
| 9 | PC15- OSC32_OUT | Digital_IO | Signal terminal PC15- OSC32_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15- OSC32_OUT. Supported peripheral buses: RTC/CLK. |
| 10 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 11 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 12 | PH0- OSC_IN | Digital_IO | Signal terminal PH0- OSC_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0- OSC_IN. Supported peripheral buses: RTC/CLK. |
| 13 | PH1- OSC_OUT | Digital_IO | Signal terminal PH1- OSC_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH1- OSC_OUT. Supported peripheral buses: RTC/CLK. |
| 14 | NRST | Digital_IO | Active-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals. |
| 15 | PC0 | Digital_IO | Signal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC. |
| 16 | PC1 | Digital_IO | Signal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_M. Supported peripheral buses: SPI, I2C, ADC, RTC/CLK. |
| 17 | PC2 | Digital_IO | Signal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: SPI, ADC. |
| 18 | PC3 | Digital_IO | Signal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: ADC. |
| 19 | VSSA | GND | 0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks. |
| 20 | VREF+ | Analog | Signal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General. |
| 21 | VDDA | Power_In | Primary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 22 | PA0- WKUP | Digital_IO | Signal terminal PA0- WKUP (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA0- WKUP. Supported peripheral buses: UART, ADC. |
| 23 | PA1 | Digital_IO | Signal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC. |
| 24 | PA2 | Digital_IO | Signal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: SPI, ADC. |
| 25 | PA3 | Digital_IO | Signal terminal PA3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: ADC. |
| 26 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| 27 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 28 | PA4 | Digital_IO | Signal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, ADC, DAC. |
| 29 | PA5 | Digital_IO | Signal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_CKSPI6. Supported peripheral buses: SPI, ADC, DAC. |
| 30 | PA6 | Digital_IO | Signal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI6_MISO. Supported peripheral buses: SPI, ADC. |
| 31 | PA7 | Digital_IO | Signal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SDSPI6MOSI. Supported peripheral buses: SPI, ADC, PWM. |
| 32 | PC4 | Digital_IO | Signal terminal PC4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC. |
| 33 | PC5 | Digital_IO | Signal terminal PC5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC. |
| 34 | PB0 | Digital_IO | Signal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: ADC, PWM. |
| 35 | PB1 | Digital_IO | Signal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: ADC, PWM. |
| 36 | PB2 | Digital_IO | Signal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SDQUADSPI. Supported peripheral buses: SPI, I2C. |
| 37 | PE7 | Digital_IO | Signal terminal PE7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General. |
| 38 | PE8 | Digital_IO | Signal terminal PE8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: PWM. |
| 39 | PE9 | Digital_IO | Signal terminal PE9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: UART, PWM. |
| 40 | PE10 | Digital_IO | Signal terminal PE10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: PWM. |
| 41 | PE11 | Digital_IO | Signal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: SPI. |
| 42 | PE12 | Digital_IO | Signal terminal PE12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE12. Supported peripheral buses: SPI. |
| 43 | PE13 | Digital_IO | Signal terminal PE13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: SPI. |
| 44 | PE14 | Digital_IO | Signal terminal PE14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSISAI2MCLK. Supported peripheral buses: SPI. |
| 45 | PE15 | Digital_IO | Signal terminal PE15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General. |
| 46 | PB10 | Digital_IO | Signal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: UART, I2C. |
| 47 | PB11 | Digital_IO | Signal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: UART, I2C. |
| 48 | VCAP_1 | Digital_IO | Signal terminal VCAP_1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP_1. Supported peripheral buses: General. |
| 49 | VSS | GND | Bottom exposed die attach pad (VSS) providing primary thermal conduction path to the PCB and low-inductance 0V ground return. |
| 50 | VDD | Power_In | Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| 51 | PB12 | Digital_IO | Signal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: UART, SPI, I2C. |
| 52 | PB13 | Digital_IO | Signal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_CKDFSDM1. Supported peripheral buses: UART, SPI, PWM. |
| 53 | PB14 | Digital_IO | Signal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI. |
| 54 | PB15 | Digital_IO | Signal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: UART, RTC/CLK. |
| 55 | PD8 | Digital_IO | Signal terminal PD8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: UART. |
| 56 | PD9 | Digital_IO | Signal terminal PD9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD9. Supported peripheral buses: General. |
| 57 | PD10 | Digital_IO | Signal terminal PD10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD10. Supported peripheral buses: General. |
| 58 | PD11 | Digital_IO | Signal terminal PD11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD11. Supported peripheral buses: UART, I2C. |
| 59 | PD12 | Digital_IO | Signal terminal PD12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD12. Supported peripheral buses: General. |
| 60 | PD13 | Digital_IO | Signal terminal PD13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD13. Supported peripheral buses: I2C, PWM. |
| 61 | PD14 | Digital_IO | Signal terminal PD14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD14. Supported peripheral buses: UART. |
| 62 | PD15 | Digital_IO | Signal terminal PD15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: UART. |
| 63 | PC6 | Digital_IO | Signal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: PWM. |
| 64 | PC7 | Digital_IO | Signal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: PWM. |