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STM32L4R5ZIT6 (LQFP-144(20x20)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32L4R5ZIT6

STID: C1339786LQFP-144(20x20) · 144 Pins · Pitch 0.50mmDISCREPANCY REVIEW REQUIRED5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32L4R5ZIT6 (LQFP-144(20x20))1PE22PE33PE44PE55PE66VBAT7PC138PC14 - OSC329IO410VSS11VDD12PH0 - OSC_I 13PH1 - OSC_O 14NRST15PC016PC117PC218PC319VSSA20VREF -21VREF+22VDDA23PA024PA125PA226PA327VSS28VDD29PA430PA531PA632PA733PC434PC535PB036PB137PB238PE739PE840PE941PE1042PE1143PE1244PE1345PE1446PE1547PB1048PB1149VSS50VDD51PB1252PB1353PB1454PB1555PD856PD957PD1058PD1159PD1260PD1361PD1462PD1563PC664PC765PC866PC967PA868PA969PA1070PA1171PA1272PA13 (JTMS/ 144VDD143VSS142PE1141PE0140PB9139PB8138PH3-BOOT0137PB7136PB6135PB5134PB4133PB3132PG15131VDDIO2130VSS129PG14128PG13127PG12126PG11125PG10124PG9123PD7122PD6121VDD120VSS119PD5118PD4117PD3116PD2115PD1114PD0113PC12112PC11111PC10110PA15109PA14108VDD107VSS106VDDUSB105PA13104PA12103PA11102PA10101PA9100PA899PC998PC897PC796PC695VDDIO294VSS93PG892PG791PG690PG589PG488PG387PG286PD1585PD1484VDD83VSS82PD1381PD1280PD1179PD1078PD977PD876PB1575VDD74VSS73VDDUS BGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.896.591.486.481.376.271.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1-76.2-81.3-86.4-91.4-96.5mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144E=20.00mm · Pitch e=0.50mmD=20.00mm-17-15-13-11-9-7-5-3-113579111315171715131197531-1-3-5-7-9-11-13-15-17mm
3. 3D CAD MODEL
Package Body: 20.00mm × 20.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (144/144)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (PWM)
3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (PWM)
4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI, PWM)
5PE6I/OMultiplexed I/O & Peripheral Pin PE6 (I2C, PWM, RTC/CLK)
6VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
7PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
8PC14 - OSC32_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
9IO4I/OGPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10VSSGNDGround Reference Pin (VSS)
11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
12PH0 - OSC_I N(PH0)I/OMultiplexed I/O & Peripheral Pin PH0 - OSC_I N(PH0) (RTC/CLK)
13PH1 - OSC_O UT (PH1)I/OMultiplexed I/O & Peripheral Pin PH1 - OSC_O UT (PH1) (RTC/CLK)
14NRSTISystem Enable & Hardware Reset (NRST)
15PC0I/OMultiplexed I/O & Peripheral Pin PC0 (I2C, ADC)
16PC1I/OMultiplexed I/O & Peripheral Pin PC1 (SPI, I2C, ADC)
17PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC)
18PC3I/OMultiplexed I/O & Peripheral Pin PC3 (I2C, ADC)
19VSSAGNDGround Reference Pin (VSSA)
20VREF -AnalogMultiplexed I/O & Peripheral Pin VREF - (General)
21VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
22VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
23PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
24PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, I2C, ADC, PWM)
25PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
26PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
27VSSGNDGround Reference Pin (VSS)
28VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
29PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
30PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
31PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, PWM)
32PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, I2C, ADC, PWM)
33PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
34PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
35PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, SPI, ADC, PWM)
36PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
37PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, RTC/CLK)
38PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
39PE8I/OMultiplexed I/O & Peripheral Pin PE8 (SPI, PWM)
40PE9I/OMultiplexed I/O & Peripheral Pin PE9 (PWM)
41PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
42PE11I/OMultiplexed I/O & Peripheral Pin PE11 (PWM)
43PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, PWM)
44PE13I/OMultiplexed I/O & Peripheral Pin PE13 (SPI, PWM)
45PE14I/OMultiplexed I/O & Peripheral Pin PE14 (SPI, PWM)
46PE15I/OMultiplexed I/O & Peripheral Pin PE15 (SPI)
47PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C, PWM)
48PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, I2C, PWM)
49VSSGNDExposed Thermal & Ground Pad (VSS)
50VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
51PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C)
52PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, I2C, PWM)
53PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, I2C, PWM)
54PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, I2C, PWM, RTC/CLK)
55PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
56PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
57PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART, SPI)
58PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, I2C)
59PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, PWM)
60PD13I/OMultiplexed I/O & Peripheral Pin PD13 (I2C, PWM)
61PD14I/OMultiplexed I/O & Peripheral Pin PD14 (PWM)
62PD15I/OMultiplexed I/O & Peripheral Pin PD15 (PWM)
63PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
64PC7I/OMultiplexed I/O & Peripheral Pin PC7 (PWM)
65PC8I/OMultiplexed I/O & Peripheral Pin PC8 (PWM)
66PC9I/OMultiplexed I/O & Peripheral Pin PC9 (I2C, PWM)
67PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI, RTC/CLK)
68PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, SPI, PWM)
69PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, I2C, PWM)
70PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM, CAN)
71PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, SPI, CAN)
72PA13 (JTMS/ SWDIO )I/OMultiplexed I/O & Peripheral Pin PA13 (JTMS/ SWDIO ) (SWD/JTAG)
73VDDUS BPowerPower Supply Input (VDDUS B — 3.3V VDD (Max 4.0V))
74VSSGNDGround Reference Pin (VSS)
75VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
76PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
77PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
78PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
79PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
80PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
81PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
82PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
83VSSGNDGround Reference Pin (VSS)
84VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
85PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
86PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
87PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
88PG3I/OMultiplexed I/O & Peripheral Pin PG3 (SPI)
89PG4I/OMultiplexed I/O & Peripheral Pin PG4 (SPI)
90PG5I/OMultiplexed I/O & Peripheral Pin PG5 (UART, SPI)
91PG6I/OMultiplexed I/O & Peripheral Pin PG6 (UART, I2C)
92PG7I/OMultiplexed I/O & Peripheral Pin PG7 (General)
93PG8I/OMultiplexed I/O & Peripheral Pin PG8 (General)
94VSSGNDGround Reference Pin (VSS)
95VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
96PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
97PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
98PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
99PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
100PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
101PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
102PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
103PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
104PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
105PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
106VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
107VSSGNDGround Reference Pin (VSS)
108VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
109PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
110PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
111PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
112PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
113PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
114PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
115PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
116PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
117PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
118PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
119PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
120VSSGNDGround Reference Pin (VSS)
121VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
122PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
123PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
124PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
125PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
126PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
127PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
128PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
129PG14I/OMultiplexed I/O & Peripheral Pin PG14 (General)
130VSSGNDGround Reference Pin (VSS)
131VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
132PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
133PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
134PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
135PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
136PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
137PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
138PH3-BOOT0I/OMultiplexed I/O & Peripheral Pin PH3-BOOT0 (General)
139PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
140PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
141PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
142PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
143VSSGNDGround Reference Pin (VSS)
144VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
PIN 1 PE2
I/O
Multiplexed I/O & Peripheral Pin PE2 (General)
Design note: Alt: TRACECK , TIM3_ETR , SAI1_CK1 , TSC_G7IO1_ , LCD_R0FMCA23 ,_ , SAI1_MCLKA_ , EVENTOUT
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 15 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32L4R5ZIT6 (ST · LQFP-144(20x20))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32L4R5ZIT6 (LQFP-144(20x20)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32L4R5ZIT6 (LQFP-144(20x20)) - 2. Standard Pinout (Top View)
True package pinout (144 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32L4R5ZIT6 (LQFP-144(20x20)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32L4R5ZIT6 (LQFP-144(20x20)) - 4. Package Dimensions (D×E×A)
LQFP-144(20x20) · 20.00×20.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32L4R5ZIT6 (LQFP-144(20x20)) - 5. Recommended Land Pattern
IPC-7351B Footprint (144 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32L4R5ZIT6 (LQFP-144(20x20)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (15 figures · Page 1/2)
Showing 1–12 of 15 uncropped original figures for STM32L4R9ZIJ / STM32L4R5QGI / STM32L4R5QII
P68 · p68_fig01EXACT PACKAGE
STM32L4R5ZIT6 (LQFP-144(20x20)) — Figure 12. STM32L4R5xx and STM32L4R7xx LQFP144 pinout(1)
Figure 12. STM32L4R5xx and STM32L4R7xx LQFP144 pinout(1)
P69 · p69_fig01EXACT PACKAGE
STM32L4R5ZIT6 (LQFP-144(20x20)) — Figure 13. STM32L4R9xx LQFP144 pinout(1) PH3-BOOT0 135
Figure 13. STM32L4R9xx LQFP144 pinout(1) PH3-BOOT0 135
P70 · p70_fig01EXACT PACKAGE
STM32L4R5ZIT6 (LQFP-144(20x20)) — Figure 14. STM32L4R5ZxxxP external SMPS LQFP144 pinout(1)
Figure 14. STM32L4R5ZxxxP external SMPS LQFP144 pinout(1)
P290 · p290_fig01EXACT PACKAGE
STM32L4R5ZIT6 (LQFP-144(20x20)) — Figure 78. LQFP144 recommended footprint
Figure 78. LQFP144 recommended footprint
P1 · p01_fig01881×470px
STM32L4R5ZIT6 (LQFP-144(20x20)) — • RTC with HW calendar, alarms and calibration
• RTC with HW calendar, alarms and calibration
P68 · p68_fig01P68
STM32L4R5ZIT6 (LQFP-144(20x20)) — Datasheet Page 68 (p68_fig01)
Datasheet Page 68 (p68_fig01)
P137 · p137_fig011546×2000px
STM32L4R5ZIT6 (LQFP-144(20x20)) — Figure 25. Power supply scheme VBAT
Figure 25. Power supply scheme VBAT
P137 · p137_fig01P137
STM32L4R5ZIT6 (LQFP-144(20x20)) — Datasheet Page 137 (p137_fig01)
Datasheet Page 137 (p137_fig01)
P188 · p188_fig011546×702px
STM32L4R5ZIT6 (LQFP-144(20x20)) — Figure 30. Typical application with an 8 MHz crystal
Figure 30. Typical application with an 8 MHz crystal
P189 · p189_fig011546×702px
STM32L4R5ZIT6 (LQFP-144(20x20)) — Figure 31. Typical application with a 32.768 kHz crystal
Figure 31. Typical application with a 32.768 kHz crystal
P286 · p286_fig011548×472px
STM32L4R5ZIT6 (LQFP-144(20x20)) — Figure 75. UFBGA144 recommended footprint
Figure 75. UFBGA144 recommended footprint
P286 · p286_fig021546×1107px
STM32L4R5ZIT6 (LQFP-144(20x20)) — Figure 75. UFBGA144 recommended footprint
Figure 75. UFBGA144 recommended footprint
Page 1 / 2 (15 extracted figures)

Technical Specifications & Part Details (STM32L4R5ZIT6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32L4R5ZIT6 (LQFP-144(20x20)) is a 144-pin embedded microcontroller unit (mcu) featuring a 20.00 × 20.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, I2C, ADC, DAC, JTAG / SWD, IrDA, CAN, PWM, RTC/CLK, SPI, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
120 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
61 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
20.00 × 20.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-144(20x20))
Pin Count & Lead PitchN / e
144 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, I2C, ADC, DAC, JTAG / SWD, IrDA, CAN, PWM, RTC/CLK, SPI, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PH3-BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol144 auto-grouped pins
OK
IPC-7351B Land Pattern144 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-144(20x20))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
20.00 × 20.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.35 × 1.35 mm
Pins / Total PadsTopology
144P / 144Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-144(20x20)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32L4R5ZIT6 (LQFP-144(20x20))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32L4R5ZIT6 (LQFP-144(20x20))?

Manufactured by ST, the STM32L4R5ZIT6 is housed in a LQFP-144(20x20) package with 144 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: 1 (PE2: Multiplexed I/O & Peripheral Pin PE2 (General)), 2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (PWM)), 3 (PE4: Multiplexed I/O & Peripheral Pin PE4 (PWM)), 4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (SPI, PWM)), 5 (PE6: Multiplexed I/O & Peripheral Pin PE6 (I2C, PWM, RTC/CLK)), 6 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))).

What are the IPC-7351B PCB Footprint dimensions for STM32L4R5ZIT6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32L4R5ZIT6 (LQFP-144(20x20)) has a nominal body envelope of 20.00 × 20.00 mm, pitch e = 0.50 mm, and 144 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32L4R5ZIT6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32L4R5ZIT6 (ST, LQFP-144(20x20)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (144 pins) & STM32L4R9ZIJ / STM32L4R5QGI / STM32L4R5QII Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: PWM.
3PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: PWM.
4PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: SPI, PWM.
5PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: I2C, PWM, RTC/CLK.
6VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
7PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
8PC14 - OSC32_IN (PC14)Digital_IOSignal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK.
9IO4Digital_IOGPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
11VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
12PH0 - OSC_I N(PH0)Digital_IOSignal terminal PH0 - OSC_I N(PH0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0 - OSC_I N(PH0). Supported peripheral buses: RTC/CLK.
13PH1 - OSC_O UT (PH1)Digital_IOSignal terminal PH1 - OSC_O UT (PH1) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH1 - OSC_O UT (PH1). Supported peripheral buses: RTC/CLK.
14NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
15PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL. Supported peripheral buses: I2C, ADC.
16PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI, I2C3_SDA. Supported peripheral buses: SPI, I2C, ADC.
17PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, ADC.
18PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: I2C, ADC.
19VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
20VREF -AnalogSignal terminal VREF - (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF -. Supported peripheral buses: General.
21VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
22VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
23PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
24PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, SPI1_SCK. Supported peripheral buses: UART, SPI, I2C, ADC, PWM.
25PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, PWM.
26PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC, PWM.
27VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
28VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
29PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, ADC, DAC.
30PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC, DAC, PWM.
31PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC, PWM.
32PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL, SPI1_MOSI. Supported peripheral buses: SPI, I2C, ADC, PWM.
33PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
34PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC.
35PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, ADC, PWM.
36PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM.
37PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: I2C, RTC/CLK.
38PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
39PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: SPI, PWM.
40PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: PWM.
41PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: PWM.
42PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: PWM.
43PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: SPI, PWM.
44PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, PWM.
45PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, PWM.
46PE15Digital_IOSignal terminal PE15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI.
47PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: UART, SPI, I2C, PWM.
48PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: UART, I2C, PWM.
49VSSGNDBottom exposed die attach pad (VSS) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
50VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
51PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SMBA, SPI2_NSS. Supported peripheral buses: UART, SPI, I2C.
52PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: UART, SPI, I2C, PWM.
53PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA, SPI2_MISO. Supported peripheral buses: UART, SPI, I2C, PWM.
54PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, I2C, PWM, RTC/CLK.
55PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: UART.
56PD9Digital_IOSignal terminal PD9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD9. Supported peripheral buses: UART.
57PD10Digital_IOSignal terminal PD10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD10. Supported peripheral buses: UART, SPI.
58PD11Digital_IOSignal terminal PD11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SMBA. Supported peripheral buses: UART, I2C.
59PD12Digital_IOSignal terminal PD12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD12. Supported peripheral buses: UART, PWM.
60PD13Digital_IOSignal terminal PD13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SDA. Supported peripheral buses: I2C, PWM.
61PD14Digital_IOSignal terminal PD14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD14. Supported peripheral buses: PWM.
62PD15Digital_IOSignal terminal PD15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: PWM.
63PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: PWM.
64PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: PWM.
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