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STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32L151VEY6TR

STID: C1339535WLCSP-104(4.1x5.1) · 104 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32L151VEY6TR (WLCSP-104(4.1x5.1))A1VSS_2A2PD0A3PD4A4PD7A5PB4A6PB5A7BOOT0A8PE1A9VDD_3B1PA15B2PC12B3PD5B4PD6B5PB3B6PB7B7PE0B8VDD_3B9PE5C1VDD_2C2PC11C3PD2C4PD3C5PB6C6PB9C7VSS_3C8PE4C9PC13WKUP2 -D1PH2D2VSS_2D3PA14D4PD1D5PB8D6PE2D7PE3D8PC14 - OSC32D9PC15 - OSC32E1PA11E2PA12E3PA13E4PC10E6PE6 - WKUP3E7V (3) LCDE8VSS_5E9VDD_5F1PA9F2PA10F3PA8F4PC9F6PC0F7NRSTF8PH0 OSC IN(5F9PH1 - OSC OUM9VDD_4M8PA5M7PC5M6PB2M5PE8M4PE9M3PE12M2PB10M1VSS_1L9PA1L8VDD_4L7PC4L6PE7L5PE11L4PE14L3PB11L2VSS_1L1PB14K9PA0WKUP1 -K8VSS_4K7PA7K6PB1K5PE13K4PE15K3VDD_1K2PB15K1PD10J9VSSAJ8PA2J7PA4J6PB0J5PE10J4PB12J3PB13J2PD9J1PD14H9PC1H8VREF-H7PA3H6PA6H4PD8H3PD12H2PD13H1PC6G9PC2G8PC3G7VREF+G6VDDAG4PD11G3PD15G2PC8G1PC7Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.871.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1A2B2C2D2E2F2G2H2J2K2L2M2A3B3C3D3E3F3G3H3J3K3L3M3A4B4C4D4E4F4G4H4J4K4L4M4A5B5C5D5J5K5L5M5A6B6C6D6E6F6G6H6J6K6L6M6A7B7C7D7E7F7G7H7J7K7L7M7A8B8C8D8E8F8G8H8J8K8L8M8A9B9C9D9E9F9G9H9J9K9L9M9E=4.10mm · Pitch e=0.40mmD=5.10mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 4.10mm × 5.10mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (104/104)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VSS_2GNDGround Reference Pin (VSS_2)
A2PD0I/OMultiplexed I/O & Peripheral Pin PD0 (SPI)
A3PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART, SPI)
A4PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART)
A5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (SPI, SWD/JTAG)
A6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, I2C)
A7BOOT0IInput-Only Pin BOOT0 (General)
A8PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
A9VDD_3PowerPower Supply Input (VDD_3 — 3.3V VDD (Max 4.0V))
B1PA15I/OMultiplexed I/O & Peripheral Pin PA15 (SPI, SWD/JTAG)
B2PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
B3PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
B4PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART)
B5PB3I/OMultiplexed I/O & Peripheral Pin PB3 (SPI, SWD/JTAG)
B6PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C)
B7PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
B8VDD_3PowerPower Supply Input (VDD_3 — 3.3V VDD (Max 4.0V))
B9PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
C1VDD_2PowerPower Supply Input (VDD_2 — 3.3V VDD (Max 4.0V))
C2PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
C3PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
C4PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
C5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C)
C6PB9I/OMultiplexed I/O & Peripheral Pin PB9 (I2C)
C7VSS_3GNDGround Reference Pin (VSS_3)
C8PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
C9PC13WKUP2 -I/OMultiplexed I/O & Peripheral Pin PC13WKUP2 - (RTC/CLK)
D1PH2I/OMultiplexed I/O & Peripheral Pin PH2 (General)
D2VSS_2GNDGround Reference Pin (VSS_2)
D3PA14I/OMultiplexed I/O & Peripheral Pin PA14 (SWD/JTAG)
D4PD1I/OMultiplexed I/O & Peripheral Pin PD1 (SPI)
D5PB8I/OMultiplexed I/O & Peripheral Pin PB8 (I2C)
D6PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
D7PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
D8PC14 - OSC32 IN(4)_I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32 IN(4)_ (RTC/CLK)
D9PC15 - OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15 - OSC32_OUT (RTC/CLK)
E1PA11I/OMultiplexed I/O & Peripheral Pin PA11 (USB, UART, SPI)
E2PA12I/OMultiplexed I/O & Peripheral Pin PA12 (USB, UART, SPI)
E3PA13I/OMultiplexed I/O & Peripheral Pin PA13 (SWD/JTAG)
E4PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
E6PE6 - WKUP3I/OMultiplexed I/O & Peripheral Pin PE6 - WKUP3 (RTC/CLK)
E7V (3) LCDI/OMultiplexed I/O & Peripheral Pin V (3) LCD (General)
E8VSS_5GNDGround Reference Pin (VSS_5)
E9VDD_5PowerPower Supply Input (VDD_5 — 3.3V VDD (Max 4.0V))
F1PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART)
F2PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART)
F3PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, RTC/CLK)
F4PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
F6PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC)
F7NRSTISystem Enable & Hardware Reset (NRST)
F8PH0 OSC IN(5) -_I/OMultiplexed I/O & Peripheral Pin PH0 OSC IN(5) -_ (RTC/CLK)
F9PH1 - OSC OUT(5)_I/OMultiplexed I/O & Peripheral Pin PH1 - OSC OUT(5)_ (RTC/CLK)
G1PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
G2PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
G3PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
G4PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART)
G6VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
G7VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
G8PC3I/OMultiplexed I/O & Peripheral Pin PC3 (ADC)
G9PC2I/OMultiplexed I/O & Peripheral Pin PC2 (ADC)
H1PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
H2PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
H3PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART)
H4PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
H6PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC)
H7PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC)
H8VREF-AnalogMultiplexed I/O & Peripheral Pin VREF- (General)
H9PC1I/OMultiplexed I/O & Peripheral Pin PC1 (ADC)
J1PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
J2PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
J3PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, ADC)
J4PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C, ADC)
J5PE10I/OMultiplexed I/O & Peripheral Pin PE10 (ADC, PWM)
J6PB0I/OMultiplexed I/O & Peripheral Pin PB0 (ADC)
J7PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
J8PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC)
J9VSSAGNDGround Reference Pin (VSSA)
K1PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART)
K2PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, ADC, RTC/CLK)
K3VDD_1PowerPower Supply Input (VDD_1 — 3.3V VDD (Max 4.0V))
K4PE15I/OMultiplexed I/O & Peripheral Pin PE15 (SPI)
K5PE13I/OMultiplexed I/O & Peripheral Pin PE13 (SPI)
K6PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC)
K7PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC)
K8VSS_4GNDGround Reference Pin (VSS_4)
K9PA0WKUP1 -I/OMultiplexed I/O & Peripheral Pin PA0WKUP1 - (UART, ADC, RTC/CLK)
L1PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, ADC)
L2VSS_1GNDGround Reference Pin (VSS_1)
L3PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, I2C)
L4PE14I/OMultiplexed I/O & Peripheral Pin PE14 (SPI)
L5PE11I/OMultiplexed I/O & Peripheral Pin PE11 (PWM)
L6PE7I/OMultiplexed I/O & Peripheral Pin PE7 (ADC)
L7PC4I/OMultiplexed I/O & Peripheral Pin PC4 (ADC)
L8VDD_4PowerPower Supply Input (VDD_4 — 3.3V VDD (Max 4.0V))
L9PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC)
M1VSS_1GNDGround Reference Pin (VSS_1)
M2PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, I2C)
M3PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI)
M4PE9I/OMultiplexed I/O & Peripheral Pin PE9 (ADC, PWM)
M5PE8I/OMultiplexed I/O & Peripheral Pin PE8 (ADC)
M6PB2I/OMultiplexed I/O & Peripheral Pin PB2 (ADC)
M7PC5I/OMultiplexed I/O & Peripheral Pin PC5 (ADC)
M8PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC)
M9VDD_4PowerPower Supply Input (VDD_4 — 3.3V VDD (Max 4.0V))
PIN A1 VSS_2
GND
Ground Reference Pin (VSS_2)
Design note: VSS_2
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 14 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32L151VEY6TR (ST · WLCSP-104(4.1x5.1))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) - 2. Standard Pinout (Top View)
True package pinout (104 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) - 4. Package Dimensions (D×E×A)
WLCSP-104(4.1x5.1) · 4.10×5.10mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) - 5. Recommended Land Pattern
IPC-7351B Footprint (104 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (14 figures · Page 1/2)
Showing 1–12 of 14 uncropped original figures for STM32L151 / STM32L152
P34 · p34_fig01EXACT PACKAGE
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Figure 5. STM32L15xVEY WLCSP104 ballout 9 1 2
Figure 5. STM32L15xVEY WLCSP104 ballout 9 1 2
P121 · p121_fig01EXACT PACKAGE
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Figure 37. WLCSP104 outline
Figure 37. WLCSP104 outline
P122 · p122_fig01EXACT PACKAGE
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Figure 38. WLCSP104 recommended footprint
Figure 38. WLCSP104 recommended footprint
P123 · p123_fig01EXACT PACKAGE
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Figure 39. WLCSP104 top view example
Figure 39. WLCSP104 top view example
P1 · p01_fig01881×589px
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Ultra-low-power 32-bit MCU Arm®-based Cortex®-M3 with 512KB
Ultra-low-power 32-bit MCU Arm®-based Cortex®-M3 with 512KB
P32 · p32_fig011546×1304px
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Figure 3. STM32L15xRE LQFP64 pinout VDD_3 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 17 18 19 20 21 22 23 24 29 30 31 32 25 26 27 28
Figure 3. STM32L15xRE LQFP64 pinout VDD_3 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 17 18 19 20 21 22 23 24 29 30 31 32 25 26 27 28
P32 · p32_fig01P32
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Datasheet Page 32 (p32_fig01)
Datasheet Page 32 (p32_fig01)
P58 · p58_fig011546×1260px
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Figure 11. Power supply scheme
Figure 11. Power supply scheme
P58 · p58_fig01P58
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Datasheet Page 58 (p58_fig01)
Datasheet Page 58 (p58_fig01)
P59 · p59_fig011546×702px
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Figure 12. Optional LCD power supply scheme
Figure 12. Optional LCD power supply scheme
P59 · p59_fig021546×814px
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Figure 13. Current consumption measurement scheme
Figure 13. Current consumption measurement scheme
P81 · p81_fig011546×548px
STM32L151VEY6TR (WLCSP-104(4.1x5.1)) — Figure 17. Typical application with a 32.768 kHz crystal
Figure 17. Typical application with a 32.768 kHz crystal
Page 1 / 2 (14 extracted figures)

Technical Specifications & Part Details (STM32L151VEY6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32L151VEY6TR (WLCSP-104(4.1x5.1)) is a 104-pin embedded microcontroller unit (mcu) featuring a 5.10 × 4.10 × 0.56 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.65 V to 3.6 V supply operation across -40 °C to 105 °C with integrated USB, UART, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, RTC/CLK, SPI, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.65 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40 °C to 105 °C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
32 kHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
70 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
5.10 × 4.10 × 0.56 mm (A1=0.17 mm)
Package family: WLCSP (WLCSP-104(4.1x5.1))
Pin Count & Lead PitchN / e
104 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, RTC/CLK, SPI, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0, PB2): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol104 auto-grouped pins
OK
IPC-7351B Land Pattern104 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-104(4.1x5.1))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
5.10 × 4.10 mm
Height (A) & Pitch (e)IPC-7351B
A=0.56mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
104P / 104Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-104(4.1x5.1)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32L151VEY6TR (WLCSP-104(4.1x5.1))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32L151VEY6TR (WLCSP-104(4.1x5.1))?

Manufactured by ST, the STM32L151VEY6TR is housed in a WLCSP-104(4.1x5.1) package with 104 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.65 V to 3.6 V. Key pins include: A1 (VSS_2: Ground Reference Pin (VSS_2)), A2 (PD0: Multiplexed I/O & Peripheral Pin PD0 (SPI)), A3 (PD4: Multiplexed I/O & Peripheral Pin PD4 (UART, SPI)), A4 (PD7: Multiplexed I/O & Peripheral Pin PD7 (UART)), A5 (PB4: Multiplexed I/O & Peripheral Pin PB4 (SPI, SWD/JTAG)), A6 (PB5: Multiplexed I/O & Peripheral Pin PB5 (SPI, I2C)).

What are the IPC-7351B PCB Footprint dimensions for STM32L151VEY6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32L151VEY6TR (WLCSP-104(4.1x5.1)) has a nominal body envelope of 4.10 × 5.10 mm, pitch e = 0.40 mm, and 104 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32L151VEY6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32L151VEY6TR (ST, WLCSP-104(4.1x5.1)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (104 pins) & STM32L151 / STM32L152 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VSS_2GND0V electrical ground return terminal (VSS_2) for internal core logic, I/O drivers, and analog sub-blocks.
A2PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI.
A3PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: UART, SPI.
A4PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: UART.
A5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO. Supported peripheral buses: SPI, SWD/JTAG.
A6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, SPI1_MOSI, SPI3_MOSI. Supported peripheral buses: SPI, I2C.
A7BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
A8PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
A9VDD_3Power_InPrimary positive power supply input (VDD_3) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B1PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: SPI, SWD/JTAG.
B2PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI.
B3PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART.
B4PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: UART.
B5PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK. Supported peripheral buses: SPI, SWD/JTAG.
B6PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: UART, I2C.
B7PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
B8VDD_3Power_InPrimary positive power supply input (VDD_3) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B9PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
C1VDD_2Power_InPrimary positive power supply input (VDD_2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C2PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
C3PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
C4PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI.
C5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C.
C6PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: I2C.
C7VSS_3GND0V electrical ground return terminal (VSS_3) for internal core logic, I/O drivers, and analog sub-blocks.
C8PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
C9PC13WKUP2 -Digital_IOSignal terminal PC13WKUP2 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13WKUP2 -. Supported peripheral buses: RTC/CLK.
D1PH2Digital_IOSignal terminal PH2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH2. Supported peripheral buses: General.
D2VSS_2GND0V electrical ground return terminal (VSS_2) for internal core logic, I/O drivers, and analog sub-blocks.
D3PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: SWD/JTAG.
D4PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
D5PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: I2C.
D6PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
D7PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
D8PC14 - OSC32 IN(4)_Digital_IOSignal terminal PC14 - OSC32 IN(4)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14 - OSC32 IN(4)_. Supported peripheral buses: RTC/CLK.
D9PC15 - OSC32_OUTDigital_IOSignal terminal PC15 - OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15 - OSC32_OUT. Supported peripheral buses: RTC/CLK.
E1PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, USB_DM. Supported peripheral buses: USB, UART, SPI.
E2PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, USB_DP. Supported peripheral buses: USB, UART, SPI.
E3PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: SWD/JTAG.
E4PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
E6PE6 - WKUP3Digital_IOSignal terminal PE6 - WKUP3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE6 - WKUP3. Supported peripheral buses: RTC/CLK.
E7V (3) LCDDigital_IOSignal terminal V (3) LCD (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: V (3) LCD. Supported peripheral buses: General.
E8VSS_5GND0V electrical ground return terminal (VSS_5) for internal core logic, I/O drivers, and analog sub-blocks.
E9VDD_5Power_InPrimary positive power supply input (VDD_5) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
F1PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART.
F2PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART.
F3PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: UART, RTC/CLK.
F4PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: General.
F6PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC.
F7NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
F8PH0 OSC IN(5) -_Digital_IOSignal terminal PH0 OSC IN(5) -_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH0 OSC IN(5) -_. Supported peripheral buses: RTC/CLK.
F9PH1 - OSC OUT(5)_Digital_IOSignal terminal PH1 - OSC OUT(5)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH1 - OSC OUT(5)_. Supported peripheral buses: RTC/CLK.
G1PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
G2PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
G3PD15Digital_IOSignal terminal PD15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: General.
G4PD11Digital_IOSignal terminal PD11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD11. Supported peripheral buses: UART.
G6VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
G7VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
G8PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: ADC.
G9PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: ADC.
H1PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
H2PD13Digital_IOSignal terminal PD13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD13. Supported peripheral buses: General.
H3PD12Digital_IOSignal terminal PD12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD12. Supported peripheral buses: UART.
H4PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: UART.
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