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STM32L496ZGT3 (LQFP-144(20x20)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32L496ZGT3

STID: C1337594LQFP-144(20x20) · 144 Pins · Pitch 0.50mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32L496ZGT3 (LQFP-144(20x20))1PE22PE33PE44PE55PE66VBAT7PC138PC14 - OSC329IO410PF011PF112PF213PF314PF415PF516VSS17VDD18PF619PF720PF821PF922PF1023PH0OSC IN -_24PH1 - OSC_OU25NRST26PC027PC128PC229PC330VSSA31VREF -32VREF+33VDDA34PA035PA136PA237PA338VSS39VDD40PA441PA542PA643PA744PC445PC546PB047PB148PB249PF1150PF1251VSS52VDD53PF1354PF1455PF1556PG057PG158PE759PE860PE961VSS62VDD63PE1064PE1165PE1266PE1367PE1468PE1569PB1070PB1171VSS72VDD144VDD143VSS142PE1141PE0140PB9139PB8138PH3-BOOT0137PB7136PB6135PB5134PB4133PB3132PG15131VDDIO2130VSS129PG14128PG13127PG12126PG11125PG10124PG9123PD7122PD6121VDD120VSS119PD5118PD4117PD3116PD2115PD1114PD0113PC12112PC11111PC10110PA15109PA14108VDD107VSS106VDDUSB105PA13(JTMS/ S104PA12103PA11102PA10101PA9100PA899PC998PC897PC796PC695VDDIO294VSS93PG892PG791PG690PG589PG488PG387PG286PD1585PD1484VDD83VSS82PD1381PD1280PD1179PD1078PD977PD876PB1575PB1474PB1373PB12Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.896.591.486.481.376.271.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1-76.2-81.3-86.4-91.4-96.5mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144E=20.00mm · Pitch e=0.50mmD=20.00mm-17-15-13-11-9-7-5-3-113579111315171715131197531-1-3-5-7-9-11-13-15-17mm
3. 3D CAD MODEL
Package Body: 20.00mm × 20.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (144/144)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
5PE6I/OMultiplexed I/O & Peripheral Pin PE6 (I2C, RTC/CLK)
6VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
7PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
8PC14 - OSC32_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
9IO4I/OGPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10PF0I/OMultiplexed I/O & Peripheral Pin PF0 (I2C)
11PF1I/OMultiplexed I/O & Peripheral Pin PF1 (I2C)
12PF2I/OMultiplexed I/O & Peripheral Pin PF2 (I2C)
13PF3I/OMultiplexed I/O & Peripheral Pin PF3 (ADC)
14PF4I/OMultiplexed I/O & Peripheral Pin PF4 (ADC)
15PF5I/OMultiplexed I/O & Peripheral Pin PF5 (ADC)
16VSSGNDGround Reference Pin (VSS)
17VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
18PF6I/OMultiplexed I/O & Peripheral Pin PF6 (ADC)
19PF7I/OMultiplexed I/O & Peripheral Pin PF7 (ADC, PWM)
20PF8I/OMultiplexed I/O & Peripheral Pin PF8 (SPI, ADC, PWM)
21PF9I/OMultiplexed I/O & Peripheral Pin PF9 (ADC, PWM)
22PF10I/OMultiplexed I/O & Peripheral Pin PF10 (ADC)
23PH0OSC IN -_ (PH0)I/OMultiplexed I/O & Peripheral Pin PH0OSC IN -_ (PH0) (RTC/CLK)
24PH1 - OSC_OUT (PH1)I/OMultiplexed I/O & Peripheral Pin PH1 - OSC_OUT (PH1) (RTC/CLK)
25NRSTISystem Enable & Hardware Reset (NRST)
26PC0I/OMultiplexed I/O & Peripheral Pin PC0 (I2C, ADC)
27PC1I/OMultiplexed I/O & Peripheral Pin PC1 (I2C, ADC)
28PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC)
29PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC)
30VSSAGNDGround Reference Pin (VSSA)
31VREF -AnalogMultiplexed I/O & Peripheral Pin VREF - (General)
32VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
33VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
34PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
35PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, I2C, ADC, PWM)
36PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
37PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
38VSSGNDGround Reference Pin (VSS)
39VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
40PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
41PA5I/OMultiplexed I/O & Peripheral Pin PA5 (ADC, DAC, PWM)
42PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC)
43PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
44PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
45PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
46PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, ADC, PWM)
47PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
48PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, RTC/CLK)
49PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
50PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
51VSSGNDGround Reference Pin (VSS)
52VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
53PF13I/OMultiplexed I/O & Peripheral Pin PF13 (I2C)
54PF14I/OMultiplexed I/O & Peripheral Pin PF14 (I2C)
55PF15I/OMultiplexed I/O & Peripheral Pin PF15 (I2C)
56PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
57PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
58PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
59PE8I/OMultiplexed I/O & Peripheral Pin PE8 (PWM)
60PE9I/OMultiplexed I/O & Peripheral Pin PE9 (PWM)
61VSSGNDGround Reference Pin (VSS)
62VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
63PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
64PE11I/OMultiplexed I/O & Peripheral Pin PE11 (PWM)
65PE12I/OMultiplexed I/O & Peripheral Pin PE12 (PWM)
66PE13I/OMultiplexed I/O & Peripheral Pin PE13 (PWM)
67PE14I/OMultiplexed I/O & Peripheral Pin PE14 (SPI, PWM)
68PE15I/OMultiplexed I/O & Peripheral Pin PE15 (SPI)
69PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C, PWM)
70PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, I2C, PWM)
71VSSGNDGround Reference Pin (VSS)
72VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
73PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, I2C, CAN)
74PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
75PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
76PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, I2C, PWM, RTC/CLK)
77PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
78PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
79PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART, SPI)
80PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, I2C)
81PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, PWM)
82PD13I/OMultiplexed I/O & Peripheral Pin PD13 (PWM)
83VSSGNDGround Reference Pin (VSS)
84VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
85PD14I/OMultiplexed I/O & Peripheral Pin PD14 (PWM)
86PD15I/OMultiplexed I/O & Peripheral Pin PD15 (PWM)
87PG2I/OMultiplexed I/O & Peripheral Pin PG2 (SPI)
88PG3I/OMultiplexed I/O & Peripheral Pin PG3 (SPI)
89PG4I/OMultiplexed I/O & Peripheral Pin PG4 (SPI)
90PG5I/OMultiplexed I/O & Peripheral Pin PG5 (UART, SPI)
91PG6I/OMultiplexed I/O & Peripheral Pin PG6 (UART, I2C)
92PG7I/OMultiplexed I/O & Peripheral Pin PG7 (I2C)
93PG8I/OMultiplexed I/O & Peripheral Pin PG8 (I2C)
94VSSGNDGround Reference Pin (VSS)
95VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
96PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
97PC7I/OMultiplexed I/O & Peripheral Pin PC7 (PWM)
98PC8I/OMultiplexed I/O & Peripheral Pin PC8 (PWM)
99PC9I/OMultiplexed I/O & Peripheral Pin PC9 (I2C, PWM)
100PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI, RTC/CLK)
101PA9I/OMultiplexed I/O & Peripheral Pin PA9 (PWM)
102PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, I2C, PWM)
103PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM, CAN)
104PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, CAN)
105PA13(JTMS/ SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13(JTMS/ SWDIO) (SWD/JTAG)
106VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
107VSSGNDGround Reference Pin (VSS)
108VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
109PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
110PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
111PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
112PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
113PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
114PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
115PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
116PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
117PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
118PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
119PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
120VSSGNDGround Reference Pin (VSS)
121VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
122PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
123PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
124PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
125PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
126PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
127PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
128PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
129PG14I/OMultiplexed I/O & Peripheral Pin PG14 (General)
130VSSGNDGround Reference Pin (VSS)
131VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
132PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
133PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
134PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
135PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
136PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
137PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
138PH3-BOOT0I/OMultiplexed I/O & Peripheral Pin PH3-BOOT0 (General)
139PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
140PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
141PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
142PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
143VSSGNDGround Reference Pin (VSS)
144VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
PIN 1 PE2
I/O
Multiplexed I/O & Peripheral Pin PE2 (General)
Design note: Alt: TRACECK TIM3 ETR ,_ , TSC_G7IO1_ , LCD_SEG38FMCA23 ,_ , SAI1_MCLKA_ , EVENTOUT
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32L496ZGT3 (ST · LQFP-144(20x20))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32L496ZGT3 (LQFP-144(20x20)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32L496ZGT3 (LQFP-144(20x20)) - 2. Standard Pinout (Top View)
True package pinout (144 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32L496ZGT3 (LQFP-144(20x20)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32L496ZGT3 (LQFP-144(20x20)) - 4. Package Dimensions (D×E×A)
LQFP-144(20x20) · 20.00×20.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32L496ZGT3 (LQFP-144(20x20)) - 5. Recommended Land Pattern
IPC-7351B Footprint (144 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32L496ZGT3 (LQFP-144(20x20)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)
Showing 1–12 of 12 uncropped original figures for STM32L496
P63 · p63_fig01EXACT PACKAGE
STM32L496ZGT3 (LQFP-144(20x20)) — Figure 9. STM32L496Zx LQFP144 pinout(1) PH3-BOOT0 141
Figure 9. STM32L496Zx LQFP144 pinout(1) PH3-BOOT0 141
P64 · p64_fig01EXACT PACKAGE
STM32L496ZGT3 (LQFP-144(20x20)) — Figure 10. STM32L496Zx, external SMPS device, LQFP144 pinout(1)
Figure 10. STM32L496Zx, external SMPS device, LQFP144 pinout(1)
P253 · p253_fig01EXACT PACKAGE
STM32L496ZGT3 (LQFP-144(20x20)) — Figure 69. LQFP144 - Recommended footprint
Figure 69. LQFP144 - Recommended footprint
P1 · p01_fig01881×601px
STM32L496ZGT3 (LQFP-144(20x20)) — • Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
• Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
P63 · p63_fig01P63
STM32L496ZGT3 (LQFP-144(20x20)) — Datasheet Page 63 (p63_fig01)
Datasheet Page 63 (p63_fig01)
P124 · p124_fig011755×2076px
STM32L496ZGT3 (LQFP-144(20x20)) — Figure 23. Power supply scheme VBAT VBAT
Figure 23. Power supply scheme VBAT VBAT
P124 · p124_fig01P124
STM32L496ZGT3 (LQFP-144(20x20)) — Datasheet Page 124 (p124_fig01)
Datasheet Page 124 (p124_fig01)
P164 · p164_fig011546×702px
STM32L496ZGT3 (LQFP-144(20x20)) — Figure 28. Typical application with an 8 MHz crystal
Figure 28. Typical application with an 8 MHz crystal
P165 · p165_fig011546×702px
STM32L496ZGT3 (LQFP-144(20x20)) — Figure 29. Typical application with a 32.768 kHz crystal
Figure 29. Typical application with a 32.768 kHz crystal
P253 · p253_fig01P253
STM32L496ZGT3 (LQFP-144(20x20)) — Datasheet Page 253 (p253_fig01)
Datasheet Page 253 (p253_fig01)
P257 · p257_fig011546×1457px
STM32L496ZGT3 (LQFP-144(20x20)) — Figure 73. UFBGA132 - Recommended footprint
Figure 73. UFBGA132 - Recommended footprint
P261 · p261_fig011548×1243px
STM32L496ZGT3 (LQFP-144(20x20)) — Figure 77. WLCSP115 - Recommended footprint
Figure 77. WLCSP115 - Recommended footprint

Technical Specifications & Part Details (STM32L496ZGT3)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32L496ZGT3 (LQFP-144(20x20)) is a 144-pin embedded microcontroller unit (mcu) featuring a 20.00 × 20.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, ADC, DAC, IrDA, CAN, PWM, RTC/CLK, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
80 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
81 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
20.00 × 20.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-144(20x20))
Pin Count & Lead PitchN / e
144 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, ADC, DAC, IrDA, CAN, PWM, RTC/CLK, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PH3-BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol144 auto-grouped pins
OK
IPC-7351B Land Pattern144 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-144(20x20))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
20.00 × 20.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.35 × 1.35 mm
Pins / Total PadsTopology
144P / 144Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-144(20x20)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32L496ZGT3 (LQFP-144(20x20))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32L496ZGT3 (LQFP-144(20x20))?

Manufactured by ST, the STM32L496ZGT3 is housed in a LQFP-144(20x20) package with 144 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: 1 (PE2: Multiplexed I/O & Peripheral Pin PE2 (General)), 2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), 3 (PE4: Multiplexed I/O & Peripheral Pin PE4 (General)), 4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (General)), 5 (PE6: Multiplexed I/O & Peripheral Pin PE6 (I2C, RTC/CLK)), 6 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))).

What are the IPC-7351B PCB Footprint dimensions for STM32L496ZGT3?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32L496ZGT3 (LQFP-144(20x20)) has a nominal body envelope of 20.00 × 20.00 mm, pitch e = 0.50 mm, and 144 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32L496ZGT3?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32L496ZGT3 (ST, LQFP-144(20x20)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (144 pins) & STM32L496 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
3PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
4PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
5PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: I2C, RTC/CLK.
6VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
7PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
8PC14 - OSC32_IN (PC14)Digital_IOSignal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK.
9IO4Digital_IOGPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10PF0Digital_IOSignal terminal PF0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF0. Supported peripheral buses: I2C.
11PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: I2C.
12PF2Digital_IOSignal terminal PF2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: I2C.
13PF3Digital_IOSignal terminal PF3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: ADC.
14PF4Digital_IOSignal terminal PF4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: ADC.
15PF5Digital_IOSignal terminal PF5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: ADC.
16VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
17VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
18PF6Digital_IOSignal terminal PF6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF6. Supported peripheral buses: ADC.
19PF7Digital_IOSignal terminal PF7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF7. Supported peripheral buses: ADC, PWM.
20PF8Digital_IOSignal terminal PF8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF8. Supported peripheral buses: SPI, ADC, PWM.
21PF9Digital_IOSignal terminal PF9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF9. Supported peripheral buses: ADC, PWM.
22PF10Digital_IOSignal terminal PF10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF10. Supported peripheral buses: ADC.
23PH0OSC IN -_ (PH0)Digital_IOSignal terminal PH0OSC IN -_ (PH0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0OSC IN -_ (PH0). Supported peripheral buses: RTC/CLK.
24PH1 - OSC_OUT (PH1)Digital_IOSignal terminal PH1 - OSC_OUT (PH1) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH1 - OSC_OUT (PH1). Supported peripheral buses: RTC/CLK.
25NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
26PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL. Supported peripheral buses: I2C, ADC.
27PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SDA. Supported peripheral buses: I2C, ADC.
28PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, ADC.
29PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, ADC.
30VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
31VREF -AnalogSignal terminal VREF - (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF -. Supported peripheral buses: General.
32VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
33VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
34PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
35PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, I2C, ADC, PWM.
36PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, PWM.
37PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC, PWM.
38VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
39VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
40PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSSSPI3NSS. Supported peripheral buses: UART, SPI, ADC, DAC.
41PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: ADC, DAC, PWM.
42PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC.
43PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
44PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
45PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC.
46PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: UART, ADC, PWM.
47PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM.
48PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: I2C, RTC/CLK.
49PF11Digital_IOSignal terminal PF11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF11. Supported peripheral buses: General.
50PF12Digital_IOSignal terminal PF12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF12. Supported peripheral buses: General.
51VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
52VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
53PF13Digital_IOSignal terminal PF13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SMBA. Supported peripheral buses: I2C.
54PF14Digital_IOSignal terminal PF14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SCL. Supported peripheral buses: I2C.
55PF15Digital_IOSignal terminal PF15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C4_SDA. Supported peripheral buses: I2C.
56PG0Digital_IOSignal terminal PG0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG0. Supported peripheral buses: General.
57PG1Digital_IOSignal terminal PG1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG1. Supported peripheral buses: General.
58PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
59PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: PWM.
60PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: PWM.
61VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
62VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
63PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: PWM.
64PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: PWM.
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