ChipDocs.org
⌘K
2284 PARTSUpload PDF
CH443K (SC-70-6(SOT-363)) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH443K

WCHID: C125185SC-70-6(SOT-363) · 6 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH443K (SC-70-6(SOT-363))1CH1 (S2B)2GND3CH0 (S1B)6SEL (IN)5VCC4COM (DB)Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.210.25.10-5.1-10.2mm
2. 2D FOOTPRINT
123456E=2.00mm · Pitch e=0.65mmD=1.25mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 2.00mm × 1.25mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (6/6)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1CH1 (S2B)I/OMultiplexed I/O & Peripheral Pin CH1 (S2B) (General)
2GNDGNDGround Reference Pin (GND)
3CH0 (S1B)I/OMultiplexed I/O & Peripheral Pin CH0 (S1B) (General)
4COM (DB)I/OMultiplexed I/O & Peripheral Pin COM (DB) (General)
5VCCPowerPower Supply Input (VCC — 3.3V / 5.0V Standard Logic)
6SEL (IN)I/OMultiplexed I/O & Peripheral Pin SEL (IN) (General)
PIN 1 CH1 (S2B)
I/O
Multiplexed I/O & Peripheral Pin CH1 (S2B) (General)
Design note: 二选 一模拟开关的CH1 端 ，SEL 引脚输入高电平选中
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH443K (WCH · SC-70-6(SOT-363))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH443K (SC-70-6(SOT-363)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH443K (SC-70-6(SOT-363)) - 2. Standard Pinout (Top View)
True package pinout (6 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH443K (SC-70-6(SOT-363)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH443K (SC-70-6(SOT-363)) - 4. Package Dimensions (D×E×A)
SC-70-6(SOT-363) · 2.00×1.25mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH443K (SC-70-6(SOT-363)) - 5. Recommended Land Pattern
IPC-7351B Footprint (6 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH443K (SC-70-6(SOT-363)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)
Showing 1–8 of 8 uncropped original figures for CH445 / CH448 / CH440
P3 · p03_fig01EXACT PACKAGE
CH443K (SC-70-6(SOT-363)) — 2、QFN 或DFN 封装的底板标示为0#引脚，对于CH448F 是必要连接。 3、CH442Q 与CH9442Q 引脚兼容，CH9442Q 支持Type-C 充电口USB 信号，耐压28V。 4、原型号CH440E 已用新型号CH442E 代替，引脚和功能相同。 5、CH340K 为盘装，每盘整包装数量为3000 只。 6、CH442Q、CH340K、CH443L 封装体积较小，正面印字仅有代号42、43、43 而不含全部型号。 | 4、引脚定义 | 4.1. CH340G
2、QFN 或DFN 封装的底板标示为0#引脚，对于CH448F 是必要连接。 3、CH442Q 与CH9442Q 引脚兼容，CH9442Q 支持Type-C 充电口USB 信号，耐压28V。 4、原型号CH440E 已用新型号CH442E 代替，引脚和功能相同。 5、CH340K 为盘装，每盘整包装数量为3000 只。 6、CH442Q、CH340K、CH443L 封装体积较小，正面印字仅有代号42、43、43 而不含全部型号。 | 4、引脚定义 | 4.1. CH340G
P6 · p06_fig01EXACT PACKAGE
CH443K (SC-70-6(SOT-363)) — CH340G 和CH444P 是DPQT 模拟开关芯片，包含2 路单刀四掷四选一开关。 S1A S2A YA S3A S4A S1B S2B YB S3B S4B EN# IN0 IN1
CH340G 和CH444P 是DPQT 模拟开关芯片，包含2 路单刀四掷四选一开关。 S1A S2A YA S3A S4A S1B S2B YB S3B S4B EN# IN0 IN1
P2 · p02_fig011491×1615px
CH443K (SC-70-6(SOT-363)) — 3、引脚排列
3、引脚排列
P2 · p02_fig01P2
CH443K (SC-70-6(SOT-363)) — Datasheet Page 2 (p02_fig01)
Datasheet Page 2 (p02_fig01)
P3 · p03_fig01P3
CH443K (SC-70-6(SOT-363)) — Datasheet Page 3 (p03_fig01)
Datasheet Page 3 (p03_fig01)
P17 · p17_fig011210×1387px
CH443K (SC-70-6(SOT-363)) — D 6 =a] 7 1 a a TEE.
D 6 =a] 7 1 a a TEE.
P17 · p17_fig01P17
CH443K (SC-70-6(SOT-363)) — Datasheet Page 17 (p17_fig01)
Datasheet Page 17 (p17_fig01)
P6 · p06_fig02All Packages in PDF
CH443K (SC-70-6(SOT-363)) — 5.4. CH340G/P CH340G CH444P
5.4. CH340G/P CH340G CH444P

Technical Specifications & Part Details (CH443K)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH443K (SC-70-6(SOT-363)) is a 6-pin standard electronic & interconnect component featuring a 1.25 × 2.10 × 0.95 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
550 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
1.25 × 2.10 × 0.95 mm (A1=0.10 mm)
Package family: SOT23 (SC-70-6(SOT-363))
Pin Count & Lead PitchN / e
6 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol6 auto-grouped pins
OK
IPC-7351B Land Pattern6 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SC-70-6(SOT-363))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
2.00 × 1.25 mm
Height (A) & Pitch (e)IPC-7351B
A=0.95mm · e=0.65mm
Pad Size (W × L)Level B
0.40 × 0.80 mm
Pins / Total PadsTopology
6P / 6Pad (SOT_SMALL)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SC-70-6(SOT-363)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH443K (SC-70-6(SOT-363))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH443K (SC-70-6(SOT-363))?

Manufactured by WCH, the CH443K is housed in a SC-70-6(SOT-363) package with 6 pins and a 0.65 mm lead pitch. Key pins include: 1 (CH1 (S2B): Multiplexed I/O & Peripheral Pin CH1 (S2B) (General)), 2 (GND: Ground Reference Pin (GND)), 3 (CH0 (S1B): Multiplexed I/O & Peripheral Pin CH0 (S1B) (General)), 4 (COM (DB): Multiplexed I/O & Peripheral Pin COM (DB) (General)), 5 (VCC: Power Supply Input (VCC — 3.3V / 5.0V Standard Logic)), 6 (SEL (IN): Multiplexed I/O & Peripheral Pin SEL (IN) (General)).

What are the IPC-7351B PCB Footprint dimensions for CH443K?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH443K (SC-70-6(SOT-363)) has a nominal body envelope of 1.25 × 2.00 mm, pitch e = 0.65 mm, and 6 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH443K?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH443K (WCH, SC-70-6(SOT-363)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (6 pins) & CH445 / CH448 / CH440 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1CH1 (S2B)Digital_IOSignal terminal CH1 (S2B) (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CH1 (S2B). Supported peripheral buses: General.
2GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
3CH0 (S1B)Digital_IOSignal terminal CH0 (S1B) (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CH0 (S1B). Supported peripheral buses: General.
4COM (DB)Digital_IOSignal terminal COM (DB) (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: COM (DB). Supported peripheral buses: General.
5VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
6SEL (IN)Digital_IOSignal terminal SEL (IN) (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEL (IN). Supported peripheral buses: General.
ExplorePartsPackagesMFRsUpload