Mechanical Dimensions & Land Pattern (TFBGA-257)
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.20mm · e=0.50mm
Pad Size (W × L)Level B
0.24 × 0.24 mm
Pins / Total PadsTopology
257P / 257Pad (BGA_GRID)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit TFBGA-257 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32MP151FAD1 (TFBGA-257)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32MP151FAD1 (TFBGA-257)?
Manufactured by ST, the STM32MP151FAD1 is housed in a TFBGA-257 package with 257 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PA2: Multiplexed I/O & Peripheral Pin PA2 (General)), A3 (PA3: Multiplexed I/O & Peripheral Pin PA3 (General)), A4 (PA4: Multiplexed I/O & Peripheral Pin PA4 (General)), A6 (VSS: Ground Reference Pin (VSS)), A7 (PA7: Multiplexed I/O & Peripheral Pin PA7 (General)).
What are the IPC-7351B PCB Footprint dimensions for STM32MP151FAD1?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32MP151FAD1 (TFBGA-257) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.50 mm, and 257 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32MP151FAD1?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32MP151FAD1 (ST, TFBGA-257) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (257 pins) & STM32MP151 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A2 | PA2 | Digital_IO | Signal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General. |
| A3 | PA3 | Digital_IO | Signal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General. |
| A4 | PA4 | Digital_IO | Signal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General. |
| A6 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A7 | PA7 | Digital_IO | Signal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General. |
| A9 | PA9 | Digital_IO | Signal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General. |
| A10 | PA10 | Digital_IO | Signal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General. |
| A12 | PA12 | Digital_IO | Signal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General. |
| A13 | PA13 | Digital_IO | Signal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General. |
| A15 | PA15 | Digital_IO | Signal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General. |
| A16 | PA16 | Digital_IO | Signal terminal PA16 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA16. Supported peripheral buses: General. |
| A17 | PA17 | Digital_IO | Signal terminal PA17 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA17. Supported peripheral buses: General. |
| A18 | PA18 | Digital_IO | Signal terminal PA18 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA18. Supported peripheral buses: General. |
| A19 | PA19 | Digital_IO | Signal terminal PA19 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA19. Supported peripheral buses: General. |
| B1 | PB1 | Digital_IO | Signal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General. |
| B2 | PB2 | Digital_IO | Signal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General. |
| B3 | PB3 | Digital_IO | Signal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General. |
| B4 | PB4 | Digital_IO | Signal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General. |
| B5 | PB5 | Digital_IO | Signal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General. |
| B6 | PB6 | Digital_IO | Signal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General. |
| B7 | PB7 | Digital_IO | Signal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General. |
| B8 | PB8 | Digital_IO | Signal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General. |
| B9 | PB9 | Digital_IO | Signal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General. |
| B10 | PB10 | Digital_IO | Signal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General. |
| B11 | PB11 | Digital_IO | Signal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General. |
| B12 | PB12 | Digital_IO | Signal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General. |
| B13 | PB13 | Digital_IO | Signal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General. |
| B14 | PB14 | Digital_IO | Signal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General. |
| B15 | PB15 | Digital_IO | Signal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General. |
| B16 | PB16 | Digital_IO | Signal terminal PB16 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB16. Supported peripheral buses: General. |
| B17 | PB17 | Digital_IO | Signal terminal PB17 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB17. Supported peripheral buses: General. |
| B18 | PB18 | Digital_IO | Signal terminal PB18 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB18. Supported peripheral buses: General. |
| B19 | PB19 | Digital_IO | Signal terminal PB19 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB19. Supported peripheral buses: General. |
| C1 | PC1 | Digital_IO | Signal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General. |
| C2 | PC2 | Digital_IO | Signal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General. |
| C3 | PC3 | Digital_IO | Signal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: General. |
| C4 | PC4 | Digital_IO | Signal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: General. |
| C5 | PC5 | Digital_IO | Signal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: General. |
| C6 | PC6 | Digital_IO | Signal terminal PC6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General. |
| C7 | PC7 | Digital_IO | Signal terminal PC7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General. |
| C8 | PC8 | Digital_IO | Signal terminal PC8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General. |
| C9 | PC9 | Digital_IO | Signal terminal PC9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: General. |
| C10 | PC10 | Digital_IO | Signal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General. |
| C11 | PC11 | Digital_IO | Signal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General. |
| C12 | PC12 | Digital_IO | Signal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General. |
| C13 | PC13 | Digital_IO | Signal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General. |
| C14 | PC14 | Digital_IO | Signal terminal PC14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14. Supported peripheral buses: General. |
| C15 | PC15 | Digital_IO | Signal terminal PC15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15. Supported peripheral buses: General. |
| C16 | PC16 | Digital_IO | Signal terminal PC16 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC16. Supported peripheral buses: General. |
| C17 | PC17 | Digital_IO | Signal terminal PC17 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC17. Supported peripheral buses: General. |
| C18 | PC18 | Digital_IO | Signal terminal PC18 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC18. Supported peripheral buses: General. |
| C19 | PC19 | Digital_IO | Signal terminal PC19 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC19. Supported peripheral buses: General. |
| D1 | PG12 | Digital_IO | Signal terminal PG12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: UART, SPI. |
| D2 | PD2 | Digital_IO | Signal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General. |
| D3 | PD3 | Digital_IO | Signal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General. |
| D17 | PD17 | Digital_IO | Signal terminal PD17 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD17. Supported peripheral buses: General. |
| D18 | PD18 | Digital_IO | Signal terminal PD18 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD18. Supported peripheral buses: General. |
| D19 | PD19 | Digital_IO | Signal terminal PD19 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD19. Supported peripheral buses: General. |
| E1 | PD8 | Digital_IO | Signal terminal PD8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: UART. |
| E2 | NRST | Digital_IO | Active-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals. |
| E3 | PE3 | Digital_IO | Signal terminal PE3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General. |
| E17 | PE17 | Digital_IO | Signal terminal PE17 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE17. Supported peripheral buses: General. |
| E18 | PE18 | Digital_IO | Signal terminal PE18 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE18. Supported peripheral buses: General. |