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SAM9X60D6K-I/4GB (TFBGA-196) — Symbol, Footprint IPC-7351B & 3D STEP Model

SAM9X60D6K-I/4GB

MICROCHIPID: C1235446TFBGA-196 · 196 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · SAM9X60D6K-I/4GB (TFBGA-196)A1GNDA2PB25A3PB0A4PB18A5PB3A6PB2A7PB23A8PB20A9PB17A10DDRM VSSA11PB7A12NCA13DDRM VSSA14PA14A15DDR _CALA16GNDB1PB5B3PB4B4TDOB5PB6B6PB1B7PB19B8PB21B9PB9B10DDRM VDDB11PB15B12DDRM VDDB13GNDB14DDRM VDDB16NCC1PA21C2PB14C4GND PA21 ANAC5ADV REFNC6PB12C7VDD QSPIC8PB22C9PB10C10PB11C11DDRM VSSC12DDRM VDDC13NCC15DDRM VDDC16DDRM VSSD1PA28D2PA30D3PA24D5ADV REFPD8PB24D9PB16D12DDR _VREFD14DDRM VDDD15NCD16DDRM VSSE1PA22E2PA27E3TMSE4VDD ANAE6PB8E7GNDE8VDD COREE9PB13E10GNDE11NCE13NCE14DDRM VDDE15DDRM VSSE16NCF1PA25F2PA20F3TDIF5PA9F6VDD COREF11VDD IOMF12VDD IOMF14DDRM VDDF15PD10F16PD8G1PA18G2PA16G3PA31G5GNDG12GNDG14VDD IOMG15PD6G16DDRM VSSH1PA14H2PA10H3PA23H4PA13H5PA26H8GNDH9PH9H12PD7H13PD15H14PD13H15PD14H16PD21T16GNDT15HS DPCT14HS DMBT13HS DPBT12HS DPAT11WK T UP0T10XOUTT9XIN 32T8PC26T7PC30T6PC18T5PC14T4PC9T3PC7T2RTCKT1GNDR16PD1R14HS DMCR13GND IN33R12HS DMAR11SHDNR10XINR9XOUT 32R8PC24R7PC22R6PC16R5PC12R4PC5R3TCKR1PA0P16PD0P15PC31P13VDD IN33P12RTU NEP11PC28P10VDD OUT25P9JTAG SELP8PC20P7VDD BUP6PC10P5PC3P4PC1P2PA5P1NRSTN16PD2N15GNDN14PC17N12PC29N9PC27N8PC8N5VDD IOP1N3PC2N2GNDN1PA2M16PD11M15PD5M14PC23M13PC13M11PC11M10GND IN33M9PC25M8PC21M7GNDM6PC6M4PC0M3PA19M2PA1M1PA4L16PD4L15PD3L14PC19L12PC15L11VDD IN33L6VDD COREL5PC4L3PA7L2PA3L1PA11K16PD19K15PD20K14VDD NFK12GNDK5GNDK3PA17K2PA15K1PA8J16PD17J15PD9J14PD16J13PD12J12PD18J9PJ9J8GNDJ5VDD IOP0J4VDD IOP0J3PA29J2PA6J1PA12Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8129.5124.5119.4114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3-119.4-124.5-129.5mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1N1P1R1T1A2C2D2E2F2G2H2J2K2L2M2N2P2T2A3B3D3E3F3G3H3J3K3L3M3N3R3T3A4B4C4E4H4J4M4P4R4T4A5B5C5D5F5G5H5J5K5L5N5P5R5T5A6B6C6E6F6L6M6P6R6T6A7B7C7E7M7P7R7T7A8B8C8D8E8H8J8M8N8P8R8T8A9B9C9D9E9H9J9M9N9P9R9T9A10B10C10E10M10P10R10T10A11B11C11E11F11L11M11P11R11T11A12B12C12D12F12G12H12J12K12L12N12P12R12T12A13B13C13E13H13J13M13P13R13T13A14B14D14E14F14G14H14J14K14L14M14N14R14T14A15C15D15E15F15G15H15J15K15L15M15N15P15T15A16B16C16D16E16F16G16H16J16K16L16M16N16P16R16T16E=11.00mm · Pitch e=0.65mmD=11.00mm-8-6-4-20246886420-2-4-6-8mm
3. 3D CAD MODEL
Package Body: 11.00mm × 11.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (196/196)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1GNDGNDGround Reference Pin (GND)
A2PB25I/OMultiplexed I/O & Peripheral Pin PB25 (General)
A3PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
A4PB18I/OMultiplexed I/O & Peripheral Pin PB18 (General)
A5PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
A6PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
A7PB23I/OMultiplexed I/O & Peripheral Pin PB23 (General)
A8PB20I/OMultiplexed I/O & Peripheral Pin PB20 (General)
A9PB17I/OMultiplexed I/O & Peripheral Pin PB17 (General)
A10DDRM VSSGNDGround Reference Pin (DDRM VSS)
A11PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
A12NCI/OMultiplexed I/O & Peripheral Pin NC (General)
A13DDRM VSSGNDGround Reference Pin (DDRM VSS)
A14PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
A15DDR _CALI/OMultiplexed I/O & Peripheral Pin DDR _CAL (General)
A16GNDGNDGround Reference Pin (GND)
B1PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
B3PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
B4TDOI/OMultiplexed I/O & Peripheral Pin TDO (General)
B5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
B6PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
B7PB19I/OMultiplexed I/O & Peripheral Pin PB19 (General)
B8PB21I/OMultiplexed I/O & Peripheral Pin PB21 (General)
B9PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
B10DDRM VDDPowerPower Supply Input (DDRM VDD — 3.3V / 5.0V Standard Logic)
B11PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
B12DDRM VDDPowerPower Supply Input (DDRM VDD — 3.3V / 5.0V Standard Logic)
B13GNDGNDGround Reference Pin (GND)
B14DDRM VDDPowerPower Supply Input (DDRM VDD — 3.3V / 5.0V Standard Logic)
B16NCI/OMultiplexed I/O & Peripheral Pin NC (General)
C1PA21I/OMultiplexed I/O & Peripheral Pin PA21 (General)
C2PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
C4GND PA21 ANAGNDGround Reference Pin (GND PA21 ANA)
C5ADV REFNI/OMultiplexed I/O & Peripheral Pin ADV REFN (General)
C6PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
C7VDD QSPIPowerPower Supply Input (VDD QSPI — 3.3V / 5.0V Standard Logic)
C8PB22I/OMultiplexed I/O & Peripheral Pin PB22 (General)
C9PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
C10PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
C11DDRM VSSGNDGround Reference Pin (DDRM VSS)
C12DDRM VDDPowerPower Supply Input (DDRM VDD — 3.3V / 5.0V Standard Logic)
C13NCI/OMultiplexed I/O & Peripheral Pin NC (General)
C15DDRM VDDPowerPower Supply Input (DDRM VDD — 3.3V / 5.0V Standard Logic)
C16DDRM VSSGNDGround Reference Pin (DDRM VSS)
D1PA28I/OMultiplexed I/O & Peripheral Pin PA28 (General)
D2PA30I/OMultiplexed I/O & Peripheral Pin PA30 (General)
D3PA24I/OMultiplexed I/O & Peripheral Pin PA24 (General)
D5ADV REFPI/OMultiplexed I/O & Peripheral Pin ADV REFP (General)
D8PB24I/OMultiplexed I/O & Peripheral Pin PB24 (General)
D9PB16I/OMultiplexed I/O & Peripheral Pin PB16 (General)
D12DDR _VREFAnalogMultiplexed I/O & Peripheral Pin DDR _VREF (General)
D14DDRM VDDPowerPower Supply Input (DDRM VDD — 3.3V / 5.0V Standard Logic)
D15NCI/OMultiplexed I/O & Peripheral Pin NC (General)
D16DDRM VSSGNDGround Reference Pin (DDRM VSS)
E1PA22I/OMultiplexed I/O & Peripheral Pin PA22 (General)
E2PA27I/OMultiplexed I/O & Peripheral Pin PA27 (General)
E3TMSI/OMultiplexed I/O & Peripheral Pin TMS (General)
E4VDD ANAPowerPower Supply Input (VDD ANA — 3.3V / 5.0V Standard Logic)
E6PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
E7GNDGNDGround Reference Pin (GND)
E8VDD COREPowerPower Supply Input (VDD CORE — 3.3V / 5.0V Standard Logic)
E9PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
E10GNDGNDGround Reference Pin (GND)
E11NCI/OMultiplexed I/O & Peripheral Pin NC (General)
E13NCI/OMultiplexed I/O & Peripheral Pin NC (General)
E14DDRM VDDPowerPower Supply Input (DDRM VDD — 3.3V / 5.0V Standard Logic)
E15DDRM VSSGNDGround Reference Pin (DDRM VSS)
E16NCI/OMultiplexed I/O & Peripheral Pin NC (General)
F1PA25I/OMultiplexed I/O & Peripheral Pin PA25 (General)
F2PA20I/OMultiplexed I/O & Peripheral Pin PA20 (General)
F3TDII/OMultiplexed I/O & Peripheral Pin TDI (General)
F5PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
F6VDD COREPowerPower Supply Input (VDD CORE — 3.3V / 5.0V Standard Logic)
F11VDD IOMPowerPower Supply Input (VDD IOM — 3.3V / 5.0V Standard Logic)
F12VDD IOMPowerPower Supply Input (VDD IOM — 3.3V / 5.0V Standard Logic)
F14DDRM VDDPowerPower Supply Input (DDRM VDD — 3.3V / 5.0V Standard Logic)
F15PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
F16PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
G1PA18I/OMultiplexed I/O & Peripheral Pin PA18 (General)
G2PA16I/OMultiplexed I/O & Peripheral Pin PA16 (General)
G3PA31I/OMultiplexed I/O & Peripheral Pin PA31 (General)
G5GNDGNDGround Reference Pin (GND)
G12GNDGNDGround Reference Pin (GND)
G14VDD IOMPowerPower Supply Input (VDD IOM — 3.3V / 5.0V Standard Logic)
G15PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
G16DDRM VSSGNDGround Reference Pin (DDRM VSS)
H1PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
H2PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
H3PA23I/OMultiplexed I/O & Peripheral Pin PA23 (General)
H4PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
H5PA26I/OMultiplexed I/O & Peripheral Pin PA26 (General)
H8GNDGNDGround Reference Pin (GND)
H9PH9I/OMultiplexed I/O & Peripheral Pin PH9 (General)
H12PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
H13PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
H14PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
H15PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
H16PD21I/OMultiplexed I/O & Peripheral Pin PD21 (General)
J1PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
J2PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
J3PA29I/OMultiplexed I/O & Peripheral Pin PA29 (General)
J4VDD IOP0PowerPower Supply Input (VDD IOP0 — 3.3V / 5.0V Standard Logic)
J5VDD IOP0PowerPower Supply Input (VDD IOP0 — 3.3V / 5.0V Standard Logic)
J8GNDGNDGround Reference Pin (GND)
J9PJ9I/OMultiplexed I/O & Peripheral Pin PJ9 (General)
J12PD18I/OMultiplexed I/O & Peripheral Pin PD18 (General)
J13PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
J14PD16I/OMultiplexed I/O & Peripheral Pin PD16 (General)
J15PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
J16PD17I/OMultiplexed I/O & Peripheral Pin PD17 (General)
K1PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
K2PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
K3PA17I/OMultiplexed I/O & Peripheral Pin PA17 (General)
K5GNDGNDGround Reference Pin (GND)
K12GNDGNDGround Reference Pin (GND)
K14VDD NFPowerPower Supply Input (VDD NF — 3.3V / 5.0V Standard Logic)
K15PD20I/OMultiplexed I/O & Peripheral Pin PD20 (General)
K16PD19I/OMultiplexed I/O & Peripheral Pin PD19 (General)
L1PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
L2PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
L3PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
L5PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
L6VDD COREPowerPower Supply Input (VDD CORE — 3.3V / 5.0V Standard Logic)
L11VDD IN33PowerPower Supply Input (VDD IN33 — 3.3V / 5.0V Standard Logic)
L12PC15I/OMultiplexed I/O & Peripheral Pin PC15 (General)
L14PC19I/OMultiplexed I/O & Peripheral Pin PC19 (General)
L15PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
L16PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
M1PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
M2PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
M3PA19I/OMultiplexed I/O & Peripheral Pin PA19 (General)
M4PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
M6PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
M7GNDGNDGround Reference Pin (GND)
M8PC21I/OMultiplexed I/O & Peripheral Pin PC21 (General)
M9PC25I/OMultiplexed I/O & Peripheral Pin PC25 (General)
M10GND IN33GNDGround Reference Pin (GND IN33)
M11PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
M13PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
M14PC23I/OMultiplexed I/O & Peripheral Pin PC23 (General)
M15PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
M16PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
N1PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
N2GNDGNDGround Reference Pin (GND)
N3PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
N5VDD IOP1PowerPower Supply Input (VDD IOP1 — 3.3V / 5.0V Standard Logic)
N8PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
N9PC27I/OMultiplexed I/O & Peripheral Pin PC27 (General)
N12PC29I/OMultiplexed I/O & Peripheral Pin PC29 (General)
N14PC17I/OMultiplexed I/O & Peripheral Pin PC17 (General)
N15GNDGNDGround Reference Pin (GND)
N16PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
P1NRSTISystem Enable & Hardware Reset (NRST)
P2PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
P4PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
P5PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
P6PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
P7VDD BUPowerPower Supply Input (VDD BU — 3.3V / 5.0V Standard Logic)
P8PC20I/OMultiplexed I/O & Peripheral Pin PC20 (General)
P9JTAG SELI/OMultiplexed I/O & Peripheral Pin JTAG SEL (SWD/JTAG)
P10VDD OUT25PowerPower Supply Input (VDD OUT25 — 3.3V / 5.0V Standard Logic)
P11PC28I/OMultiplexed I/O & Peripheral Pin PC28 (General)
P12RTU NEI/OMultiplexed I/O & Peripheral Pin RTU NE (General)
P13VDD IN33PowerPower Supply Input (VDD IN33 — 3.3V / 5.0V Standard Logic)
P15PC31I/OMultiplexed I/O & Peripheral Pin PC31 (General)
P16PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
R1PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
R3TCKI/OMultiplexed I/O & Peripheral Pin TCK (General)
R4PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
R5PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
R6PC16I/OMultiplexed I/O & Peripheral Pin PC16 (General)
R7PC22I/OMultiplexed I/O & Peripheral Pin PC22 (General)
R8PC24I/OMultiplexed I/O & Peripheral Pin PC24 (General)
R9XOUT 32I/OMultiplexed I/O & Peripheral Pin XOUT 32 (RTC/CLK)
R10XINI/OMultiplexed I/O & Peripheral Pin XIN (RTC/CLK)
R11SHDNI/OMultiplexed I/O & Peripheral Pin SHDN (General)
R12HS DMAI/OMultiplexed I/O & Peripheral Pin HS DMA (General)
R13GND IN33GNDGround Reference Pin (GND IN33)
R14HS DMCI/OMultiplexed I/O & Peripheral Pin HS DMC (General)
R16PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
T1GNDGNDGround Reference Pin (GND)
T2RTCKI/OMultiplexed I/O & Peripheral Pin RTCK (RTC/CLK)
T3PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
T4PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
T5PC14I/OMultiplexed I/O & Peripheral Pin PC14 (General)
T6PC18I/OMultiplexed I/O & Peripheral Pin PC18 (General)
T7PC30I/OMultiplexed I/O & Peripheral Pin PC30 (General)
T8PC26I/OMultiplexed I/O & Peripheral Pin PC26 (General)
T9XIN 32I/OMultiplexed I/O & Peripheral Pin XIN 32 (RTC/CLK)
T10XOUTI/OMultiplexed I/O & Peripheral Pin XOUT (RTC/CLK)
T11WK T UP0I/OMultiplexed I/O & Peripheral Pin WK T UP0 (General)
T12HS DPAI/OMultiplexed I/O & Peripheral Pin HS DPA (General)
T13HS DPBI/OMultiplexed I/O & Peripheral Pin HS DPB (General)
T14HS DMBI/OMultiplexed I/O & Peripheral Pin HS DMB (General)
T15HS DPCI/OMultiplexed I/O & Peripheral Pin HS DPC (General)
T16GNDGNDGround Reference Pin (GND)
PIN A1 GND
GND
Ground Reference Pin (GND)
Design note: 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: SAM9X60D6K-I/4GB (MICROCHIP · TFBGA-196)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
SAM9X60D6K-I/4GB (TFBGA-196) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
SAM9X60D6K-I/4GB (TFBGA-196) - 2. Standard Pinout (Top View)
True package pinout (196 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
SAM9X60D6K-I/4GB (TFBGA-196) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
SAM9X60D6K-I/4GB (TFBGA-196) - 4. Package Dimensions (D×E×A)
TFBGA-196 · 11.00×11.00mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
SAM9X60D6K-I/4GB (TFBGA-196) - 5. Recommended Land Pattern
IPC-7351B Footprint (196 Pads)Expand ›
6. Application SchematicSCHEMATIC
SAM9X60D6K-I/4GB (TFBGA-196) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)
Showing 1–9 of 9 uncropped original figures for SAM9X60D6K / SAM9X60D6KT
P11 · p11_fig01EXACT PACKAGE
SAM9X60D6K-I/4GB (TFBGA-196) — Figure 6-1. BGA233 Ballout
Figure 6-1. BGA233 Ballout
P32 · p32_fig01EXACT PACKAGE
SAM9X60D6K-I/4GB (TFBGA-196) — 196-Lead Thin Fine Pitch Ball Grid Array (4GB) - 11x11x1.2 mm Body [TFBGA]
196-Lead Thin Fine Pitch Ball Grid Array (4GB) - 11x11x1.2 mm Body [TFBGA]
P1 · p01_fig01456×280px
SAM9X60D6K-I/4GB (TFBGA-196) — SAM9X60 System-In-Package (SIP) MPU with up to 1 Gbit
SAM9X60 System-In-Package (SIP) MPU with up to 1 Gbit
P11 · p11_fig01P11
SAM9X60D6K-I/4GB (TFBGA-196) — Datasheet Page 11 (p11_fig01)
Datasheet Page 11 (p11_fig01)
P28 · p28_fig011761×2536px
SAM9X60D6K-I/4GB (TFBGA-196) — Datasheet DS60001580C-page 28
Datasheet DS60001580C-page 28
P29 · p29_fig011787×1321px
SAM9X60D6K-I/4GB (TFBGA-196) — Table 9-1. 233-Ball TFBGA Package Characteristics | Moisture Sensitivity Level 3 | Table 9-2. Device and 233-Ball TFBGA Package Weight | Device Weight (mg) | SAM9X60D5M 394 | SAM9X60D1G 399 | Table 9-3. Package Reference | JEDEC Drawing Ref
Table 9-1. 233-Ball TFBGA Package Characteristics | Moisture Sensitivity Level 3 | Table 9-2. Device and 233-Ball TFBGA Package Weight | Device Weight (mg) | SAM9X60D5M 394 | SAM9X60D1G 399 | Table 9-3. Package Reference | JEDEC Drawing Ref
P29 · p29_fig01P29
SAM9X60D6K-I/4GB (TFBGA-196) — Datasheet Page 29 (p29_fig01)
Datasheet Page 29 (p29_fig01)
P32 · p32_fig01P32
SAM9X60D6K-I/4GB (TFBGA-196) — Datasheet Page 32 (p32_fig01)
Datasheet Page 32 (p32_fig01)
P33 · p33_fig011787×873px
SAM9X60D6K-I/4GB (TFBGA-196) — Table 9-7. Package Reference | JEDEC Drawing Reference NA | J-STD-609 Classification e8 | Table 9-8. 196-Ball TFBGA Package Information | Ball Land 0.4 ± 0.05 mm | Nominal Ball Diameter 0.35 mm | Solder Mask Opening 0.30 ± 0.03 mm | Solder
Table 9-7. Package Reference | JEDEC Drawing Reference NA | J-STD-609 Classification e8 | Table 9-8. 196-Ball TFBGA Package Information | Ball Land 0.4 ± 0.05 mm | Nominal Ball Diameter 0.35 mm | Solder Mask Opening 0.30 ± 0.03 mm | Solder

Technical Specifications & Part Details (SAM9X60D6K-I/4GB)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:SAM9X60D6K-I/4GB (TFBGA-196) is a 196-pin standard electronic & interconnect component featuring a 11.00 × 11.00 × 1.20 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C to +85°C with integrated USB, UART, SPI, I2C, PWM, JTAG / SWD, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to +85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
600 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
11.00 × 11.00 × 1.20 mm (A1=0.25 mm)
Package family: BGA (TFBGA-196)
Pin Count & Lead PitchN / e
196 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, PWM, JTAG / SWD, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol196 auto-grouped pins
OK
IPC-7351B Land Pattern196 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — SAM9X60D6K / SAM9X60D6KT (2)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (TFBGA-196)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
11.00 × 11.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.20mm · e=0.65mm
Pad Size (W × L)Level B
0.30 × 0.30 mm
Pins / Total PadsTopology
196P / 196Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TFBGA-196
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — SAM9X60D6K-I/4GB (TFBGA-196)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of SAM9X60D6K-I/4GB (TFBGA-196)?

Manufactured by MICROCHIP, the SAM9X60D6K-I/4GB is housed in a TFBGA-196 package with 196 pins and a 0.65 mm lead pitch. Key pins include: A1 (GND: Ground Reference Pin (GND)), A2 (PB25: Multiplexed I/O & Peripheral Pin PB25 (General)), A3 (PB0: Multiplexed I/O & Peripheral Pin PB0 (General)), A4 (PB18: Multiplexed I/O & Peripheral Pin PB18 (General)), A5 (PB3: Multiplexed I/O & Peripheral Pin PB3 (General)), A6 (PB2: Multiplexed I/O & Peripheral Pin PB2 (General)).

What are the IPC-7351B PCB Footprint dimensions for SAM9X60D6K-I/4GB?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), SAM9X60D6K-I/4GB (TFBGA-196) has a nominal body envelope of 11.00 × 11.00 mm, pitch e = 0.65 mm, and 196 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for SAM9X60D6K-I/4GB?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for SAM9X60D6K-I/4GB (MICROCHIP, TFBGA-196) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (196 pins) & SAM9X60D6K / SAM9X60D6KT Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
A2PB25Digital_IOSignal terminal PB25 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB25. Supported peripheral buses: General.
A3PB0Digital_IOSignal terminal PB0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
A4PB18Digital_IOSignal terminal PB18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB18. Supported peripheral buses: General.
A5PB3Digital_IOSignal terminal PB3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
A6PB2Digital_IOSignal terminal PB2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
A7PB23Digital_IOSignal terminal PB23 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB23. Supported peripheral buses: General.
A8PB20Digital_IOSignal terminal PB20 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB20. Supported peripheral buses: General.
A9PB17Digital_IOSignal terminal PB17 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB17. Supported peripheral buses: General.
A10DDRM VSSGND0V electrical ground return terminal (DDRM VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A11PB7Digital_IOSignal terminal PB7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
A12NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
A13DDRM VSSGND0V electrical ground return terminal (DDRM VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A14PA14Digital_IOSignal terminal PA14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
A15DDR _CALDigital_IOSignal terminal DDR _CAL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DDR _CAL. Supported peripheral buses: General.
A16GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
B1PB5Digital_IOSignal terminal PB5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
B3PB4Digital_IOSignal terminal PB4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
B4TDODigital_IOSignal terminal TDO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TDO. Supported peripheral buses: General.
B5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
B6PB1Digital_IOSignal terminal PB1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
B7PB19Digital_IOSignal terminal PB19 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB19. Supported peripheral buses: General.
B8PB21Digital_IOSignal terminal PB21 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB21. Supported peripheral buses: General.
B9PB9Digital_IOSignal terminal PB9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
B10DDRM VDDPower_InPrimary positive power supply input (DDRM VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
B11PB15Digital_IOSignal terminal PB15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
B12DDRM VDDPower_InPrimary positive power supply input (DDRM VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
B13GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
B14DDRM VDDPower_InPrimary positive power supply input (DDRM VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
B16NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
C1PA21Digital_IOSignal terminal PA21 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA21. Supported peripheral buses: General.
C2PB14Digital_IOSignal terminal PB14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
C4GND PA21 ANAGND0V electrical ground return terminal (GND PA21 ANA) for internal core logic, I/O drivers, and analog sub-blocks.
C5ADV REFNDigital_IOSignal terminal ADV REFN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: ADV REFN. Supported peripheral buses: General.
C6PB12Digital_IOSignal terminal PB12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
C7VDD QSPIPower_InPrimary positive power supply input (VDD QSPI) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
C8PB22Digital_IOSignal terminal PB22 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB22. Supported peripheral buses: General.
C9PB10Digital_IOSignal terminal PB10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
C10PB11Digital_IOSignal terminal PB11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
C11DDRM VSSGND0V electrical ground return terminal (DDRM VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C12DDRM VDDPower_InPrimary positive power supply input (DDRM VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
C13NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
C15DDRM VDDPower_InPrimary positive power supply input (DDRM VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
C16DDRM VSSGND0V electrical ground return terminal (DDRM VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D1PA28Digital_IOSignal terminal PA28 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA28. Supported peripheral buses: General.
D2PA30Digital_IOSignal terminal PA30 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA30. Supported peripheral buses: General.
D3PA24Digital_IOSignal terminal PA24 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA24. Supported peripheral buses: General.
D5ADV REFPDigital_IOSignal terminal ADV REFP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: ADV REFP. Supported peripheral buses: General.
D8PB24Digital_IOSignal terminal PB24 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB24. Supported peripheral buses: General.
D9PB16Digital_IOSignal terminal PB16 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB16. Supported peripheral buses: General.
D12DDR _VREFAnalogSignal terminal DDR _VREF (Analog, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DDR _VREF. Supported peripheral buses: General.
D14DDRM VDDPower_InPrimary positive power supply input (DDRM VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
D15NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
D16DDRM VSSGND0V electrical ground return terminal (DDRM VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E1PA22Digital_IOSignal terminal PA22 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA22. Supported peripheral buses: General.
E2PA27Digital_IOSignal terminal PA27 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA27. Supported peripheral buses: General.
E3TMSDigital_IOSignal terminal TMS (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TMS. Supported peripheral buses: General.
E4VDD ANAPower_InPrimary positive power supply input (VDD ANA) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
E6PB8Digital_IOSignal terminal PB8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
E7GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
E8VDD COREPower_InPrimary positive power supply input (VDD CORE) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
E9PB13Digital_IOSignal terminal PB13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
E10GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
E11NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
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