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CH453S (SOP-28-300mil) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH453S

WCHID: C111672SOP-28-300mil · 28 Pins · Pitch 1.27mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH453S (SOP-28-300mil)1SEG52SEG63SEG74DIG05DIG16DIG27DIG38DIG49SCL10SDA11GND12DIG513DIG614DIG728SEG427SEG326SEG225VCC24SEG123SEG022DIG1521DIG1420DIG1319DIG1218DIG1117DIG1016DIG915DIG8Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.222.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728E=7.50mm · Pitch e=1.27mmD=17.90mm-10-8-6-4-20246810131197531-1-3-5-7-9-11-13mm
3. 3D CAD MODEL
Package Body: 7.50mm × 17.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (28/28)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1SEG5I/OMultiplexed I/O & Peripheral Pin SEG5 (General)
2SEG6I/OMultiplexed I/O & Peripheral Pin SEG6 (General)
3SEG7I/OMultiplexed I/O & Peripheral Pin SEG7 (General)
4DIG0I/OMultiplexed I/O & Peripheral Pin DIG0 (General)
5DIG1I/OMultiplexed I/O & Peripheral Pin DIG1 (General)
6DIG2I/OMultiplexed I/O & Peripheral Pin DIG2 (General)
7DIG3I/OMultiplexed I/O & Peripheral Pin DIG3 (General)
8DIG4I/OMultiplexed I/O & Peripheral Pin DIG4 (General)
9SCLI/OMultiplexed I/O & Peripheral Pin SCL (I2C)
10SDAI/OMultiplexed I/O & Peripheral Pin SDA (I2C)
11GNDGNDGround Reference Pin (GND)
12DIG5I/OMultiplexed I/O & Peripheral Pin DIG5 (General)
13DIG6I/OMultiplexed I/O & Peripheral Pin DIG6 (General)
14DIG7I/OMultiplexed I/O & Peripheral Pin DIG7 (General)
15DIG8I/OMultiplexed I/O & Peripheral Pin DIG8 (General)
16DIG9I/OMultiplexed I/O & Peripheral Pin DIG9 (General)
17DIG10I/OMultiplexed I/O & Peripheral Pin DIG10 (General)
18DIG11I/OMultiplexed I/O & Peripheral Pin DIG11 (General)
19DIG12I/OMultiplexed I/O & Peripheral Pin DIG12 (General)
20DIG13I/OMultiplexed I/O & Peripheral Pin DIG13 (General)
21DIG14I/OMultiplexed I/O & Peripheral Pin DIG14 (General)
22DIG15I/OMultiplexed I/O & Peripheral Pin DIG15 (General)
23SEG0I/OMultiplexed I/O & Peripheral Pin SEG0 (General)
24SEG1I/OMultiplexed I/O & Peripheral Pin SEG1 (General)
25VCCPowerPower Supply Input (VCC — 3.3V / 5.0V Standard Logic)
26SEG2I/OMultiplexed I/O & Peripheral Pin SEG2 (General)
27SEG3I/OMultiplexed I/O & Peripheral Pin SEG3 (General)
28SEG4I/OMultiplexed I/O & Peripheral Pin SEG4 (General)
PIN 1 SEG5
I/O
Multiplexed I/O & Peripheral Pin SEG5 (General)
Design note: Signal terminal SEG5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEG5. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 7 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH453S (WCH · SOP-28-300mil)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH453S (SOP-28-300mil) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH453S (SOP-28-300mil) - 2. Standard Pinout (Top View)
True package pinout (28 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH453S (SOP-28-300mil) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH453S (SOP-28-300mil) - 4. Package Dimensions (D×E×A)
SOP-28-300mil · 7.50×17.90mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH453S (SOP-28-300mil) - 5. Recommended Land Pattern
IPC-7351B Footprint (28 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH453S (SOP-28-300mil) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (7 figures · Page 1/1)
Showing 1–7 of 7 uncropped original figures for CH453
P1 · p01_fig011648×708px
CH453S (SOP-28-300mil) — CH453 是16 位数码管显示驱动和键盘扫描控制芯片。CH453 内置时钟振荡电路，可以动态驱动 16 位数码管或者128 只LED 发光管；同时还可以进行64 键的键盘扫描；CH453 通过2 线串行接口与 单片机等交换数据。 | 2、特点 | DIG15～DIG0 | SEG7～SEG0 | INT# DIG15 | SCL | SDA | CH453 芯片 | 单片机 | MCU 等 | 16 位 数码管 | 或 128 个 发光管 | 8×8 矩阵 64 键键盘
CH453 是16 位数码管显示驱动和键盘扫描控制芯片。CH453 内置时钟振荡电路，可以动态驱动 16 位数码管或者128 只LED 发光管；同时还可以进行64 键的键盘扫描；CH453 通过2 线串行接口与 单片机等交换数据。 | 2、特点 | DIG15～DIG0 | SEG7～SEG0 | INT# DIG15 | SCL | SDA | CH453 芯片 | 单片机 | MCU 等 | 16 位 数码管 | 或 128 个 发光管 | 8×8 矩阵 64 键键盘
P1 · p01_fig02542×746px
CH453S (SOP-28-300mil) — PDF Figure p01_fig02 (Page 1 — REPRESENTATIVE_PHOTO)
PDF Figure p01_fig02 (Page 1 — REPRESENTATIVE_PHOTO)
P1 · p01_fig01P1
CH453S (SOP-28-300mil) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P1 · p01_fig02P1
CH453S (SOP-28-300mil) — Datasheet Page 1 (p01_fig02)
Datasheet Page 1 (p01_fig02)
P6 · p06_fig011301×261px
CH453S (SOP-28-300mil) — （注：本表计量单位以纳秒即10
（注：本表计量单位以纳秒即10
P7 · p07_fig011867×1323px
CH453S (SOP-28-300mil) — 8.2. 抗干扰
8.2. 抗干扰
P7 · p07_fig01P7
CH453S (SOP-28-300mil) — Datasheet Page 7 (p07_fig01)
Datasheet Page 7 (p07_fig01)

Technical Specifications & Part Details (CH453S)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH453S (SOP-28-300mil) is a 28-pin standard electronic & interconnect component featuring a 17.90 × 7.50 × 2.50 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated I2C interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
17.90 × 7.50 × 2.50 mm (A1=0.20 mm)
Package family: SOP (SOP-28-300mil)
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
I2C
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol28 auto-grouped pins
OK
IPC-7351B Land Pattern28 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOP-28-300mil)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
17.90 × 7.50 mm
Height (A) & Pitch (e)IPC-7351B
A=2.50mm · e=1.27mm
Pad Size (W × L)Level B
0.60 × 1.90 mm
Pins / Total PadsTopology
28P / 28Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOP-28-300mil
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH453S (SOP-28-300mil)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH453S (SOP-28-300mil)?

Manufactured by WCH, the CH453S is housed in a SOP-28-300mil package with 28 pins and a 1.27 mm lead pitch. Key pins include: 1 (SEG5: Multiplexed I/O & Peripheral Pin SEG5 (General)), 2 (SEG6: Multiplexed I/O & Peripheral Pin SEG6 (General)), 3 (SEG7: Multiplexed I/O & Peripheral Pin SEG7 (General)), 4 (DIG0: Multiplexed I/O & Peripheral Pin DIG0 (General)), 5 (DIG1: Multiplexed I/O & Peripheral Pin DIG1 (General)), 6 (DIG2: Multiplexed I/O & Peripheral Pin DIG2 (General)).

What are the IPC-7351B PCB Footprint dimensions for CH453S?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH453S (SOP-28-300mil) has a nominal body envelope of 7.50 × 17.90 mm, pitch e = 1.27 mm, and 28 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH453S?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH453S (WCH, SOP-28-300mil) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (28 pins) & CH453 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1SEG5Digital_IOSignal terminal SEG5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEG5. Supported peripheral buses: General.
2SEG6Digital_IOSignal terminal SEG6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEG6. Supported peripheral buses: General.
3SEG7Digital_IOSignal terminal SEG7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEG7. Supported peripheral buses: General.
4DIG0Digital_IOSignal terminal DIG0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG0. Supported peripheral buses: General.
5DIG1Digital_IOSignal terminal DIG1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG1. Supported peripheral buses: General.
6DIG2Digital_IOSignal terminal DIG2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG2. Supported peripheral buses: General.
7DIG3Digital_IOSignal terminal DIG3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG3. Supported peripheral buses: General.
8DIG4Digital_IOSignal terminal DIG4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG4. Supported peripheral buses: General.
9SCLDigital_IOSignal terminal SCL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SCL. Supported peripheral buses: I2C.
10SDADigital_IOSignal terminal SDA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SDA. Supported peripheral buses: I2C.
11GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
12DIG5Digital_IOSignal terminal DIG5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG5. Supported peripheral buses: General.
13DIG6Digital_IOSignal terminal DIG6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG6. Supported peripheral buses: General.
14DIG7Digital_IOSignal terminal DIG7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG7. Supported peripheral buses: General.
15DIG8Digital_IOSignal terminal DIG8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG8. Supported peripheral buses: General.
16DIG9Digital_IOSignal terminal DIG9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG9. Supported peripheral buses: General.
17DIG10Digital_IOSignal terminal DIG10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG10. Supported peripheral buses: General.
18DIG11Digital_IOSignal terminal DIG11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG11. Supported peripheral buses: General.
19DIG12Digital_IOSignal terminal DIG12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG12. Supported peripheral buses: General.
20DIG13Digital_IOSignal terminal DIG13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG13. Supported peripheral buses: General.
21DIG14Digital_IOSignal terminal DIG14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG14. Supported peripheral buses: General.
22DIG15Digital_IOSignal terminal DIG15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIG15. Supported peripheral buses: General.
23SEG0Digital_IOSignal terminal SEG0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEG0. Supported peripheral buses: General.
24SEG1Digital_IOSignal terminal SEG1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEG1. Supported peripheral buses: General.
25VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
26SEG2Digital_IOSignal terminal SEG2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEG2. Supported peripheral buses: General.
27SEG3Digital_IOSignal terminal SEG3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEG3. Supported peripheral buses: General.
28SEG4Digital_IOSignal terminal SEG4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SEG4. Supported peripheral buses: General.
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